335 lines
22 KiB
XML
335 lines
22 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
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<!-- -->
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<!-- For tool use only. Do not edit. -->
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<!-- -->
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<!-- ProjectNavigator created generated project file. -->
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<!-- For use in tracking generated file and other information -->
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<!-- allowing preservation of process status. -->
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<!-- -->
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<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
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<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
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<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="yasg.xise"/>
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<files xmlns="http://www.xilinx.com/XMLSchema">
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name=".lso"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="dds.bld"/>
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<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="dds.cmd_log"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="dds.lso"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="dds.ncd" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="dds.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="dds.ngd"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="dds.ngr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="dds.par" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="dds.pcf" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="dds.prj"/>
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<file xil_pn:fileType="FILE_SPL" xil_pn:name="dds.spl"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="dds.stx"/>
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<file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="dds.sym" xil_pn:origination="imported"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="dds.syr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="dds.twr" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="dds.twx" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="dds.unroutes" xil_pn:subbranch="Par"/>
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<file xil_pn:fileType="FILE_VHDL_INSTTEMPLATE" xil_pn:name="dds.vhi"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="dds.xst"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="dds_envsettings.html"/>
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<file xil_pn:fileType="FILE_NCD" xil_pn:name="dds_guide.ncd" xil_pn:origination="imported"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="dds_map.map" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="dds_map.mrp" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="dds_map.ncd" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="dds_map.ngm" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="dds_pad.csv" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="dds_pad.txt" xil_pn:subbranch="Par"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="dds_summary.html"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="dds_tb_isim_beh.exe"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="dds_tb_stx_beh.prj"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="dds_vhdl.prj"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="dds_xst.xrpt"/>
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<file xil_pn:fileType="FILE_LOG" xil_pn:name="fuse.log"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="isim"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_CMD" xil_pn:name="isim.cmd"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_LOG" xil_pn:name="isim.log"/>
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<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="lcd_driver.prj"/>
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<file xil_pn:fileType="FILE_XST_STX" xil_pn:name="lcd_driver.stx"/>
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<file xil_pn:fileType="FILE_XST" xil_pn:name="lcd_driver.xst"/>
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<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="spi_driver.cmd_log"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="spi_driver.lso"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="spi_driver.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="spi_driver.ngr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="spi_driver.prj"/>
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<file xil_pn:fileType="FILE_SPL" xil_pn:name="spi_driver.spl"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="spi_driver.stx"/>
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<file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="spi_driver.sym" xil_pn:origination="imported"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="spi_driver.syr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="spi_driver.xst"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="spi_driver_envsettings.html"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="spi_driver_isim_beh.exe"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="spi_driver_summary.html"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="spi_driver_tb_beh.prj"/>
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<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="spi_driver_tb_isim_beh.exe"/>
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<file xil_pn:fileType="FILE_ISIM_MISC" xil_pn:name="spi_driver_tb_isim_beh.wdb"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="spi_driver_xst.xrpt"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="toplevel.bgn" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="toplevel.bit" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="toplevel.bld"/>
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<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="toplevel.cmd_log"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="toplevel.drc" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:fileType="FILE_JHD" xil_pn:name="toplevel.jhd"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="toplevel.lso"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="toplevel.ncd" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="toplevel.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="toplevel.ngd"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="toplevel.ngr"/>
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<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="toplevel.pad"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="toplevel.par" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="toplevel.pcf" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="toplevel.prj"/>
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<file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="toplevel.ptwx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="toplevel.stx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="toplevel.syr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="toplevel.twx" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="toplevel.unroutes" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="toplevel.ut" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="toplevel.vhf"/>
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<file xil_pn:fileType="FILE_XPI" xil_pn:name="toplevel.xpi"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="toplevel.xst"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="toplevel_envsettings.html"/>
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<file xil_pn:fileType="FILE_NCD" xil_pn:name="toplevel_guide.ncd" xil_pn:origination="imported"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="toplevel_map.map" xil_pn:subbranch="Map"/>
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<outfile xil_pn:name="spi_driver_tb.vhd"/>
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="InputChanged"/>
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<transform xil_pn:end_ts="1463733715" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1463733715">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463733715" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-2239360189155701135" xil_pn:start_ts="1463733715">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463734910" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="9102341965431189672" xil_pn:start_ts="1463734910">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463733715" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="7072966905182239268" xil_pn:start_ts="1463733715">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744766" xil_pn:in_ck="-1719981268874910048" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="1663716282806445198" xil_pn:start_ts="1463744693">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<status xil_pn:value="OutOfDateForOutputs"/>
|
|
<status xil_pn:value="OutputChanged"/>
|
|
<outfile xil_pn:name=".lso"/>
|
|
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
|
|
<outfile xil_pn:name="dds.ngr"/>
|
|
<outfile xil_pn:name="spi_driver.ngr"/>
|
|
<outfile xil_pn:name="toplevel.jhd"/>
|
|
<outfile xil_pn:name="toplevel.lso"/>
|
|
<outfile xil_pn:name="toplevel.ngc"/>
|
|
<outfile xil_pn:name="toplevel.ngr"/>
|
|
<outfile xil_pn:name="toplevel.prj"/>
|
|
<outfile xil_pn:name="toplevel.stx"/>
|
|
<outfile xil_pn:name="toplevel.syr"/>
|
|
<outfile xil_pn:name="toplevel.xst"/>
|
|
<outfile xil_pn:name="toplevel_xst.xrpt"/>
|
|
<outfile xil_pn:name="webtalk_pn.xml"/>
|
|
<outfile xil_pn:name="xst"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744766" xil_pn:in_ck="4242637380" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="4784894232377633197" xil_pn:start_ts="1463744766">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744772" xil_pn:in_ck="2169537708537049843" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-1538882668640856751" xil_pn:start_ts="1463744766">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<outfile xil_pn:name="_ngo"/>
|
|
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
|
<outfile xil_pn:name="toplevel.bld"/>
|
|
<outfile xil_pn:name="toplevel.ngd"/>
|
|
<outfile xil_pn:name="toplevel_ngdbuild.xrpt"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744783" xil_pn:in_ck="1621356785167787192" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="570889668722473129" xil_pn:start_ts="1463744772">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="WarningsGenerated"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<status xil_pn:value="OutOfDateForOutputs"/>
|
|
<status xil_pn:value="OutputChanged"/>
|
|
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
|
|
<outfile xil_pn:name="toplevel.pcf"/>
|
|
<outfile xil_pn:name="toplevel_map.map"/>
|
|
<outfile xil_pn:name="toplevel_map.mrp"/>
|
|
<outfile xil_pn:name="toplevel_map.ncd"/>
|
|
<outfile xil_pn:name="toplevel_map.ngm"/>
|
|
<outfile xil_pn:name="toplevel_map.xrpt"/>
|
|
<outfile xil_pn:name="toplevel_summary.xml"/>
|
|
<outfile xil_pn:name="toplevel_usage.xml"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744826" xil_pn:in_ck="985354266144665770" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-988662182046631445" xil_pn:start_ts="1463744783">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
|
|
<outfile xil_pn:name="toplevel.ncd"/>
|
|
<outfile xil_pn:name="toplevel.pad"/>
|
|
<outfile xil_pn:name="toplevel.par"/>
|
|
<outfile xil_pn:name="toplevel.ptwx"/>
|
|
<outfile xil_pn:name="toplevel.unroutes"/>
|
|
<outfile xil_pn:name="toplevel.xpi"/>
|
|
<outfile xil_pn:name="toplevel_pad.csv"/>
|
|
<outfile xil_pn:name="toplevel_pad.txt"/>
|
|
<outfile xil_pn:name="toplevel_par.xrpt"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744842" xil_pn:in_ck="8640606860472830956" xil_pn:name="TRANEXT_bitFile_spartan3a" xil_pn:prop_ck="-426368325978129584" xil_pn:start_ts="1463744826">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
|
|
<outfile xil_pn:name="toplevel.bgn"/>
|
|
<outfile xil_pn:name="toplevel.bit"/>
|
|
<outfile xil_pn:name="toplevel.drc"/>
|
|
<outfile xil_pn:name="toplevel.ut"/>
|
|
<outfile xil_pn:name="usage_statistics_webtalk.html"/>
|
|
<outfile xil_pn:name="webtalk.log"/>
|
|
<outfile xil_pn:name="webtalk_pn.xml"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463743826" xil_pn:in_ck="6038244062278931960" xil_pn:name="TRAN_configureTargetDevice" xil_pn:prop_ck="5767926783713760761" xil_pn:start_ts="1463743825">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<status xil_pn:value="OutOfDateForInputs"/>
|
|
<status xil_pn:value="InputChanged"/>
|
|
</transform>
|
|
<transform xil_pn:end_ts="1463744826" xil_pn:in_ck="6034042283462732464" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1463744821">
|
|
<status xil_pn:value="SuccessfullyRun"/>
|
|
<status xil_pn:value="ReadyToRun"/>
|
|
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
|
|
<outfile xil_pn:name="toplevel.twr"/>
|
|
<outfile xil_pn:name="toplevel.twx"/>
|
|
</transform>
|
|
</transforms>
|
|
|
|
</generated_project>
|