aaron/vhdl-yasg

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T-moe 0d566ce4de Debounced rotary button

2016-06-13 13:28:09 +02:00

Disabled warnings which are not relevant for us

2016-06-12 22:48:27 +02:00

Fixed lcd driver testbench, added more screenshots

2016-06-13 11:19:14 +02:00

.gitignore

Disabled warnings which are not relevant for us

2016-06-12 22:48:27 +02:00

controller_tb.vhd

Fixed controller lcd output by adding edge detection on lcd_busy. added testbench for controller.

2016-06-06 20:44:55 +02:00

controller.sym

Simplified Rotary Encoder

2016-06-10 12:29:27 +02:00

controller.vhd

Simplified Rotary Encoder

2016-06-10 12:29:27 +02:00

dds_tb.vhd

Finalized first version of dds.

2016-05-17 12:25:10 +02:00

dds.sym

Added toplevel schema. DDS works at 1khz. Measured with oscilloscope

2016-05-20 13:53:56 +02:00

dds.vhd

Modified dds so that if freq=0 output is also zero.

2016-06-13 12:15:39 +02:00

helpers.vhd

Some experiments with dds. probably useless.

2016-05-16 15:30:18 +02:00

io.ucf

Extended controller so that waveform is printed. added reset button to toplevel schema.

2016-06-10 10:58:27 +02:00

lcd_driver_tb.vhd

Fixed lcd driver testbench, added more screenshots

2016-06-13 11:19:14 +02:00

lcd_driver.sym

Added autoincrement ability and updated top level schematic.

2016-06-06 21:43:25 +02:00

lcd_driver.vhd

Disabled cursor blinking, added cursor repositioning hack. Display works now.

2016-06-10 11:21:43 +02:00

LICENSE

Initial commit

2016-05-09 19:17:21 +02:00

README.md

Initial commit

2016-05-09 19:17:21 +02:00

rotary_dec.sym

Debounced rotary button

2016-06-13 13:28:09 +02:00

rotary.vhd

Debounced rotary button

2016-06-13 13:28:09 +02:00

simulate_display_init.wcfg

Implemented init conif and simulation.

2016-05-23 20:18:20 +02:00

spi_driver_tb.vhd

Added SPI driver.

2016-05-17 15:57:43 +02:00

spi_driver.sym

Added toplevel schema. DDS works at 1khz. Measured with oscilloscope

2016-05-20 13:53:56 +02:00

spi_driver.vhd

Simplified SPI driver. Uses no multiplexer now, but a d-ff.

2016-05-24 11:32:48 +02:00

toplevel.jhd

Debounced rotary button

2016-06-13 13:28:09 +02:00

toplevel.sch

Debounced rotary button

2016-06-13 13:28:09 +02:00

yasg.xise

Fixed lcd driver testbench, added more screenshots

2016-06-13 11:19:14 +02:00

README.md

vhdl-yasg

YASG is yet another signal generator, written in vhdl. It uses Direct Digital Synthesis (DDS) for signal generation. The hardware used will be a Xilinx Spartan-3AN eval board which brings a 12bit analog to digital converter. The boards rotary encoder is used as primary input (choosing signal form and frequency) and the 16x2 LC-Display as optical output.

Used hardware

Xilinx Spartan-3AN Eval Board

Used software

Xilinx
Git
LibreOffice
VIM