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Extended controller a bit so that the user can change the digit pos.

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T-moe
2016-06-03 15:20:32 +02:00
parent 17fa0fb90f
commit ecdaaccee5
6 changed files with 152 additions and 119 deletions
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30
controller.vhd
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@@ -34,33 +34,57 @@ entity controller is
rst: in STD_LOGIC;
enc_updown : in STD_LOGIC;
enc_ce : in STD_LOGIC;
enc_btn: in STD_LOGIC;
enc_err : in STD_LOGIC;
freq_out : out unsigned (16 downto 0));
end controller;
architecture Behavioral of controller is
signal freq_reg, freq_next : unsigned(16 downto 0) := to_unsigned(1000,17);
signal digpos_reg, digpos_next : unsigned(2 downto 0) := to_unsigned(0,3);
signal btn_old_reg, btn_old_next : std_logic := '0';
type storage is array (4 downto 0) of unsigned (16 downto 0);
constant bases : storage := (to_unsigned(1,17),to_unsigned(10,17),
to_unsigned(100,17),to_unsigned(1000,17),
to_unsigned(10000,17));
signal digpos_base : unsigned(16 downto 0);
begin
proc1: process(clk,rst)
begin
if(rst='1') then
freq_reg <= to_unsigned(1000,17);
digpos_reg <= to_unsigned(0,3);
btn_old_reg <= '0';
elsif(rising_edge(clk)) then
freq_reg <= freq_next;
digpos_reg <= digpos_next;
btn_old_reg <= btn_old_next;
end if;
end process proc1;
freq_out <= freq_reg;
digpos_base <= bases(to_integer(digpos_reg));
proc2: process(freq_reg,enc_updown,enc_ce,enc_err)
proc2: process(freq_reg,enc_updown,enc_ce,enc_err,enc_btn,digpos_reg,digpos_base,btn_old_reg)
begin
freq_next <= freq_reg;
digpos_next <= digpos_reg;
btn_old_next <= enc_btn;
if(enc_ce='1' and enc_err='0') then
if(enc_updown='1') then
freq_next <= freq_reg + 1;
freq_next <= freq_reg + digpos_base;
else
freq_next <= freq_reg - 1;
freq_next <= freq_reg - digpos_base;
end if;
elsif(enc_btn ='1' and btn_old_reg='0') then
if(digpos_reg = to_unsigned(4,3)) then
digpos_next <= to_unsigned(0,3);
else
digpos_next <= digpos_reg + 1;
end if;
end if;