Added complex statemachine to init display and fill it with data.
This commit is contained in:
107
controller.vhd
107
controller.vhd
@@ -44,6 +44,18 @@ entity controller is
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end controller;
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architecture Behavioral of controller is
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type states is(S_WAIT,
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S_FORM_PREF, -- prints the form prefix ("Form:")
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S_FREQ_PREF, -- frequenz prefix ("Freq: 00000 Hz")
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S_FORM_CONT, -- form content ("Rechteck, Sinus...")
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S_FREQ_CONT, -- frequenz content ("-----")
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S_IDLE );
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signal state_reg, state_next : states := S_WAIT;
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signal ret_state_reg, ret_state_next: states := S_FORM_PREF;
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--digitnr which is currently edited 0-4
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signal digpos_reg, digpos_next : unsigned(2 downto 0) := (others => '0');
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-- for edge detection on btn
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@@ -58,8 +70,17 @@ architecture Behavioral of controller is
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signal lcd_newpos_reg,lcd_newpos_next : std_logic := '0';
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signal lcd_data_reg, lcd_data_next: unsigned(7 downto 0) :=(others => '0');
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type character_array is array (0 to 15) of character;
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constant line1 : character_array := ( 'h', 'e', 'l','l','o',' ', 'A', 'a', 'r', 'o', 'n', others=> ' ' );
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type character_array1 is array (0 to 7) of character;
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constant str_form_pref : character_array1 := ( 'F', 'o', 'r','m',':', others => ' ' );
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type character_array2 is array (0 to 15) of character;
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constant str_freq_pref : character_array2 := ( 'F', 'r', 'e','q',':',' ','0','0','0','0','0',' ','H','z', others => ' ' );
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--type character_array is array (0 to 15) of character;
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--constant line1 : character_array := ( 'h', 'e', 'l','l','o',' ', 'A', 'a', 'r', 'o', 'n', others=> ' ' );
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-- for edge detection on lcd_busy
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signal busy_old_reg, busy_old_next : std_logic := '0';
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@@ -83,6 +104,9 @@ begin
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busy_old_reg <= '0';
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freq_out_reg <=(others => '0');
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state_reg <= S_WAIT;
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ret_state_reg <= S_FORM_PREF;
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elsif(rising_edge(clk)) then
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digpos_reg <= digpos_next;
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digit_reg <= digit_next;
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@@ -95,6 +119,9 @@ begin
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busy_old_reg <= busy_old_next;
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freq_out_reg <= freq_out_next;
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state_reg <= state_next;
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ret_state_reg <= ret_state_next;
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end if;
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end process proc1;
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@@ -105,7 +132,7 @@ begin
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lcd_newchar <= lcd_newchar_reg;
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lcd_newpos <= lcd_newpos_reg;
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proc2: process(digit_reg,enc_updown,enc_ce,enc_err,enc_btn,digpos_reg,btn_old_reg, charcnt_reg, lcd_busy, lcd_data_reg, busy_old_reg)
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NSL: process(digit_reg,enc_updown,enc_ce,enc_err,enc_btn,digpos_reg,btn_old_reg, charcnt_reg, lcd_busy, lcd_data_reg, busy_old_reg, state_reg, ret_state_reg)
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begin
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digit_next <= digit_reg;
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digpos_next <= digpos_reg;
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@@ -117,6 +144,9 @@ begin
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lcd_data_next <= lcd_data_reg;
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busy_old_next <= lcd_busy;
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state_next <= state_reg;
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ret_state_next <= ret_state_reg;
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-- The next statement produces two warnings which can be safely ignored:
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-- xst:643 - The result of a <...>-bit multiplication is partially used...
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freq_out_next <= resize(
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@@ -127,27 +157,86 @@ begin
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+ resize(digit_reg(4) ,14) * 10000
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, 17);
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case state_reg is
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when S_WAIT => -- switch on current state
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if(lcd_busy = '0' and busy_old_reg ='1' ) then
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state_next<= ret_state_reg;
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end if;
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when S_FORM_PREF =>
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state_next <= S_WAIT;
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if(charcnt_reg < 7 ) then
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charcnt_next <= charcnt_reg + 1;
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ret_state_next <= S_FORM_PREF;
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lcd_data_next <= to_unsigned(character'pos(str_form_pref(to_integer(charcnt_reg))),8);
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lcd_newchar_next <= '1';
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else
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charcnt_next <= (others => '0');
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lcd_data_next <= x"C0";
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lcd_newpos_next <= '1';
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ret_state_next <= S_FREQ_PREF;
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end if;
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when S_FREQ_PREF =>
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if(charcnt_reg < 15 ) then
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charcnt_next <= charcnt_reg + 1;
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state_next <= S_WAIT;
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ret_state_next <= S_FREQ_PREF;
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lcd_data_next <= to_unsigned(character'pos(str_freq_pref(to_integer(charcnt_reg))),8);
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lcd_newchar_next <= '1';
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else
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charcnt_next <= (others => '0');
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state_next <= S_IDLE;
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end if;
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when S_FORM_CONT =>
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state_next <= S_WAIT;
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when S_FREQ_CONT =>
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state_next <= S_WAIT;
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if(charcnt_reg < 1 ) then
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charcnt_next <= charcnt_reg + 1;
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ret_state_next <= S_FREQ_CONT;
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lcd_data_next <= x"4A" - digpos_reg;
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lcd_newpos_next <= '1';
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else
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ret_state_next <= S_IDLE;
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charcnt_next <= (others => '0');
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lcd_data_next <= to_unsigned(character'pos('0'),8) + digit_reg(to_integer(digpos_reg));
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lcd_newchar_next <= '1';
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end if;
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when S_IDLE =>
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if(enc_ce='1' and enc_err='0') then
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if(enc_updown='1') then
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digit_next(to_integer(digpos_reg)) <= digit_reg(to_integer(digpos_reg)) + 1;
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else
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digit_next(to_integer(digpos_reg)) <= digit_reg(to_integer(digpos_reg)) -1;
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end if;
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state_next <= S_FREQ_CONT;
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elsif(enc_btn ='1' and btn_old_reg='0') then
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if(digpos_reg = to_unsigned(4,3)) then
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digpos_next <= to_unsigned(0,3);
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else
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digpos_next <= digpos_reg + 1;
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end if;
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state_next <= S_FREQ_CONT;
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end if;
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if(lcd_busy = '0' and busy_old_reg ='1' and charcnt_reg < 15) then
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lcd_data_next <= to_unsigned(character'pos(line1(to_integer(charcnt_reg))),8);
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lcd_newchar_next <= '1';
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charcnt_next <= charcnt_reg + 1;
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end if;
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end process proc2;
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when others => null; -- do nothing, if we are in a different state
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end case;
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-- if(lcd_busy = '0' and busy_old_reg ='1' and charcnt_reg < 15) then
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-- lcd_data_next <= to_unsigned(character'pos(line1(to_integer(charcnt_reg))),8);
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-- lcd_newchar_next <= '1';
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-- charcnt_next <= charcnt_reg + 1;
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-- end if;
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end process NSL;
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end Behavioral;
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