Initial commit, project files and example
This commit is contained in:
id101010
98
src/main.c
Normal file
98
src/main.c
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@@ -0,0 +1,98 @@
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/*****************************************************************************
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* Copyright © 2013, Bern University of Applied Sciences.
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* All rights reserved.
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*
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* ##### GNU GENERAL PUBLIC LICENSE
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||||
*
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* This program is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
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||||
* of the License, or (at your option) any later version.
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||||
*
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||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*
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*****************************************************************************/
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#include <stm32f4xx.h> // Processor STM32F407IG
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#include <carme.h> // CARME Module
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#include <lcd.h>
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#include <lcd_lld.h>
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#include <color.h>
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#include <stm32f4xx_adc.h>
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#define SPEED 500000
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uint16_t colors[] = {
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GUI_COLOR_BLACK,
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GUI_COLOR_WHITE,
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GUI_COLOR_LIGHT_GRAY,
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GUI_COLOR_DARK_GREY,
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GUI_COLOR_RED,
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GUI_COLOR_YELLOW,
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GUI_COLOR_ORANGE,
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GUI_COLOR_BROWN,
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GUI_COLOR_GREEN,
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GUI_COLOR_CYAN,
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GUI_COLOR_BLUE,
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GUI_COLOR_PINK,
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GUI_COLOR_MAGENTA
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};
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volatile unsigned char* LED = (volatile unsigned char*)0x6C000200;
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volatile unsigned char* SWITCH = (volatile unsigned char*)0x6C000400;
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GPIO_InitTypeDef g;
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void init_gpio(void)
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{
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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g.GPIO_Pin = GPIO_Pin_0;
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g.GPIO_Mode = GPIO_Mode_OUT;
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g.GPIO_OType = GPIO_OType_PP;
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g.GPIO_Speed = GPIO_Speed_2MHz;
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g.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(GPIOA, &g);
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}
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int main(void)
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{
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int i = 0, j = 0, m = 0;
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*LED = 0b00000001;
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LCD_Init();
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init_gpio();
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LCD_Clear(GUI_COLOR_RED);
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while(1){
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for(m = 0; (m <= 12); m++){
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LCD_Clear(colors[m]);
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GPIO_WriteBit(GPIOA, GPIO_Pin_0, 1);
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for(i = 0; i < 7; i++){
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*LED<<=1;
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for(j = 0; j < SPEED; j++);
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}
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GPIO_WriteBit(GPIOA, GPIO_Pin_0, 0);
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for(i = 7; i > 0; i--){
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*LED>>=1;
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for(j = 0; j < SPEED; j++);
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}
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}
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}
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return 0;
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}
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564
src/startup.s
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564
src/startup.s
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@@ -0,0 +1,564 @@
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/**
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*****************************************************************************
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*
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* @file startup.s
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* @version 1.0
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* @date 2013-01-28
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* @author rct1
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*
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* @brief Startup code and interrupt vector table.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions
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* ISR address
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* - Configure the clock system
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M4 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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*
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*****************************************************************************
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* @copyright
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* @{
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* Copyright © 2013, Bern University of Applied Sciences.
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* All rights reserved.
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*
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* ##### GNU GENERAL PUBLIC LICENSE
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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* @}
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*****************************************************************************
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*/
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* Define Address spaces. defined in linker script. */
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.word _sidata /* start address for the initialization values of the
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.data section. */
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.word _sdata /* start address for the .data section. */
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.word _edata /* end address for the .data section. */
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.word _sbss /* start address for the .bss section. */
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.word _ebss /* end address for the .bss section. */
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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/*----- Section .text.Reset_Handler ----------------------------------------*/
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/**
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* \brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the
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* absolutely necessary set is performed, after which the
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* application supplied main() routine is called.
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Copy the data segment initializers from flash to SRAM */
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MOVS r1, #0
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B LoopCopyDataInit
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CopyDataInit:
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LDR r3, =_sidata
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LDR r3, [r3, r1]
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STR r3, [r0, r1]
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ADDS r1, r1, #4
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LoopCopyDataInit:
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LDR r0, =_sdata
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LDR r3, =_edata
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ADDS r2, r0, r1
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CMP r2, r3
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BCC CopyDataInit
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LDR r2, =_sbss
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B LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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MOVS r3, #0
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STR r3, [r2], #4
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LoopFillZerobss:
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LDR r3, =_ebss
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CMP r2, r3
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BCC FillZerobss
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BL SystemInit /* Call the clock system initialization */
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BL CARME_Init /* Call the CARME-M4 board initialization */
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BL __libc_init_array /* Call static constructors */
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BL main /* Call the application's entry point */
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ProgramFinish:
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B ProgramFinish /* while true do nothing */
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.size Reset_Handler, .-Reset_Handler
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/*----- Section .text.Default_Handler --------------------------------------*/
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/**
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* \brief This is the code that gets called when the processor
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* receives an unexpected interrupt. This simply enters an
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* infinite loop, preserving the system state for examination
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* by a debugger.
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*/
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.section .text.Default_Handler, "ax", %progbits
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dowait:
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LDR r0, =0xA037A0
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dowaitloop:
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SUBS r0, #1
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BNE dowaitloop
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BX lr
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Default_Handler:
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LDR r1, =0x40023800 // RCC_BASE
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LDR r3, [r1, #0x30] // RCC->AHB1ENR
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LDR r2, =0x100 // RCC_AHB1Periph_GPIOI
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ORR r3, r3, r2 // RCC->AHB1ENR |= RCC_AHB1Periph_GPIOI
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STR r3, [r1, #0x30]
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LDR r1, =0x40022000 // GPIOI_BASE
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/* GPIO port mode register */
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LDR r3, [r1, #0x00] // GPIOI->MODER
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LDR r2, =0x0000C000
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BIC r3, r3, r2
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LDR r2, =0x00004000
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ORR r3, r3, r2
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STR r3, [r1, #0x00]
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/* GPIO port output type register */
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LDR r3, [r1, #0x04] // GPIOI->OTYPER
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LDR r2, =0x00000080
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BIC r3, r3, r2
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STR r3, [r1, #0x04]
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/* GPIO port output speed register */
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LDR r3, [r1, #0x08] // GPIOI->OSPEEDR
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LDR r2, =0x0000C000
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BIC r3, r3, r2
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STR r3, [r1, #0x08]
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/* GPIO port pull-up/pull-down register */
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LDR r3, [r1, #0x0C] // GPIOI->PUPDR
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LDR r2, =0x0000C000
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BIC r3, r3, r2
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STR r3, [r1, #0x0C]
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/* GPIO port output data register */
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LDR r3, [r1, #0x14] // GPIOI->ODR
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LDR r2, =0x00000080
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Infinite_Loop:
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ORR r3, r3, r2
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STR r3, [r1, #0x14] // Set LED
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BL dowait
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BIC r3, r3, r2
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STR r3, [r1, #0x14] // Reset LED
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BL dowait
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B Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/*----- Section .isr_vector ------------------------------------------------*/
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/**
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* \brief The minimal vector table for a Cortex M4. Note that the
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* proper constructs must be placed on this to ensure that it
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* ends up at physical address 0x0000.0000.
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*/
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.section .isr_vector, "a", %progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WWDG_IRQHandler /* Window WatchDog */
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.word PVD_IRQHandler /* PVD through EXTI Line detection */
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.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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.word FLASH_IRQHandler /* FLASH */
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.word RCC_IRQHandler /* RCC */
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.word EXTI0_IRQHandler /* EXTI Line0 */
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.word EXTI1_IRQHandler /* EXTI Line1 */
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.word EXTI2_IRQHandler /* EXTI Line2 */
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.word EXTI3_IRQHandler /* EXTI Line3 */
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.word EXTI4_IRQHandler /* EXTI Line4 */
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.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
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.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
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.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
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.word CAN1_TX_IRQHandler /* CAN1 TX */
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.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* CAN1 SCE */
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.word EXTI9_5_IRQHandler /* External Line[9:5]s */
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.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
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.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
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.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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.word TIM4_IRQHandler /* TIM4 */
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.word I2C1_EV_IRQHandler /* I2C1 Event */
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.word I2C1_ER_IRQHandler /* I2C1 Error */
|
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.word I2C2_EV_IRQHandler /* I2C2 Event */
|
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.word I2C2_ER_IRQHandler /* I2C2 Error */
|
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.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FSMC_IRQHandler /* FSMC */
|
||||
.word SDIO_IRQHandler /* SDIO */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word ETH_IRQHandler /* Ethernet */
|
||||
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word CRYP_IRQHandler /* CRYP crypto */
|
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
|
||||
/**
|
||||
* \brief Provide weak aliases for each Exception handler to the
|
||||
* Default_Handler. As they are weak aliases, any function
|
||||
* with the same name will override this definition.
|
||||
*/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler, Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler, Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler, Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler, Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler, Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler, Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler, Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler, Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler, Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler, Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler, Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler, Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler, Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler, Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler, Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler, Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler, Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler, Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler, Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler, Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler, Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler, Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler, Default_Handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler, Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler, Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler, Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler, Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler, Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler, Default_Handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler, Default_Handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler, Default_Handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler, Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler, Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler, Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler, Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler, Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler, Default_Handler
|
||||
|
||||
.weak CRYP_IRQHandler
|
||||
.thumb_set CRYP_IRQHandler, Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler, Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler, Default_Handler
|
||||
|
||||
.weak vApplicationMallocFailedHook
|
||||
.thumb_set vApplicationMallocFailedHook, Default_Handler
|
||||
|
||||
.weak vApplicationStackOverflowHook
|
||||
.thumb_set vApplicationStackOverflowHook, Default_Handler
|
||||
237
src/syscalls.c
Normal file
237
src/syscalls.c
Normal file
@@ -0,0 +1,237 @@
|
||||
/**
|
||||
*****************************************************************************
|
||||
* @addtogroup CARME
|
||||
* @{
|
||||
* @addtogroup USART
|
||||
* @{
|
||||
*
|
||||
* @file syscalls.c
|
||||
*
|
||||
* @brief Atollic TrueSTUDIO Minimal System calls file\n
|
||||
* For more information about which c-functions need which of
|
||||
* these lowlevel functions please consult the Newlib
|
||||
* libc-manual.
|
||||
*
|
||||
*****************************************************************************
|
||||
* @copyright
|
||||
* @{
|
||||
*
|
||||
* The file is distributed as is, without any warranty of any kind.
|
||||
*
|
||||
* © Copyright Atollic AB.
|
||||
* You may use this file as-is or modify it according to the needs of your
|
||||
* project. This file may only be built (assembled or compiled and linked)
|
||||
* using the Atollic TrueSTUDIO(R) product. The use of this file together
|
||||
* with other tools than Atollic TrueSTUDIO(R) is not permitted.
|
||||
*
|
||||
* @}
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/*----- Header-Files -------------------------------------------------------*/
|
||||
#include <stdint.h>
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
#include <stm32f4xx.h>
|
||||
|
||||
/*----- Macros -------------------------------------------------------------*/
|
||||
#ifndef SYSCALL_USART
|
||||
#define SYSCALL_USART USART1 /**< The IO USART to use in syscall */
|
||||
#endif
|
||||
|
||||
/*----- Data types ---------------------------------------------------------*/
|
||||
|
||||
/*----- Function prototypes ------------------------------------------------*/
|
||||
void initialise_monitor_handles(void);
|
||||
int _getpid(void);
|
||||
int _kill(int32_t pid, int32_t sig);
|
||||
void _exit(int32_t status);
|
||||
int _write(int fd, char *str, int len);
|
||||
caddr_t _sbrk(int32_t incr);
|
||||
int _close(int32_t file);
|
||||
int _fstat(int32_t file, struct stat *st);
|
||||
int _isatty(int32_t file);
|
||||
int _lseek(int32_t file, int32_t ptr, int32_t dir);
|
||||
int _read(int32_t file, uint8_t *ptr, int32_t len);
|
||||
int _open(uint8_t *path, int32_t flags, ...);
|
||||
int _wait(int32_t *status);
|
||||
int _unlink(uint8_t *name);
|
||||
int _times(struct tms *buf);
|
||||
int _stat(uint8_t *file, struct stat *st);
|
||||
int _link(uint8_t *old, uint8_t *new);
|
||||
int _fork(void);
|
||||
int _execve(uint8_t *name, uint8_t **argv, uint8_t **env);
|
||||
|
||||
/*----- Data ---------------------------------------------------------------*/
|
||||
#undef errno
|
||||
extern int32_t errno;
|
||||
|
||||
uint8_t *__env[1] = { 0 };
|
||||
uint8_t **environ = __env;
|
||||
|
||||
/*----- Implementation -----------------------------------------------------*/
|
||||
void initialise_monitor_handles(void) {
|
||||
}
|
||||
|
||||
int _getpid(void) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int32_t pid, int32_t sig) {
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit(int32_t status) {
|
||||
_kill(status, -1);
|
||||
while (1) {
|
||||
/* Make sure we hang here */
|
||||
}
|
||||
}
|
||||
|
||||
int _write(int fd, char *str, int len) {
|
||||
|
||||
uint8_t i = 0U;
|
||||
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
for (i = 0U; i < len; i++) {
|
||||
while (USART_GetFlagStatus(SYSCALL_USART, USART_FLAG_TC) == RESET) {
|
||||
}
|
||||
USART_SendData(SYSCALL_USART, (uint16_t) *str);
|
||||
str++;
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
caddr_t _sbrk(int32_t incr) {
|
||||
|
||||
extern uint32_t _Min_Heap_Size; /* _Min_Heap_Size symbol defined in the linker script. */
|
||||
extern uint8_t end asm("end");
|
||||
const uint8_t *max_heap = (uint8_t*) ((uint32_t) &end
|
||||
+ (uint32_t) &_Min_Heap_Size);
|
||||
static uint8_t *heap_end;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
if (heap_end == 0) {
|
||||
heap_end = &end;
|
||||
}
|
||||
|
||||
prev_heap_end = heap_end;
|
||||
if ((heap_end + incr) > max_heap) {
|
||||
/*
|
||||
write(1, "Heap and stack collision\n", 25);
|
||||
abort();
|
||||
*/
|
||||
errno = ENOMEM;
|
||||
return (caddr_t) -1;
|
||||
}
|
||||
|
||||
heap_end += incr;
|
||||
|
||||
return (caddr_t) prev_heap_end;
|
||||
}
|
||||
|
||||
int _close(int32_t file) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fstat(int32_t file, struct stat *st) {
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int32_t file) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int32_t file, int32_t ptr, int32_t dir) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _read(int32_t file, uint8_t *ptr, int32_t len) {
|
||||
|
||||
uint32_t i = 0U;
|
||||
uint16_t res = 0U;
|
||||
|
||||
if (ptr == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
for (i = 0U; i < len; i++) {
|
||||
|
||||
if (USART_GetFlagStatus(SYSCALL_USART, USART_FLAG_RXNE) == SET) {
|
||||
res = USART_ReceiveData(SYSCALL_USART);
|
||||
if (res <= 0xFF) {
|
||||
*ptr = (uint8_t) (res & 0xFF);
|
||||
ptr++;
|
||||
}
|
||||
}
|
||||
else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return (int) i;
|
||||
}
|
||||
|
||||
int _open(uint8_t *path, int32_t flags, ...) {
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int32_t *status) {
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(uint8_t *name) {
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(uint8_t *file, struct stat *st) {
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(uint8_t *old, uint8_t *new) {
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void) {
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(uint8_t *name, uint8_t **argv, uint8_t **env) {
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
||||
Reference in New Issue
Block a user