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164 lines
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<a href="#define-members">Macros</a> </div>
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<div class="headertitle">
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<div class="title">SPI_I2S_Legacy<div class="ingroups"><a class="el" href="group___s_t_m32_f4xx___std_periph___driver.html">STM32F4xx_StdPeriph_Driver</a> » <a class="el" href="group___s_p_i.html">SPI</a> » <a class="el" href="group___s_p_i___exported___constants.html">SPI_Exported_Constants</a></div></div> </div>
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Collaboration diagram for SPI_I2S_Legacy:</div>
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<div class="dyncontent">
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<center><table><tr><td><img src="group___s_p_i___i2_s___legacy.png" border="0" alt="" usemap="#group______s__p__i______i2__s______legacy"/>
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<map name="group______s__p__i______i2__s______legacy" id="group______s__p__i______i2__s______legacy">
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</div>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:gafb91bff0e91a2849f8977e3d4dfdeb52"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb91bff0e91a2849f8977e3d4dfdeb52"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_DMAReq_Tx</b>   SPI_I2S_DMAReq_Tx</td></tr>
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<tr class="separator:gafb91bff0e91a2849f8977e3d4dfdeb52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga225b89513a434bd33df7900a2514dbc0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga225b89513a434bd33df7900a2514dbc0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_DMAReq_Rx</b>   SPI_I2S_DMAReq_Rx</td></tr>
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<tr class="separator:ga225b89513a434bd33df7900a2514dbc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f0778617fc5f58086e4e29cd3781f18"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f0778617fc5f58086e4e29cd3781f18"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_IT_TXE</b>   SPI_I2S_IT_TXE</td></tr>
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<tr class="separator:ga6f0778617fc5f58086e4e29cd3781f18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c6ea3686830c60d9363f97a5d1011cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c6ea3686830c60d9363f97a5d1011cc"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_IT_RXNE</b>   SPI_I2S_IT_RXNE</td></tr>
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<tr class="separator:ga6c6ea3686830c60d9363f97a5d1011cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace6a9377da7f18ea8b5c73163c2278d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gace6a9377da7f18ea8b5c73163c2278d6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_IT_ERR</b>   SPI_I2S_IT_ERR</td></tr>
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<tr class="separator:gace6a9377da7f18ea8b5c73163c2278d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae99166c2b214fd7a9800a15eda36e4a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae99166c2b214fd7a9800a15eda36e4a0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_IT_OVR</b>   SPI_I2S_IT_OVR</td></tr>
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<tr class="separator:gae99166c2b214fd7a9800a15eda36e4a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7bd627ae57160a2f0aad1736194b5999"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7bd627ae57160a2f0aad1736194b5999"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_RXNE</b>   SPI_I2S_FLAG_RXNE</td></tr>
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<tr class="separator:ga7bd627ae57160a2f0aad1736194b5999"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf84a1e6af2739a6be58e1b23d9e6b914"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf84a1e6af2739a6be58e1b23d9e6b914"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_TXE</b>   SPI_I2S_FLAG_TXE</td></tr>
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<tr class="separator:gaf84a1e6af2739a6be58e1b23d9e6b914"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab45264da2296c75495a7437a045513ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab45264da2296c75495a7437a045513ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_OVR</b>   SPI_I2S_FLAG_OVR</td></tr>
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<tr class="separator:gab45264da2296c75495a7437a045513ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf19c77ee876a3598d616ac07d136fc46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf19c77ee876a3598d616ac07d136fc46"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_BSY</b>   SPI_I2S_FLAG_BSY</td></tr>
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<tr class="separator:gaf19c77ee876a3598d616ac07d136fc46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa9cee71d6fdb086e90cfe79fb572ee1d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa9cee71d6fdb086e90cfe79fb572ee1d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_DeInit</b>   <a class="el" href="group___s_p_i___group1.html#gabe36880945fa56785283a9c0092124cc">SPI_I2S_DeInit</a></td></tr>
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<tr class="separator:gaa9cee71d6fdb086e90cfe79fb572ee1d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga54555e80d1bbaca80906e4dcc27e1b67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54555e80d1bbaca80906e4dcc27e1b67"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_ITConfig</b>   <a class="el" href="group___s_p_i___group5.html#ga17f4ef132e8ddbf94cb6b1688d181e41">SPI_I2S_ITConfig</a></td></tr>
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<tr class="memitem:ga1e0a95be7beea23d6972d835b33d2bb5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e0a95be7beea23d6972d835b33d2bb5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_DMACmd</b>   <a class="el" href="group___s_p_i___group4.html#gabed5b91a8576e6d578f364cc0e807e4a">SPI_I2S_DMACmd</a></td></tr>
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<tr class="separator:ga1e0a95be7beea23d6972d835b33d2bb5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0647692e317283bc4c8ead37558b198"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0647692e317283bc4c8ead37558b198"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_SendData</b>   <a class="el" href="group___s_p_i___group2.html#gad5af40bebe8dbe3fa8bd476489d7e3da">SPI_I2S_SendData</a></td></tr>
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<tr class="memitem:ga62c3f7d78506b029ebb1845342e5bc05"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62c3f7d78506b029ebb1845342e5bc05"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_ReceiveData</b>   <a class="el" href="group___s_p_i___group2.html#gab77de76547f3bff403236b263b070a30">SPI_I2S_ReceiveData</a></td></tr>
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<tr class="memitem:ga188075bf183b67201651e20b227fe7a7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga188075bf183b67201651e20b227fe7a7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_GetFlagStatus</b>   <a class="el" href="group___s_p_i___group5.html#ga1bd785d129e09c5734a876c8f2767204">SPI_I2S_GetFlagStatus</a></td></tr>
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<tr class="memitem:ga9fde1f0c2f8d9f5690fe3d058d16ed5c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9fde1f0c2f8d9f5690fe3d058d16ed5c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_ClearFlag</b>   <a class="el" href="group___s_p_i___group5.html#ga3aabd9e2437e213056c0ed9bdfa1a724">SPI_I2S_ClearFlag</a></td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_GetITStatus</b>   <a class="el" href="group___s_p_i___group5.html#ga72decbc1cd79f8fad92a2204beca6bc5">SPI_I2S_GetITStatus</a></td></tr>
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<tr class="memitem:gab5f0a306ab6c4dc0775314f367fe935e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5f0a306ab6c4dc0775314f367fe935e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_ClearITPendingBit</b>   <a class="el" href="group___s_p_i___group5.html#ga35a524a49ff3d058137060f751e8749f">SPI_I2S_ClearITPendingBit</a></td></tr>
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<tr class="separator:gab5f0a306ab6c4dc0775314f367fe935e"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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