360 lines
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360 lines
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<a href="#define-members">Macros</a> |
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<a href="#func-members">Functions</a> </div>
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<div class="title">stm32f4xx_spi.c File Reference</div> </div>
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<p>This file provides firmware functions to manage the following functionalities of the Serial peripheral interface (SPI):
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<a href="#details">More...</a></p>
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<div class="textblock"><code>#include "<a class="el" href="stm32f4xx__spi_8h_source.html">stm32f4xx_spi.h</a>"</code><br />
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<code>#include "<a class="el" href="stm32f4xx__rcc_8h_source.html">stm32f4xx_rcc.h</a>"</code><br />
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Include dependency graph for stm32f4xx_spi.c:</div>
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<div class="center"><img src="stm32f4xx__spi_8c__incl.png" border="0" usemap="#discovery_2libs_2_stm_core_n_pheriph_2src_2stm32f4xx__spi_8c" alt=""/></div>
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</div>
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</div><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga8d425258898b4af4ebc820f52635fad8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d425258898b4af4ebc820f52635fad8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CR1_CLEAR_MASK</b>   ((uint16_t)0x3040)</td></tr>
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<tr class="separator:ga8d425258898b4af4ebc820f52635fad8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga441f8283b9c46535e05ae7e520728033"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga441f8283b9c46535e05ae7e520728033"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>I2SCFGR_CLEAR_MASK</b>   ((uint16_t)0xF040)</td></tr>
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<tr class="separator:ga441f8283b9c46535e05ae7e520728033"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7fb18a9c4bcfc2b92c8c58f6bfe99876"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fb18a9c4bcfc2b92c8c58f6bfe99876"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PLLCFGR_PPLR_MASK</b>   ((uint32_t)0x70000000)</td></tr>
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<tr class="separator:ga7fb18a9c4bcfc2b92c8c58f6bfe99876"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c3555ba01e070847f1475d2578332ed"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7c3555ba01e070847f1475d2578332ed"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PLLCFGR_PPLN_MASK</b>   ((uint32_t)0x00007FC0)</td></tr>
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<tr class="separator:ga7c3555ba01e070847f1475d2578332ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09e3f41fa2150831afaac191046087f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga09e3f41fa2150831afaac191046087f2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_CR2_FRF</b>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga09e3f41fa2150831afaac191046087f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac2a833b915e27cd63a5fc416d9002472"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2a833b915e27cd63a5fc416d9002472"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SPI_SR_TIFRFE</b>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gac2a833b915e27cd63a5fc416d9002472"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:gabe36880945fa56785283a9c0092124cc"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#gabe36880945fa56785283a9c0092124cc">SPI_I2S_DeInit</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx)</td></tr>
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<tr class="memdesc:gabe36880945fa56785283a9c0092124cc"><td class="mdescLeft"> </td><td class="mdescRight">De-initialize the SPIx peripheral registers to their default reset values. <a href="group___s_p_i___group1.html#gabe36880945fa56785283a9c0092124cc">More...</a><br /></td></tr>
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<tr class="separator:gabe36880945fa56785283a9c0092124cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8dacc1dc48bf08c0f12da409f4889037"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga8dacc1dc48bf08c0f12da409f4889037">SPI_Init</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, <a class="el" href="struct_s_p_i___init_type_def.html">SPI_InitTypeDef</a> *SPI_InitStruct)</td></tr>
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<tr class="memdesc:ga8dacc1dc48bf08c0f12da409f4889037"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the SPIx peripheral according to the specified parameters in the SPI_InitStruct. <a href="group___s_p_i___group1.html#ga8dacc1dc48bf08c0f12da409f4889037">More...</a><br /></td></tr>
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<tr class="separator:ga8dacc1dc48bf08c0f12da409f4889037"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53661884ae4a9640df7cbc59187782f7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga53661884ae4a9640df7cbc59187782f7">I2S_Init</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, <a class="el" href="struct_i2_s___init_type_def.html">I2S_InitTypeDef</a> *I2S_InitStruct)</td></tr>
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<tr class="memdesc:ga53661884ae4a9640df7cbc59187782f7"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the SPIx peripheral according to the specified parameters in the I2S_InitStruct. <a href="group___s_p_i___group1.html#ga53661884ae4a9640df7cbc59187782f7">More...</a><br /></td></tr>
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<tr class="separator:ga53661884ae4a9640df7cbc59187782f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a0116f88cc2c4478c270f05608703f1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga9a0116f88cc2c4478c270f05608703f1">SPI_StructInit</a> (<a class="el" href="struct_s_p_i___init_type_def.html">SPI_InitTypeDef</a> *SPI_InitStruct)</td></tr>
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<tr class="memdesc:ga9a0116f88cc2c4478c270f05608703f1"><td class="mdescLeft"> </td><td class="mdescRight">Fills each SPI_InitStruct member with its default value. <a href="group___s_p_i___group1.html#ga9a0116f88cc2c4478c270f05608703f1">More...</a><br /></td></tr>
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<tr class="separator:ga9a0116f88cc2c4478c270f05608703f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7470ec1d0759fdeeb42c7fe71a3b41b7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga7470ec1d0759fdeeb42c7fe71a3b41b7">I2S_StructInit</a> (<a class="el" href="struct_i2_s___init_type_def.html">I2S_InitTypeDef</a> *I2S_InitStruct)</td></tr>
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<tr class="memdesc:ga7470ec1d0759fdeeb42c7fe71a3b41b7"><td class="mdescLeft"> </td><td class="mdescRight">Fills each I2S_InitStruct member with its default value. <a href="group___s_p_i___group1.html#ga7470ec1d0759fdeeb42c7fe71a3b41b7">More...</a><br /></td></tr>
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<tr class="separator:ga7470ec1d0759fdeeb42c7fe71a3b41b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa31357879a65ee1ed7223f3b9114dcf3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#gaa31357879a65ee1ed7223f3b9114dcf3">SPI_Cmd</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gaa31357879a65ee1ed7223f3b9114dcf3"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified SPI peripheral. <a href="group___s_p_i___group1.html#gaa31357879a65ee1ed7223f3b9114dcf3">More...</a><br /></td></tr>
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<tr class="separator:gaa31357879a65ee1ed7223f3b9114dcf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe061c71bbc5b4224f3f2884dc53739e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#gafe061c71bbc5b4224f3f2884dc53739e">I2S_Cmd</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gafe061c71bbc5b4224f3f2884dc53739e"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified SPI peripheral (in I2S mode). <a href="group___s_p_i___group1.html#gafe061c71bbc5b4224f3f2884dc53739e">More...</a><br /></td></tr>
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<tr class="separator:gafe061c71bbc5b4224f3f2884dc53739e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc82e90841d7879535d655c035709cb1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#gafc82e90841d7879535d655c035709cb1">SPI_DataSizeConfig</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_DataSize)</td></tr>
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<tr class="memdesc:gafc82e90841d7879535d655c035709cb1"><td class="mdescLeft"> </td><td class="mdescRight">Configures the data size for the selected SPI. <a href="group___s_p_i___group1.html#gafc82e90841d7879535d655c035709cb1">More...</a><br /></td></tr>
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<tr class="separator:gafc82e90841d7879535d655c035709cb1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga166171c421fc51da7714723524d41b45"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga166171c421fc51da7714723524d41b45">SPI_BiDirectionalLineConfig</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_Direction)</td></tr>
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<tr class="memdesc:ga166171c421fc51da7714723524d41b45"><td class="mdescLeft"> </td><td class="mdescRight">Selects the data transfer direction in bidirectional mode for the specified SPI. <a href="group___s_p_i___group1.html#ga166171c421fc51da7714723524d41b45">More...</a><br /></td></tr>
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<tr class="separator:ga166171c421fc51da7714723524d41b45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56fc508a482f032f9eb80e4c63184126"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga56fc508a482f032f9eb80e4c63184126">SPI_NSSInternalSoftwareConfig</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_NSSInternalSoft)</td></tr>
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<tr class="memdesc:ga56fc508a482f032f9eb80e4c63184126"><td class="mdescLeft"> </td><td class="mdescRight">Configures internally by software the NSS pin for the selected SPI. <a href="group___s_p_i___group1.html#ga56fc508a482f032f9eb80e4c63184126">More...</a><br /></td></tr>
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<tr class="separator:ga56fc508a482f032f9eb80e4c63184126"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ec54abdedf6cd17403d853a926d91c1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga4ec54abdedf6cd17403d853a926d91c1">SPI_SSOutputCmd</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga4ec54abdedf6cd17403d853a926d91c1"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the SS output for the selected SPI. <a href="group___s_p_i___group1.html#ga4ec54abdedf6cd17403d853a926d91c1">More...</a><br /></td></tr>
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<tr class="separator:ga4ec54abdedf6cd17403d853a926d91c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74594bf32e3bf4905ac7a2deef8eb475"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga74594bf32e3bf4905ac7a2deef8eb475">SPI_TIModeCmd</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga74594bf32e3bf4905ac7a2deef8eb475"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the SPIx/I2Sx DMA interface. <a href="group___s_p_i___group1.html#ga74594bf32e3bf4905ac7a2deef8eb475">More...</a><br /></td></tr>
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<tr class="separator:ga74594bf32e3bf4905ac7a2deef8eb475"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60082947bedfe9efc233405be2a7bec2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group1.html#ga60082947bedfe9efc233405be2a7bec2">I2S_FullDuplexConfig</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *I2Sxext, <a class="el" href="struct_i2_s___init_type_def.html">I2S_InitTypeDef</a> *I2S_InitStruct)</td></tr>
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<tr class="memdesc:ga60082947bedfe9efc233405be2a7bec2"><td class="mdescLeft"> </td><td class="mdescRight">Configures the full duplex mode for the I2Sx peripheral using its extension I2Sxext according to the specified parameters in the I2S_InitStruct. <a href="group___s_p_i___group1.html#ga60082947bedfe9efc233405be2a7bec2">More...</a><br /></td></tr>
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<tr class="separator:ga60082947bedfe9efc233405be2a7bec2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab77de76547f3bff403236b263b070a30"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group2.html#gab77de76547f3bff403236b263b070a30">SPI_I2S_ReceiveData</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx)</td></tr>
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<tr class="memdesc:gab77de76547f3bff403236b263b070a30"><td class="mdescLeft"> </td><td class="mdescRight">Returns the most recent received data by the SPIx/I2Sx peripheral. <a href="group___s_p_i___group2.html#gab77de76547f3bff403236b263b070a30">More...</a><br /></td></tr>
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<tr class="separator:gab77de76547f3bff403236b263b070a30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5af40bebe8dbe3fa8bd476489d7e3da"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group2.html#gad5af40bebe8dbe3fa8bd476489d7e3da">SPI_I2S_SendData</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t Data)</td></tr>
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<tr class="memdesc:gad5af40bebe8dbe3fa8bd476489d7e3da"><td class="mdescLeft"> </td><td class="mdescRight">Transmits a Data through the SPIx/I2Sx peripheral. <a href="group___s_p_i___group2.html#gad5af40bebe8dbe3fa8bd476489d7e3da">More...</a><br /></td></tr>
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<tr class="separator:gad5af40bebe8dbe3fa8bd476489d7e3da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64f7276d119e6cb58afc100f8832adb0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group3.html#ga64f7276d119e6cb58afc100f8832adb0">SPI_CalculateCRC</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga64f7276d119e6cb58afc100f8832adb0"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the CRC value calculation of the transferred bytes. <a href="group___s_p_i___group3.html#ga64f7276d119e6cb58afc100f8832adb0">More...</a><br /></td></tr>
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<tr class="separator:ga64f7276d119e6cb58afc100f8832adb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace8b1058e09bab150b0dbe5978810273"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group3.html#gace8b1058e09bab150b0dbe5978810273">SPI_TransmitCRC</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx)</td></tr>
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<tr class="memdesc:gace8b1058e09bab150b0dbe5978810273"><td class="mdescLeft"> </td><td class="mdescRight">Transmit the SPIx CRC value. <a href="group___s_p_i___group3.html#gace8b1058e09bab150b0dbe5978810273">More...</a><br /></td></tr>
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<tr class="separator:gace8b1058e09bab150b0dbe5978810273"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c81c193516e82cf0a2fdc149ef20cc6"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group3.html#ga4c81c193516e82cf0a2fdc149ef20cc6">SPI_GetCRC</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint8_t SPI_CRC)</td></tr>
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<tr class="memdesc:ga4c81c193516e82cf0a2fdc149ef20cc6"><td class="mdescLeft"> </td><td class="mdescRight">Returns the transmit or the receive CRC register value for the specified SPI. <a href="group___s_p_i___group3.html#ga4c81c193516e82cf0a2fdc149ef20cc6">More...</a><br /></td></tr>
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<tr class="separator:ga4c81c193516e82cf0a2fdc149ef20cc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80fb9374cfce670f29128bb78568353f"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group3.html#ga80fb9374cfce670f29128bb78568353f">SPI_GetCRCPolynomial</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx)</td></tr>
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<tr class="memdesc:ga80fb9374cfce670f29128bb78568353f"><td class="mdescLeft"> </td><td class="mdescRight">Returns the CRC Polynomial register value for the specified SPI. <a href="group___s_p_i___group3.html#ga80fb9374cfce670f29128bb78568353f">More...</a><br /></td></tr>
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<tr class="separator:ga80fb9374cfce670f29128bb78568353f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabed5b91a8576e6d578f364cc0e807e4a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group4.html#gabed5b91a8576e6d578f364cc0e807e4a">SPI_I2S_DMACmd</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gabed5b91a8576e6d578f364cc0e807e4a"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the SPIx/I2Sx DMA interface. <a href="group___s_p_i___group4.html#gabed5b91a8576e6d578f364cc0e807e4a">More...</a><br /></td></tr>
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<tr class="separator:gabed5b91a8576e6d578f364cc0e807e4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17f4ef132e8ddbf94cb6b1688d181e41"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group5.html#ga17f4ef132e8ddbf94cb6b1688d181e41">SPI_I2S_ITConfig</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga17f4ef132e8ddbf94cb6b1688d181e41"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified SPI/I2S interrupts. <a href="group___s_p_i___group5.html#ga17f4ef132e8ddbf94cb6b1688d181e41">More...</a><br /></td></tr>
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<tr class="separator:ga17f4ef132e8ddbf94cb6b1688d181e41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bd785d129e09c5734a876c8f2767204"><td class="memItemLeft" align="right" valign="top">FlagStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group5.html#ga1bd785d129e09c5734a876c8f2767204">SPI_I2S_GetFlagStatus</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_I2S_FLAG)</td></tr>
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<tr class="memdesc:ga1bd785d129e09c5734a876c8f2767204"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the specified SPIx/I2Sx flag is set or not. <a href="group___s_p_i___group5.html#ga1bd785d129e09c5734a876c8f2767204">More...</a><br /></td></tr>
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<tr class="separator:ga1bd785d129e09c5734a876c8f2767204"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3aabd9e2437e213056c0ed9bdfa1a724"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group5.html#ga3aabd9e2437e213056c0ed9bdfa1a724">SPI_I2S_ClearFlag</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint16_t SPI_I2S_FLAG)</td></tr>
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<tr class="memdesc:ga3aabd9e2437e213056c0ed9bdfa1a724"><td class="mdescLeft"> </td><td class="mdescRight">Clears the SPIx CRC Error (CRCERR) flag. <a href="group___s_p_i___group5.html#ga3aabd9e2437e213056c0ed9bdfa1a724">More...</a><br /></td></tr>
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<tr class="separator:ga3aabd9e2437e213056c0ed9bdfa1a724"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga72decbc1cd79f8fad92a2204beca6bc5"><td class="memItemLeft" align="right" valign="top">ITStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group5.html#ga72decbc1cd79f8fad92a2204beca6bc5">SPI_I2S_GetITStatus</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint8_t SPI_I2S_IT)</td></tr>
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<tr class="memdesc:ga72decbc1cd79f8fad92a2204beca6bc5"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the specified SPIx/I2Sx interrupt has occurred or not. <a href="group___s_p_i___group5.html#ga72decbc1cd79f8fad92a2204beca6bc5">More...</a><br /></td></tr>
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<tr class="separator:ga72decbc1cd79f8fad92a2204beca6bc5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35a524a49ff3d058137060f751e8749f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___s_p_i___group5.html#ga35a524a49ff3d058137060f751e8749f">SPI_I2S_ClearITPendingBit</a> (<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *SPIx, uint8_t SPI_I2S_IT)</td></tr>
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<tr class="memdesc:ga35a524a49ff3d058137060f751e8749f"><td class="mdescLeft"> </td><td class="mdescRight">Clears the SPIx CRC Error (CRCERR) interrupt pending bit. <a href="group___s_p_i___group5.html#ga35a524a49ff3d058137060f751e8749f">More...</a><br /></td></tr>
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<tr class="separator:ga35a524a49ff3d058137060f751e8749f"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>This file provides firmware functions to manage the following functionalities of the Serial peripheral interface (SPI): </p>
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<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
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<dl class="section version"><dt>Version</dt><dd>V1.4.0 </dd></dl>
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<dl class="section date"><dt>Date</dt><dd>04-August-2014<ul>
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<li>Initialization and Configuration</li>
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<li>Data transfers functions</li>
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<li>Hardware CRC Calculation</li>
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<li>DMA transfers management</li>
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<li>Interrupts and flags management</li>
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</ul>
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</dd></dl>
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<pre class="fragment"> ===================================================================
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##### How to use this driver #####
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===================================================================
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[..]
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(#) Enable peripheral clock using the following functions
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE) for SPI1
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE) for SPI2
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) for SPI3
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) for SPI4
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) for SPI5
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) for SPI6.
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(#) Enable SCK, MOSI, MISO and NSS GPIO clocks using RCC_AHB1PeriphClockCmd()
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function. In I2S mode, if an external clock source is used then the I2S
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CKIN pin GPIO clock should also be enabled.
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(#) Peripherals alternate function:
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(++) Connect the pin to the desired peripherals' Alternate Function (AF)
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using GPIO_PinAFConfig() function
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(++) Configure the desired pin in alternate function by:
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GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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(++) Select the type, pull-up/pull-down and output speed via GPIO_PuPd,
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GPIO_OType and GPIO_Speed members
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(++) Call GPIO_Init() function In I2S mode, if an external clock source is
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used then the I2S CKIN pin should be also configured in Alternate
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function Push-pull pull-up mode.
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(#) Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
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Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
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function.
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In I2S mode, program the Mode, Standard, Data Format, MCLK Output, Audio
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frequency and Polarity using I2S_Init() function. For I2S mode, make sure
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that either:
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(++) I2S PLL is configured using the functions
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RCC_I2SCLKConfig(RCC_I2S2CLKSource_PLLI2S), RCC_PLLI2SCmd(ENABLE) and
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RCC_GetFlagStatus(RCC_FLAG_PLLI2SRDY); or
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(++) External clock source is configured using the function
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RCC_I2SCLKConfig(RCC_I2S2CLKSource_Ext) and after setting correctly
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the define constant I2S_EXTERNAL_CLOCK_VAL in the stm32f4xx_conf.h file.
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(#) Enable the NVIC and the corresponding interrupt using the function
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SPI_ITConfig() if you need to use interrupt mode.
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(#) When using the DMA mode
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(++) Configure the DMA using DMA_Init() function
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(++) Active the needed channel Request using SPI_I2S_DMACmd() function
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(#) Enable the SPI using the SPI_Cmd() function or enable the I2S using
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I2S_Cmd().
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(#) Enable the DMA using the DMA_Cmd() function when using DMA mode.
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(#) Optionally, you can enable/configure the following parameters without
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re-initialization (i.e there is no need to call again SPI_Init() function):
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(++) When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
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is programmed as Data direction parameter using the SPI_Init() function
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it can be possible to switch between SPI_Direction_Tx or SPI_Direction_Rx
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using the SPI_BiDirectionalLineConfig() function.
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(++) When SPI_NSS_Soft is selected as Slave Select Management parameter
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using the SPI_Init() function it can be possible to manage the
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NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
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(++) Reconfigure the data size using the SPI_DataSizeConfig() function
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(++) Enable or disable the SS output using the SPI_SSOutputCmd() function
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(#) To use the CRC Hardware calculation feature refer to the Peripheral
|
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CRC hardware Calculation subsection.
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[..] It is possible to use SPI in I2S full duplex mode, in this case, each SPI
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peripheral is able to manage sending and receiving data simultaneously
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using two data lines. Each SPI peripheral has an extended block called I2Sxext
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(ie. I2S2ext for SPI2 and I2S3ext for SPI3).
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The extension block is not a full SPI IP, it is used only as I2S slave to
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implement full duplex mode. The extension block uses the same clock sources
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as its master.
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To configure I2S full duplex you have to:
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(#) Configure SPIx in I2S mode (I2S_Init() function) as described above.
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(#) Call the I2S_FullDuplexConfig() function using the same strucutre passed to
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I2S_Init() function.
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(#) Call I2S_Cmd() for SPIx then for its extended block.
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(#) To configure interrupts or DMA requests and to get/clear flag status,
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use I2Sxext instance for the extension block.
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[..] Functions that can be called with I2Sxext instances are: I2S_Cmd(),
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I2S_FullDuplexConfig(), SPI_I2S_ReceiveData(), SPI_I2S_SendData(),
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SPI_I2S_DMACmd(), SPI_I2S_ITConfig(), SPI_I2S_GetFlagStatus(),
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SPI_I2S_ClearFlag(), SPI_I2S_GetITStatus() and SPI_I2S_ClearITPendingBit().
|
|
|
|
Example: To use SPI3 in Full duplex mode (SPI3 is Master Tx, I2S3ext is Slave Rx):
|
|
|
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
|
|
I2S_StructInit(&I2SInitStruct);
|
|
I2SInitStruct.Mode = I2S_Mode_MasterTx;
|
|
I2S_Init(SPI3, &I2SInitStruct);
|
|
I2S_FullDuplexConfig(SPI3ext, &I2SInitStruct)
|
|
I2S_Cmd(SPI3, ENABLE);
|
|
I2S_Cmd(SPI3ext, ENABLE);
|
|
...
|
|
while (SPI_I2S_GetFlagStatus(SPI2, SPI_FLAG_TXE) == RESET)
|
|
{}
|
|
SPI_I2S_SendData(SPI3, txdata[i]);
|
|
...
|
|
while (SPI_I2S_GetFlagStatus(I2S3ext, SPI_FLAG_RXNE) == RESET)
|
|
{}
|
|
rxdata[i] = SPI_I2S_ReceiveData(I2S3ext);
|
|
...
|
|
|
|
[..]
|
|
(@) In I2S mode: if an external clock is used as source clock for the I2S,
|
|
then the define I2S_EXTERNAL_CLOCK_VAL in file stm32f4xx_conf.h should
|
|
be enabled and set to the value of the source clock frequency (in Hz).
|
|
|
|
(@) In SPI mode: To use the SPI TI mode, call the function SPI_TIModeCmd()
|
|
just after calling the function SPI_Init().</pre><pre class="fragment">@attention
|
|
|
|
<h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
|
|
|
|
Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
|
You may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at:
|
|
|
|
http://www.st.com/software_license_agreement_liberty_v2
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.</pre></div></div><!-- contents -->
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