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Added doxygen output of current emulator branch.

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Timo Lang
2015-05-12 11:12:43 +02:00
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>USART_IT_ORE_RX</b>&#160;&#160;&#160;((uint16_t)0x0325) /* In case interrupt is generated if the RXNEIE bit is set */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>USART_IT_CTS</b>&#160;&#160;&#160;((uint16_t)0x096A)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>USART_IT_ORE_ER</b>&#160;&#160;&#160;((uint16_t)0x0360) /* In case interrupt is generated if the EIE bit is set */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>USART_IT_NE</b>&#160;&#160;&#160;((uint16_t)0x0260)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>USART_IT_FE</b>&#160;&#160;&#160;((uint16_t)0x0160)</td></tr>
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<tr class="memitem:ga37ce140eae1938a414ff32afed5ef236"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_USART_CONFIG_IT</b>(IT)</td></tr>
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<tr class="memitem:ga9a8014793a383d710eaaf4185f2b795d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_USART_GET_IT</b>(IT)</td></tr>
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<tr class="memitem:ga3ceda175140b84eea02a2261ebda4efd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_USART_CLEAR_IT</b>(IT)</td></tr>
<tr class="separator:ga3ceda175140b84eea02a2261ebda4efd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga3ceda175140b84eea02a2261ebda4efd"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
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<td class="memname">#define IS_USART_CLEAR_IT</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">IT</td><td>)</td>
<td></td>
</tr>
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<b>Value:</b><div class="fragment"><div class="line">(((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \</div>
<div class="line"> ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))</div>
</div><!-- fragment -->
</div>
</div>
<a class="anchor" id="ga37ce140eae1938a414ff32afed5ef236"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">#define IS_USART_CONFIG_IT</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">IT</td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">(((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \</div>
<div class="line"> ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \</div>
<div class="line"> ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \</div>
<div class="line"> ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))</div>
</div><!-- fragment -->
</div>
</div>
<a class="anchor" id="ga9a8014793a383d710eaaf4185f2b795d"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">#define IS_USART_GET_IT</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">IT</td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">(((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \</div>
<div class="line"> ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \</div>
<div class="line"> ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \</div>
<div class="line"> ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \</div>
<div class="line"> ((IT) == USART_IT_ORE_RX) || ((IT) == USART_IT_ORE_ER) || \</div>
<div class="line"> ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))</div>
</div><!-- fragment -->
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