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Added doxygen output of current emulator branch.

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Timo Lang
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<a href="#func-members">Functions</a> </div>
<div class="headertitle">
<div class="title">Internal and external clocks, PLL, CSS and MCO configuration functions<div class="ingroups"><a class="el" href="group___s_t_m32_f4xx___std_periph___driver.html">STM32F4xx_StdPeriph_Driver</a> &raquo; <a class="el" href="group___r_c_c.html">RCC</a> &raquo; <a class="el" href="group___r_c_c___private___functions.html">RCC_Private_Functions</a></div></div> </div>
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<p>Internal and external clocks, PLL, CSS and MCO configuration functions.
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<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga413f6422be11b1334abe60b3bff2e062"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga413f6422be11b1334abe60b3bff2e062">RCC_DeInit</a> (void)</td></tr>
<tr class="memdesc:ga413f6422be11b1334abe60b3bff2e062"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the RCC clock configuration to the default reset state. <a href="#ga413f6422be11b1334abe60b3bff2e062">More...</a><br /></td></tr>
<tr class="separator:ga413f6422be11b1334abe60b3bff2e062"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga523b06e73f6aa8a03e42299c855066a8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga523b06e73f6aa8a03e42299c855066a8">RCC_HSEConfig</a> (uint8_t RCC_HSE)</td></tr>
<tr class="memdesc:ga523b06e73f6aa8a03e42299c855066a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the External High Speed oscillator (HSE). <a href="#ga523b06e73f6aa8a03e42299c855066a8">More...</a><br /></td></tr>
<tr class="separator:ga523b06e73f6aa8a03e42299c855066a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0f15692614dd048ee4110a056f001dc"><td class="memItemLeft" align="right" valign="top">ErrorStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#gae0f15692614dd048ee4110a056f001dc">RCC_WaitForHSEStartUp</a> (void)</td></tr>
<tr class="memdesc:gae0f15692614dd048ee4110a056f001dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Waits for HSE start-up. <a href="#gae0f15692614dd048ee4110a056f001dc">More...</a><br /></td></tr>
<tr class="separator:gae0f15692614dd048ee4110a056f001dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2d6a35f5c2e0f86317c3beb222677fc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#gaa2d6a35f5c2e0f86317c3beb222677fc">RCC_AdjustHSICalibrationValue</a> (uint8_t HSICalibrationValue)</td></tr>
<tr class="memdesc:gaa2d6a35f5c2e0f86317c3beb222677fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adjusts the Internal High Speed oscillator (HSI) calibration value. <a href="#gaa2d6a35f5c2e0f86317c3beb222677fc">More...</a><br /></td></tr>
<tr class="separator:gaa2d6a35f5c2e0f86317c3beb222677fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c6772a1e43765909495f57815ef69e2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga0c6772a1e43765909495f57815ef69e2">RCC_HSICmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga0c6772a1e43765909495f57815ef69e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the Internal High Speed oscillator (HSI). <a href="#ga0c6772a1e43765909495f57815ef69e2">More...</a><br /></td></tr>
<tr class="separator:ga0c6772a1e43765909495f57815ef69e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65209ab5c3589b249c7d70f978735ca6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga65209ab5c3589b249c7d70f978735ca6">RCC_LSEConfig</a> (uint8_t RCC_LSE)</td></tr>
<tr class="memdesc:ga65209ab5c3589b249c7d70f978735ca6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the External Low Speed oscillator (LSE). <a href="#ga65209ab5c3589b249c7d70f978735ca6">More...</a><br /></td></tr>
<tr class="separator:ga65209ab5c3589b249c7d70f978735ca6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga81e3ca29fd154ac2019bba6936d6d5ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga81e3ca29fd154ac2019bba6936d6d5ed">RCC_LSICmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga81e3ca29fd154ac2019bba6936d6d5ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the Internal Low Speed oscillator (LSI). <a href="#ga81e3ca29fd154ac2019bba6936d6d5ed">More...</a><br /></td></tr>
<tr class="separator:ga81e3ca29fd154ac2019bba6936d6d5ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga154b93e90bfdede2a874244a1ff1002e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga154b93e90bfdede2a874244a1ff1002e">RCC_PLLConfig</a> (uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ)</td></tr>
<tr class="memdesc:ga154b93e90bfdede2a874244a1ff1002e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the main PLL clock source, multiplication and division factors. <a href="#ga154b93e90bfdede2a874244a1ff1002e">More...</a><br /></td></tr>
<tr class="separator:ga154b93e90bfdede2a874244a1ff1002e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84dee53c75e58fdb53571716593c2272"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga84dee53c75e58fdb53571716593c2272">RCC_PLLCmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga84dee53c75e58fdb53571716593c2272"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the main PLL. <a href="#ga84dee53c75e58fdb53571716593c2272">More...</a><br /></td></tr>
<tr class="separator:ga84dee53c75e58fdb53571716593c2272"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2efe493a6337d5e0034bfcdfb0f541e4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga2efe493a6337d5e0034bfcdfb0f541e4">RCC_PLLI2SCmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga2efe493a6337d5e0034bfcdfb0f541e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the PLLI2S. <a href="#ga2efe493a6337d5e0034bfcdfb0f541e4">More...</a><br /></td></tr>
<tr class="separator:ga2efe493a6337d5e0034bfcdfb0f541e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed7cbf4255d155c78a714a70752d14bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#gaed7cbf4255d155c78a714a70752d14bf">RCC_PLLSAIConfig</a> (uint32_t PLLSAIN, uint32_t PLLSAIQ, uint32_t PLLSAIR)</td></tr>
<tr class="memdesc:gaed7cbf4255d155c78a714a70752d14bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the PLLSAI clock multiplication and division factors. <a href="#gaed7cbf4255d155c78a714a70752d14bf">More...</a><br /></td></tr>
<tr class="separator:gaed7cbf4255d155c78a714a70752d14bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7b2c8f7533c8321dce97196d9f77fc1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#gaf7b2c8f7533c8321dce97196d9f77fc1">RCC_PLLSAICmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:gaf7b2c8f7533c8321dce97196d9f77fc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the PLLSAI. <a href="#gaf7b2c8f7533c8321dce97196d9f77fc1">More...</a><br /></td></tr>
<tr class="separator:gaf7b2c8f7533c8321dce97196d9f77fc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ff1fd7b9a8a49cdda11b7d7261c3494"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga0ff1fd7b9a8a49cdda11b7d7261c3494">RCC_ClockSecuritySystemCmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga0ff1fd7b9a8a49cdda11b7d7261c3494"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the Clock Security System. <a href="#ga0ff1fd7b9a8a49cdda11b7d7261c3494">More...</a><br /></td></tr>
<tr class="separator:ga0ff1fd7b9a8a49cdda11b7d7261c3494"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15c9ecb6ef015ed008cb28e5b7a50531"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#ga15c9ecb6ef015ed008cb28e5b7a50531">RCC_MCO1Config</a> (uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div)</td></tr>
<tr class="memdesc:ga15c9ecb6ef015ed008cb28e5b7a50531"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects the clock source to output on MCO1 pin(PA8). <a href="#ga15c9ecb6ef015ed008cb28e5b7a50531">More...</a><br /></td></tr>
<tr class="separator:ga15c9ecb6ef015ed008cb28e5b7a50531"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf50f10675b747de60c739e44e5c22aee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___group1.html#gaf50f10675b747de60c739e44e5c22aee">RCC_MCO2Config</a> (uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div)</td></tr>
<tr class="memdesc:gaf50f10675b747de60c739e44e5c22aee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects the clock source to output on MCO2 pin(PC9). <a href="#gaf50f10675b747de60c739e44e5c22aee">More...</a><br /></td></tr>
<tr class="separator:gaf50f10675b747de60c739e44e5c22aee"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p>Internal and external clocks, PLL, CSS and MCO configuration functions. </p>
<pre class="fragment"> ===================================================================================
##### Internal and external clocks, PLL, CSS and MCO configuration functions #####
===================================================================================
[..]
This section provide functions allowing to configure the internal/external clocks,
PLLs, CSS and MCO pins.
(#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
the PLL as System clock source.
(#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
clock source.
(#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
through the PLL as System clock source. Can be used also as RTC clock source.
(#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
(#) PLL (clocked by HSI or HSE), featuring two different output clocks:
(++) The first output is used to generate the high speed system clock (up to 168 MHz)
(++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
the random analog generator (&lt;=48 MHz) and the SDIO (&lt;= 48 MHz).
(#) PLLI2S (clocked by HSI or HSE), used to generate an accurate clock to achieve
high-quality audio performance on the I2S interface or SAI interface in case
of STM32F429x/439x devices.
(#) PLLSAI clocked by (HSI or HSE), used to generate an accurate clock to SAI
interface and LCD TFT controller available only for STM32F42xxx/43xxx devices.
(#) CSS (Clock security system), once enable and if a HSE clock failure occurs
(HSE used directly or through PLL as System clock source), the System clock
is automatically switched to HSI and an interrupt is generated if enabled.
The interrupt is linked to the Cortex-M4 NMI (Non-Maskable Interrupt)
exception vector.
(#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
clock (through a configurable prescaler) on PA8 pin.
(#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
clock (through a configurable prescaler) on PC9 pin.</pre> <h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="gaa2d6a35f5c2e0f86317c3beb222677fc"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">void RCC_AdjustHSICalibrationValue </td>
<td>(</td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>HSICalibrationValue</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Adjusts the Internal High Speed oscillator (HSI) calibration value. </p>
<dl class="section note"><dt>Note</dt><dd>The calibration is used to compensate for the variations in voltage and temperature that influence the frequency of the internal HSI RC. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">HSICalibrationValue</td><td>specifies the calibration trimming value. This parameter must be a number between 0 and 0x1F. </td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="ga0ff1fd7b9a8a49cdda11b7d7261c3494"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">void RCC_ClockSecuritySystemCmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the Clock Security System. </p>
<dl class="section note"><dt>Note</dt><dd>If a failure is detected on the HSE oscillator clock, this oscillator is automatically disabled and an interrupt is generated to inform the software about the failure (Clock Security System Interrupt, CSSI), allowing the MCU to perform rescue operations. The CSSI is linked to the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the Clock Security System. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="ga413f6422be11b1334abe60b3bff2e062"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">void RCC_DeInit </td>
<td>(</td>
<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Resets the RCC clock configuration to the default reset state. </p>
<dl class="section note"><dt>Note</dt><dd>The default reset state of the clock configuration is given below:<ul>
<li>HSI ON and used as system clock source</li>
<li>HSE, PLL and PLLI2S OFF</li>
<li>AHB, APB1 and APB2 prescaler set to 1.</li>
<li>CSS, MCO1 and MCO2 OFF</li>
<li>All interrupts disabled </li>
</ul>
</dd>
<dd>
This function doesn't modify the configuration of the<ul>
<li>Peripheral clocks</li>
<li>LSI, LSE and RTC clocks </li>
</ul>
</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="ga523b06e73f6aa8a03e42299c855066a8"></a>
<div class="memitem">
<div class="memproto">
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<tr>
<td class="memname">void RCC_HSEConfig </td>
<td>(</td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>RCC_HSE</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Configures the External High Speed oscillator (HSE). </p>
<dl class="section note"><dt>Note</dt><dd>After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application software should wait on HSERDY flag to be set indicating that HSE clock is stable and can be used to clock the PLL and/or system clock. </dd>
<dd>
HSE state can not be changed if it is used directly or through the PLL as system clock. In this case, you have to select another source of the system clock then change the HSE state (ex. disable it). </dd>
<dd>
The HSE is stopped by hardware when entering STOP and STANDBY modes. </dd>
<dd>
This function reset the CSSON bit, so if the Clock security system(CSS) was previously enabled you have to enable it again after calling this function. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">RCC_HSE</td><td>specifies the new state of the HSE. This parameter can be one of the following values: <ul>
<li>RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after 6 HSE oscillator clock cycles. </li>
<li>RCC_HSE_ON: turn ON the HSE oscillator </li>
<li>RCC_HSE_Bypass: HSE oscillator bypassed with external clock </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
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<td class="memname">void RCC_HSICmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the Internal High Speed oscillator (HSI). </p>
<dl class="section note"><dt>Note</dt><dd>The HSI is stopped by hardware when entering STOP and STANDBY modes. It is used (enabled by hardware) as system clock source after startup from Reset, wakeup from STOP and STANDBY mode, or in case of failure of the HSE used directly or indirectly as system clock (if the Clock Security System CSS is enabled). </dd>
<dd>
HSI can not be stopped if it is used as system clock source. In this case, you have to select another source of the system clock then stop the HSI. </dd>
<dd>
After enabling the HSI, the application software should wait on HSIRDY flag to be set indicating that HSI clock is stable and can be used as system clock source. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the HSI. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator clock cycles. </dd></dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
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<td class="memname">void RCC_LSEConfig </td>
<td>(</td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>RCC_LSE</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Configures the External Low Speed oscillator (LSE). </p>
<dl class="section note"><dt>Note</dt><dd>As the LSE is in the Backup domain and write access is denied to this domain after reset, you have to enable write access using PWR_BackupAccessCmd(ENABLE) function before to configure the LSE (to be done once after reset). </dd>
<dd>
After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">RCC_LSE</td><td>specifies the new state of the LSE. This parameter can be one of the following values: <ul>
<li>RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after 6 LSE oscillator clock cycles. </li>
<li>RCC_LSE_ON: turn ON the LSE oscillator </li>
<li>RCC_LSE_Bypass: LSE oscillator bypassed with external clock </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
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<td class="memname">void RCC_LSICmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the Internal Low Speed oscillator (LSI). </p>
<dl class="section note"><dt>Note</dt><dd>After enabling the LSI, the application software should wait on LSIRDY flag to be set indicating that LSI clock is stable and can be used to clock the IWDG and/or the RTC. </dd>
<dd>
LSI can not be disabled if the IWDG is running. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the LSI. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator clock cycles. </dd></dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
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<td class="memname">void RCC_MCO1Config </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>RCC_MCO1Source</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>RCC_MCO1Div</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Selects the clock source to output on MCO1 pin(PA8). </p>
<dl class="section note"><dt>Note</dt><dd>PA8 should be configured in alternate function mode. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">RCC_MCO1Source</td><td>specifies the clock source to output. This parameter can be one of the following values: <ul>
<li>RCC_MCO1Source_HSI: HSI clock selected as MCO1 source </li>
<li>RCC_MCO1Source_LSE: LSE clock selected as MCO1 source </li>
<li>RCC_MCO1Source_HSE: HSE clock selected as MCO1 source </li>
<li>RCC_MCO1Source_PLLCLK: main PLL clock selected as MCO1 source </li>
</ul>
</td></tr>
<tr><td class="paramname">RCC_MCO1Div</td><td>specifies the MCO1 prescaler. This parameter can be one of the following values: <ul>
<li>RCC_MCO1Div_1: no division applied to MCO1 clock </li>
<li>RCC_MCO1Div_2: division by 2 applied to MCO1 clock </li>
<li>RCC_MCO1Div_3: division by 3 applied to MCO1 clock </li>
<li>RCC_MCO1Div_4: division by 4 applied to MCO1 clock </li>
<li>RCC_MCO1Div_5: division by 5 applied to MCO1 clock </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">void RCC_MCO2Config </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>RCC_MCO2Source</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>RCC_MCO2Div</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Selects the clock source to output on MCO2 pin(PC9). </p>
<dl class="section note"><dt>Note</dt><dd>PC9 should be configured in alternate function mode. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">RCC_MCO2Source</td><td>specifies the clock source to output. This parameter can be one of the following values: <ul>
<li>RCC_MCO2Source_SYSCLK: System clock (SYSCLK) selected as MCO2 source </li>
<li>RCC_MCO2Source_PLLI2SCLK: PLLI2S clock selected as MCO2 source </li>
<li>RCC_MCO2Source_HSE: HSE clock selected as MCO2 source </li>
<li>RCC_MCO2Source_PLLCLK: main PLL clock selected as MCO2 source </li>
</ul>
</td></tr>
<tr><td class="paramname">RCC_MCO2Div</td><td>specifies the MCO2 prescaler. This parameter can be one of the following values: <ul>
<li>RCC_MCO2Div_1: no division applied to MCO2 clock </li>
<li>RCC_MCO2Div_2: division by 2 applied to MCO2 clock </li>
<li>RCC_MCO2Div_3: division by 3 applied to MCO2 clock </li>
<li>RCC_MCO2Div_4: division by 4 applied to MCO2 clock </li>
<li>RCC_MCO2Div_5: division by 5 applied to MCO2 clock </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
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<td class="memname">void RCC_PLLCmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the main PLL. </p>
<dl class="section note"><dt>Note</dt><dd>After enabling the main PLL, the application software should wait on PLLRDY flag to be set indicating that PLL clock is stable and can be used as system clock source. </dd>
<dd>
The main PLL can not be disabled if it is used as system clock source </dd>
<dd>
The main PLL is disabled by hardware when entering STOP and STANDBY modes. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the main PLL. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">void RCC_PLLConfig </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>RCC_PLLSource</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLM</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLN</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLP</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLQ</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Configures the main PLL clock source, multiplication and division factors. </p>
<dl class="section note"><dt>Note</dt><dd>This function must be used only when the main PLL is disabled.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">RCC_PLLSource</td><td>specifies the PLL entry clock source. This parameter can be one of the following values: <ul>
<li>RCC_PLLSource_HSI: HSI oscillator clock selected as PLL clock entry </li>
<li>RCC_PLLSource_HSE: HSE oscillator clock selected as PLL clock entry </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>This clock source (RCC_PLLSource) is common for the main PLL and PLLI2S.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLM</td><td>specifies the division factor for PLL VCO input clock This parameter must be a number between 0 and 63. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>You have to set the PLLM parameter correctly to ensure that the VCO input frequency ranges from 1 to 2 MHz. It is recommended to select a frequency of 2 MHz to limit PLL jitter.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLN</td><td>specifies the multiplication factor for PLL VCO output clock This parameter must be a number between 192 and 432. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>You have to set the PLLN parameter correctly to ensure that the VCO output frequency is between 192 and 432 MHz.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLP</td><td>specifies the division factor for main system clock (SYSCLK) This parameter must be a number in the range {2, 4, 6, or 8}. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>You have to set the PLLP parameter correctly to not exceed 168 MHz on the System clock frequency.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLQ</td><td>specifies the division factor for OTG FS, SDIO and RNG clocks This parameter must be a number between 4 and 15. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>If the USB OTG FS is used in your application, you have to set the PLLQ parameter correctly to have 48 MHz clock for the USB. However, the SDIO and RNG need a frequency lower than or equal to 48 MHz to work correctly.</dd></dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">void RCC_PLLI2SCmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the PLLI2S. </p>
<dl class="section note"><dt>Note</dt><dd>The PLLI2S is disabled by hardware when entering STOP and STANDBY modes. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the PLLI2S. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">void RCC_PLLSAICmd </td>
<td>(</td>
<td class="paramtype">FunctionalState&#160;</td>
<td class="paramname"><em>NewState</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enables or disables the PLLSAI. </p>
<dl class="section note"><dt>Note</dt><dd>This function can be used only for STM32F42xxx/43xxx devices</dd>
<dd>
The PLLSAI is disabled by hardware when entering STOP and STANDBY modes. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">NewState</td><td>new state of the PLLSAI. This parameter can be: ENABLE or DISABLE. </td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">void RCC_PLLSAIConfig </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLSAIN</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLSAIQ</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>PLLSAIR</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Configures the PLLSAI clock multiplication and division factors. </p>
<dl class="section note"><dt>Note</dt><dd>This function can be used only for STM32F42xxx/43xxx devices</dd>
<dd>
This function must be used only when the PLLSAI is disabled. </dd>
<dd>
PLLSAI clock source is common with the main PLL (configured in RCC_PLLConfig function )</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLSAIN</td><td>specifies the multiplication factor for PLLSAI VCO output clock This parameter must be a number between 192 and 432. </td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>You have to set the PLLSAIN parameter correctly to ensure that the VCO output frequency is between 192 and 432 MHz.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">PLLSAIQ</td><td>specifies the division factor for SAI1 clock This parameter must be a number between 2 and 15.</td></tr>
<tr><td class="paramname">PLLSAIR</td><td>specifies the division factor for LTDC clock This parameter must be a number between 2 and 7.</td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<td class="memname">ErrorStatus RCC_WaitForHSEStartUp </td>
<td>(</td>
<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Waits for HSE start-up. </p>
<dl class="section note"><dt>Note</dt><dd>This functions waits on HSERDY flag to be set and return SUCCESS if this flag is set, otherwise returns ERROR if the timeout is reached and this flag is not set. The timeout value is defined by the constant HSE_STARTUP_TIMEOUT in <a class="el" href="stm32f4xx_8h.html" title="CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...">stm32f4xx.h</a> file. You can tailor it depending on the HSE crystal used in your application. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">None</td><td></td></tr>
</table>
</dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
<table class="retval">
<tr><td class="paramname">An</td><td>ErrorStatus enumeration value:<ul>
<li>SUCCESS: HSE oscillator is stable and ready to use</li>
<li>ERROR: HSE oscillator not yet ready </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
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