Added doxygen output of current emulator branch.
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Timo Lang
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group___r_c_c___a_h_b___clock___source.html
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<a href="#define-members">Macros</a> </div>
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<div class="title">RCC_AHB_Clock_Source<div class="ingroups"><a class="el" href="group___s_t_m32_f4xx___std_periph___driver.html">STM32F4xx_StdPeriph_Driver</a> » <a class="el" href="group___r_c_c.html">RCC</a> » <a class="el" href="group___r_c_c___exported___constants.html">RCC_Exported_Constants</a></div></div> </div>
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Collaboration diagram for RCC_AHB_Clock_Source:</div>
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<div class="dyncontent">
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<center><table><tr><td><img src="group___r_c_c___a_h_b___clock___source.png" border="0" alt="" usemap="#group______r__c__c______a__h__b______clock______source"/>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:gadc3ac37d90c2082d640e5948fac0878f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc3ac37d90c2082d640e5948fac0878f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div1</b>   ((uint32_t)0x00000000)</td></tr>
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<tr class="separator:gadc3ac37d90c2082d640e5948fac0878f"><td class="memSeparator" colspan="2"> </td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div2</b>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gacadd82156776154a07d128b454fc69fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga458f8ae63164e878930dbebd7643f087"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga458f8ae63164e878930dbebd7643f087"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div4</b>   ((uint32_t)0x00000090)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div8</b>   ((uint32_t)0x000000A0)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div16</b>   ((uint32_t)0x000000B0)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div64</b>   ((uint32_t)0x000000C0)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div128</b>   ((uint32_t)0x000000D0)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div256</b>   ((uint32_t)0x000000E0)</td></tr>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLK_Div512</b>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="memitem:ga6e9f1c193a2f41bcb3c2f7fa8459b5b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><b>IS_RCC_HCLK</b>(HCLK)</td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define IS_RCC_HCLK</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">HCLK</td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<b>Value:</b><div class="fragment"><div class="line">(((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \</div>
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<div class="line"> ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \</div>
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<div class="line"> ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \</div>
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<div class="line"> ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \</div>
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<div class="line"> ((HCLK) == RCC_SYSCLK_Div512))</div>
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