Added doxygen output of current emulator branch.
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group___d_m_a___exported___constants.html
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<div class="headertitle">
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<div class="title">DMA_Exported_Constants<div class="ingroups"><a class="el" href="group___s_t_m32_f4xx___std_periph___driver.html">STM32F4xx_StdPeriph_Driver</a> » <a class="el" href="group___d_m_a.html">DMA</a></div></div> </div>
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<div class="contents">
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Collaboration diagram for DMA_Exported_Constants:</div>
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<div class="dyncontent">
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<center><table><tr><td><img src="group___d_m_a___exported___constants.png" border="0" alt="" usemap="#group______d__m__a______exported______constants"/>
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<area shape="rect" id="node1" href="group___d_m_a__memory__data__size.html" title="DMA_memory_data_size" alt="" coords="359,5,527,32"/><area shape="rect" id="node3" href="group___d_m_a__fifo__status__level.html" title="DMA_fifo_status_level" alt="" coords="369,56,518,83"/><area shape="rect" id="node4" href="group___d_m_a__fifo__threshold__level.html" title="DMA_fifo_threshold\l_level" alt="" coords="376,107,511,149"/><area shape="rect" id="node5" href="group___d_m_a__data__buffer__size.html" title="DMA_data_buffer_size" alt="" coords="367,173,519,200"/><area shape="rect" id="node6" href="group___d_m_a__circular__normal__mode.html" title="DMA_circular_normal_mode" alt="" coords="351,224,536,251"/><area shape="rect" id="node7" href="group___d_m_a__peripheral__data__size.html" title="DMA_peripheral_data_size" alt="" coords="355,275,532,301"/><area shape="rect" id="node8" href="group___d_m_a__interrupts__definitions.html" title="DMA_interrupts_definitions" alt="" coords="355,325,532,352"/><area shape="rect" id="node9" href="group___d_m_a__peripheral__burst.html" title="DMA_peripheral_burst" alt="" coords="368,376,519,403"/><area shape="rect" id="node10" href="group___d_m_a__priority__level.html" title="DMA_priority_level" alt="" coords="379,427,508,453"/><area shape="rect" id="node11" href="group___d_m_a__data__transfer__direction.html" title="DMA_data_transfer_direction" alt="" coords="349,477,538,504"/><area shape="rect" id="node12" href="group___d_m_a__interrupt__enable__definitions.html" title="DMA_interrupt_enable\l_definitions" alt="" coords="368,529,519,570"/><area shape="rect" id="node14" href="group___d_m_a__peripheral__incremented__mode.html" title="DMA_peripheral_incremented_mode" alt="" coords="328,595,559,621"/><area shape="rect" id="node15" href="group___d_m_a__memory__incremented__mode.html" title="DMA_memory_incremented_mode" alt="" coords="332,645,555,672"/><area shape="rect" id="node16" href="group___d_m_a__fifo__direct__mode.html" title="DMA_fifo_direct_mode" alt="" coords="367,696,519,723"/><area shape="rect" id="node17" href="group___d_m_a__peripheral__increment__offset.html" title="DMA_peripheral_increment\l_offset" alt="" coords="354,747,533,789"/><area shape="rect" id="node18" href="group___d_m_a__flags__definition.html" title="DMA_flags_definition" alt="" coords="372,813,515,840"/><area shape="rect" id="node19" href="group___d_m_a__flow__controller__definitions.html" title="DMA_flow_controller\l_definitions" alt="" coords="373,865,513,906"/><area shape="rect" id="node20" href="group___d_m_a__memory__burst.html" title="DMA_memory_burst" alt="" coords="373,931,514,957"/><area shape="rect" id="node21" href="group___d_m_a__memory__targets__definitions.html" title="DMA_memory_targets\l_definitions" alt="" coords="367,982,519,1023"/><area shape="rect" id="node22" href="group___d_m_a__channel.html" title="DMA_channel" alt="" coords="392,1048,495,1075"/><area shape="rect" id="node13" href="group___d_m_a.html" title="DMA driver modules. " alt="" coords="5,507,56,533"/></map>
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</td></tr></table></center>
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</div>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
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Modules</h2></td></tr>
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<tr class="memitem:group___d_m_a__channel"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__channel.html">DMA_channel</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__data__transfer__direction"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__data__transfer__direction.html">DMA_data_transfer_direction</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__data__buffer__size"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__data__buffer__size.html">DMA_data_buffer_size</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__peripheral__incremented__mode"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__peripheral__incremented__mode.html">DMA_peripheral_incremented_mode</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__memory__incremented__mode"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__memory__incremented__mode.html">DMA_memory_incremented_mode</a></td></tr>
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<tr class="memitem:group___d_m_a__peripheral__data__size"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__peripheral__data__size.html">DMA_peripheral_data_size</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__memory__data__size"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__memory__data__size.html">DMA_memory_data_size</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__circular__normal__mode"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__circular__normal__mode.html">DMA_circular_normal_mode</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__priority__level"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__priority__level.html">DMA_priority_level</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__fifo__direct__mode"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__fifo__direct__mode.html">DMA_fifo_direct_mode</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__fifo__threshold__level"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__fifo__threshold__level.html">DMA_fifo_threshold_level</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__memory__burst"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__memory__burst.html">DMA_memory_burst</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__peripheral__burst"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__peripheral__burst.html">DMA_peripheral_burst</a></td></tr>
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<tr class="memitem:group___d_m_a__fifo__status__level"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__fifo__status__level.html">DMA_fifo_status_level</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__flags__definition"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__flags__definition.html">DMA_flags_definition</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__interrupt__enable__definitions"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__interrupt__enable__definitions.html">DMA_interrupt_enable_definitions</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__interrupts__definitions"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__interrupts__definitions.html">DMA_interrupts_definitions</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__peripheral__increment__offset"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__peripheral__increment__offset.html">DMA_peripheral_increment_offset</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:group___d_m_a__flow__controller__definitions"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__flow__controller__definitions.html">DMA_flow_controller_definitions</a></td></tr>
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<tr class="memitem:group___d_m_a__memory__targets__definitions"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_m_a__memory__targets__definitions.html">DMA_memory_targets_definitions</a></td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:gabcab9fa1c48b148703a8f41c1d99e0c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><b>IS_DMA_ALL_PERIPH</b>(PERIPH)</td></tr>
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<tr class="memitem:gaad08400369c8c129927cdb9cf1baae29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><b>IS_DMA_ALL_CONTROLLER</b>(CONTROLLER)</td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define IS_DMA_ALL_CONTROLLER</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">CONTROLLER</td><td>)</td>
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<b>Value:</b><div class="fragment"><div class="line">(((CONTROLLER) == DMA1) || \</div>
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<div class="line"> ((CONTROLLER) == DMA2))</div>
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<td class="memname">#define IS_DMA_ALL_PERIPH</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">PERIPH</td><td>)</td>
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<td></td>
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<b>Value:</b><div class="fragment"><div class="line">(((PERIPH) == DMA1_Stream0) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream1) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream2) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream3) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream4) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream5) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream6) || \</div>
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<div class="line"> ((PERIPH) == DMA1_Stream7) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream0) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream1) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream2) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream3) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream4) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream5) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream6) || \</div>
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<div class="line"> ((PERIPH) == DMA2_Stream7))</div>
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