Some changes on controller. not working yet.
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@@ -55,6 +55,9 @@ architecture Behavioral of controller is
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signal charcnt_reg, charcnt_next : unsigned(15 downto 0) := (others => '0');
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signal charcnt_reg, charcnt_next : unsigned(15 downto 0) := (others => '0');
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signal lcd_newchar_reg,lcd_newchar_next : std_logic := '0';
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signal lcd_newchar_reg,lcd_newchar_next : std_logic := '0';
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signal lcd_data_reg, lcd_data_next: unsigned(7 downto 0) :=(others => '0');
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signal lcd_data_reg, lcd_data_next: unsigned(7 downto 0) :=(others => '0');
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type character_array is array (15 downto 0) of character;
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constant line1 : character_array := ( 'h', 'e', 'l','l','o', others=> ' ' );
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begin
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begin
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@@ -81,11 +84,21 @@ begin
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end if;
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end if;
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end process proc1;
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end process proc1;
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freq_out <= resize(digit_reg(0),17)
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-- freq_out <= resize(digit_reg(0),17)
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+ resize(digit_reg(1) * 10 ,17)
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-- + resize(digit_reg(1) * 10 ,17)
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+ resize(digit_reg(2) * 100 ,17)
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-- + resize(digit_reg(2) * 100 ,17)
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+ resize(digit_reg(3) * 1000,17)
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-- + resize(digit_reg(3) * 1000,17)
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+ resize(digit_reg(4) * 10000,17);
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-- + resize(digit_reg(4) * 10000,17);
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freq_out <= digit_reg(0)
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+ resize((digit_reg(1)
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+ resize((digit_reg(2)
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+ resize((digit_reg(3)
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+ resize(digit_reg(4) * 10,7)
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) * 10,10)
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)* 10 ,14)
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)* 10 ,17);
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lcd_data <= lcd_data_reg;
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lcd_data <= lcd_data_reg;
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lcd_newchar <= lcd_newchar_reg;
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lcd_newchar <= lcd_newchar_reg;
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@@ -115,7 +128,7 @@ begin
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end if;
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end if;
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if(lcd_busy = '0' and charcnt_reg < 10) then
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if(lcd_busy = '0' and charcnt_reg < 10) then
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lcd_data_next <= to_unsigned(65,8);
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lcd_data_next <= to_unsigned(character'pos(line1(to_integer(charcnt_reg))),8);
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lcd_newchar_next <= '1';
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lcd_newchar_next <= '1';
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charcnt_next <= charcnt_reg + 1;
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charcnt_next <= charcnt_reg + 1;
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end if;
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end if;
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