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Simplified dds.

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T-moe
2016-05-30 20:24:44 +02:00
parent 57de5f7af7
commit 2c14209bb1
1 changed files with 17 additions and 13 deletions
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24
dds.vhd
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@@ -59,22 +59,26 @@ begin
(shift_left(to_unsigned(1,64),acc_res + log2_int(clk_freq)) / clk_freq)) (shift_left(to_unsigned(1,64),acc_res + log2_int(clk_freq)) / clk_freq))
/to_unsigned(2**log2_int(clk_freq),64),acc_res); /to_unsigned(2**log2_int(clk_freq),64),acc_res);
idx_phase <= idx(acc_res -1 downto acc_res - phase_res);
amp_rect <= to_unsigned(0,adc_res) when idx_phase(phase_res-1)='0' else amp_rect <= to_unsigned(0,adc_res) when idx(acc_res-1)='0' else
to_unsigned((2**adc_res)-1,adc_res); to_unsigned((2**adc_res)-1,adc_res);
amp_saw <= resize(unsigned(((2**adc_res) -1)*idx_phase/2**phase_res),adc_res) ; amp_saw <= idx(acc_res -1 downto acc_res - adc_res);
amp_tria <= resize(unsigned(((2**adc_res) -1)*idx_phase/2**(phase_res-1)),adc_res)
when idx_phase(phase_res-1)='0' else amp_tria <= idx(acc_res -2 downto acc_res - adc_res) & "0"
resize(unsigned((2**(adc_res+1)) - ((2**adc_res) -1)*idx_phase/2**(phase_res-1)),adc_res); when idx(acc_res-1)='0' else
((2**adc_res)-1)- (idx(acc_res -2 downto acc_res - adc_res) & "0");
--idx_phase <= idx(acc_res -1 downto acc_res - phase_res);
-- Modulo is only required to prevent a synthesizer warning, but the value is actually never > 2**phase_res/4 -- Modulo is only required to prevent a synthesizer warning, but the value is actually never > 2**phase_res/4
amp_sin <= to_unsigned((2**(adc_res-1)) - 1,adc_res) + sin_wave(to_integer(idx_phase) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="00" else --amp_sin <= to_unsigned((2**(adc_res-1)) - 1,adc_res) + sin_wave(to_integer(idx_phase) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="00" else
to_unsigned((2**(adc_res-1)) - 1,adc_res) + sin_wave(to_integer(((2**phase_res)/2)-idx_phase) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="01" else -- to_unsigned((2**(adc_res-1)) - 1,adc_res) + sin_wave(to_integer(((2**phase_res)/2)-idx_phase) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="01" else
to_unsigned((2**(adc_res-1)) - 1,adc_res) - sin_wave(to_integer(idx_phase-((2**phase_res)/2)) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="10" else -- to_unsigned((2**(adc_res-1)) - 1,adc_res) - sin_wave(to_integer(idx_phase-((2**phase_res)/2)) mod ((2**phase_res)/4)) when idx_phase(phase_res-1 downto phase_res-2)="10" else
to_unsigned((2**(adc_res-1)) - 1,adc_res) - sin_wave(to_integer(((2**phase_res)-1)-idx_phase) mod ((2**phase_res)/4)); -- to_unsigned((2**(adc_res-1)) - 1,adc_res) - sin_wave(to_integer(((2**phase_res)-1)-idx_phase) mod ((2**phase_res)/4));
with form select amp <= amp_rect when "00", with form select amp <= amp_rect when "00",
amp_saw when "01", amp_saw when "01",