diff --git a/rotary.vhd b/rotary.vhd
index bc368ad..8c39568 100644
--- a/rotary.vhd
+++ b/rotary.vhd
@@ -12,8 +12,10 @@ entity rotary_dec is
Port ( clk : in std_logic; -- Systemtakt
A : in std_logic; -- Spur A
B : in std_logic; -- Spur B
- right : out std_logic; -- Zaehlrichtung
- ce : out std_logic); -- Clock Enable
+ btn : in std_logic; -- Button Input
+ btn_deb : out std_logic; -- Button entprellt
+ enc_right: out std_logic; -- Zaehlrichtung
+ enc_ce : out std_logic); -- Clock Enable
end rotary_dec;
@@ -21,7 +23,10 @@ architecture Behavioral of rotary_dec is
signal a_old, b_old: std_logic := '0';
signal a_debounced_reg, a_debounced_next, b_debounced_reg, b_debounced_next : std_logic := '0';
-signal counter_a_reg, counter_a_next, counter_b_reg, counter_b_next: unsigned(23 downto 0) := (others => '0');
+signal btn_reg, btn_next: std_logic :='0';
+signal counter_a_reg, counter_a_next,
+ counter_b_reg, counter_b_next,
+ counter_btn_reg, counter_btn_next: unsigned(23 downto 0) := (others => '0');
constant count_max: unsigned(23 downto 0) := to_unsigned(500000,24); --10ms
begin
@@ -31,15 +36,19 @@ begin
if rising_edge(clk) then
counter_a_reg <= counter_a_next;
counter_b_reg <= counter_b_next;
+ counter_btn_reg <= counter_btn_next;
a_debounced_reg <= a_debounced_next;
b_debounced_reg <= b_debounced_next;
a_old <= a_debounced_reg;
b_old <= b_debounced_reg;
+ btn_reg <= btn_next;
end if;
end process;
-process(A,B, a_debounced_reg, b_debounced_reg, counter_a_reg, counter_b_reg)
+btn_deb <= btn_reg;
+
+process(A,B, a_debounced_reg, b_debounced_reg, counter_a_reg, counter_b_reg, btn_reg, btn, counter_btn_reg)
begin
if(A /= a_debounced_reg and counter_a_reg > count_max) then
@@ -57,6 +66,14 @@ begin
b_debounced_next <= b_debounced_reg;
counter_b_next <= counter_b_reg + 1;
end if;
+
+ if(btn /= btn_reg and counter_btn_reg > count_max) then
+ btn_next <= btn;
+ counter_btn_next <= (others => '0');
+ else
+ btn_next <= btn_reg;
+ counter_btn_next <= counter_btn_reg + 1;
+ end if;
end process;
@@ -68,9 +85,9 @@ variable state: std_logic_vector(3 downto 0);
begin
state := a_debounced_reg & b_debounced_reg & a_old & b_old;
case state is
- when "0001" => right <= '0'; ce <= '1';
- when "0010" => right <= '1'; ce <= '1';
- when others => right <= '0'; ce <= '0';
+ when "0001" => enc_right <= '0'; enc_ce <= '1';
+ when "0010" => enc_right <= '1'; enc_ce <= '1';
+ when others => enc_right <= '0'; enc_ce <= '0';
end case;
end process;
diff --git a/rotary_dec.sym b/rotary_dec.sym
index 35a4e5b..22a8fe7 100644
--- a/rotary_dec.sym
+++ b/rotary_dec.sym
@@ -1,24 +1,30 @@
BLOCK
- 2016-6-10T10:5:37
-
-
-
-
-
+ 2016-6-13T11:22:41
+
+
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diff --git a/toplevel.jhd b/toplevel.jhd
index 8ac4bfd..2a585c5 100644
--- a/toplevel.jhd
+++ b/toplevel.jhd
@@ -4,8 +4,8 @@ MODULE toplevel
SUBMODULE dds
INSTANCE XLXI_2
SUBMODULE controller
- INSTANCE XLXI_90
+ INSTANCE XLXI_92
SUBMODULE rotary_dec
- INSTANCE XLXI_43
+ INSTANCE XLXI_91
SUBMODULE lcd_driver
INSTANCE XLXI_88
diff --git a/toplevel.sch b/toplevel.sch
index b3b0f37..e94930c 100644
--- a/toplevel.sch
+++ b/toplevel.sch
@@ -17,8 +17,6 @@
-
-
@@ -37,7 +35,10 @@
+
+
+
@@ -46,8 +47,6 @@
-
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@@ -57,6 +56,8 @@
+
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2016-5-20T8:33:2
@@ -122,13 +123,15 @@
- 2016-6-10T10:5:37
-
+ 2016-6-13T11:22:41
+
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2016-6-6T19:34:31
@@ -175,13 +178,6 @@
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@@ -323,9 +318,6 @@
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\ No newline at end of file