501 lines
84 KiB
HTML
501 lines
84 KiB
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<a href="#define-members">Macros</a> |
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<a href="#func-members">Functions</a> </div>
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<div class="title">stm32f4xx_tim.c File Reference</div> </div>
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<p>This file provides firmware functions to manage the following functionalities of the TIM peripheral:
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<a href="#details">More...</a></p>
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<div class="textblock"><code>#include "<a class="el" href="stm32f4xx__tim_8h_source.html">stm32f4xx_tim.h</a>"</code><br />
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<code>#include "<a class="el" href="stm32f4xx__rcc_8h_source.html">stm32f4xx_rcc.h</a>"</code><br />
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Include dependency graph for stm32f4xx_tim.c:</div>
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<div class="center"><img src="stm32f4xx__tim_8c__incl.png" border="0" usemap="#discovery_2libs_2_stm_core_n_pheriph_2src_2stm32f4xx__tim_8c" alt=""/></div>
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</div><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga705d4e8fca08b32bfd20592dea164447"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga705d4e8fca08b32bfd20592dea164447"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SMCR_ETR_MASK</b>   ((uint16_t)0x00FF)</td></tr>
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<tr class="separator:ga705d4e8fca08b32bfd20592dea164447"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga110aacc88d798c51d324cb360c62c538"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga110aacc88d798c51d324cb360c62c538"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CCMR_OFFSET</b>   ((uint16_t)0x0018)</td></tr>
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<tr class="separator:ga110aacc88d798c51d324cb360c62c538"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac721c0fff405ca1dc4bfe9c84868e928"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac721c0fff405ca1dc4bfe9c84868e928"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CCER_CCE_SET</b>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gac721c0fff405ca1dc4bfe9c84868e928"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82e4fa29e85adee9247914e00323fe34"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82e4fa29e85adee9247914e00323fe34"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CCER_CCNE_SET</b>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga82e4fa29e85adee9247914e00323fe34"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56a11432b4408650479f5c19dbbafbc8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56a11432b4408650479f5c19dbbafbc8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CCMR_OC13M_MASK</b>   ((uint16_t)0xFF8F)</td></tr>
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<tr class="separator:ga56a11432b4408650479f5c19dbbafbc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd4e5a88e8b7c9dbd068bbfd9f0e6ed2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabd4e5a88e8b7c9dbd068bbfd9f0e6ed2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CCMR_OC24M_MASK</b>   ((uint16_t)0x8FFF)</td></tr>
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<tr class="separator:gabd4e5a88e8b7c9dbd068bbfd9f0e6ed2"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga1659cc0ce503ac151568e0c7c02b1ba5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga1659cc0ce503ac151568e0c7c02b1ba5">TIM_DeInit</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga1659cc0ce503ac151568e0c7c02b1ba5"><td class="mdescLeft"> </td><td class="mdescRight">Deinitializes the TIMx peripheral registers to their default reset values. <a href="group___t_i_m___group1.html#ga1659cc0ce503ac151568e0c7c02b1ba5">More...</a><br /></td></tr>
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<tr class="separator:ga1659cc0ce503ac151568e0c7c02b1ba5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83fd58c9416802d9638bbe1715c98932"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga83fd58c9416802d9638bbe1715c98932">TIM_TimeBaseInit</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___time_base_init_type_def.html">TIM_TimeBaseInitTypeDef</a> *TIM_TimeBaseInitStruct)</td></tr>
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<tr class="memdesc:ga83fd58c9416802d9638bbe1715c98932"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIMx Time Base Unit peripheral according to the specified parameters in the TIM_TimeBaseInitStruct. <a href="group___t_i_m___group1.html#ga83fd58c9416802d9638bbe1715c98932">More...</a><br /></td></tr>
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<tr class="separator:ga83fd58c9416802d9638bbe1715c98932"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1556a0b9a5d53506875fd7de0cbc6b1f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga1556a0b9a5d53506875fd7de0cbc6b1f">TIM_TimeBaseStructInit</a> (<a class="el" href="struct_t_i_m___time_base_init_type_def.html">TIM_TimeBaseInitTypeDef</a> *TIM_TimeBaseInitStruct)</td></tr>
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<tr class="memdesc:ga1556a0b9a5d53506875fd7de0cbc6b1f"><td class="mdescLeft"> </td><td class="mdescRight">Fills each TIM_TimeBaseInitStruct member with its default value. <a href="group___t_i_m___group1.html#ga1556a0b9a5d53506875fd7de0cbc6b1f">More...</a><br /></td></tr>
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<tr class="separator:ga1556a0b9a5d53506875fd7de0cbc6b1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45c6fd9041baf7f64c121e0172f305c7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga45c6fd9041baf7f64c121e0172f305c7">TIM_PrescalerConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)</td></tr>
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<tr class="memdesc:ga45c6fd9041baf7f64c121e0172f305c7"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Prescaler. <a href="group___t_i_m___group1.html#ga45c6fd9041baf7f64c121e0172f305c7">More...</a><br /></td></tr>
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<tr class="separator:ga45c6fd9041baf7f64c121e0172f305c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93941c1db20bf3794f377307df90a67b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga93941c1db20bf3794f377307df90a67b">TIM_CounterModeConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_CounterMode)</td></tr>
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<tr class="memdesc:ga93941c1db20bf3794f377307df90a67b"><td class="mdescLeft"> </td><td class="mdescRight">Specifies the TIMx Counter Mode to be used. <a href="group___t_i_m___group1.html#ga93941c1db20bf3794f377307df90a67b">More...</a><br /></td></tr>
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<tr class="separator:ga93941c1db20bf3794f377307df90a67b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga18173e7955a85d5c2598c643eada2692"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga18173e7955a85d5c2598c643eada2692">TIM_SetCounter</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Counter)</td></tr>
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<tr class="memdesc:ga18173e7955a85d5c2598c643eada2692"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Counter Register value. <a href="group___t_i_m___group1.html#ga18173e7955a85d5c2598c643eada2692">More...</a><br /></td></tr>
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<tr class="separator:ga18173e7955a85d5c2598c643eada2692"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad6a388d498c7f299d00a9d0871943041"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#gad6a388d498c7f299d00a9d0871943041">TIM_SetAutoreload</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Autoreload)</td></tr>
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<tr class="memdesc:gad6a388d498c7f299d00a9d0871943041"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Autoreload Register value. <a href="group___t_i_m___group1.html#gad6a388d498c7f299d00a9d0871943041">More...</a><br /></td></tr>
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<tr class="separator:gad6a388d498c7f299d00a9d0871943041"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53607976e0866ab424e294cda9f6036e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga53607976e0866ab424e294cda9f6036e">TIM_GetCounter</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga53607976e0866ab424e294cda9f6036e"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Counter value. <a href="group___t_i_m___group1.html#ga53607976e0866ab424e294cda9f6036e">More...</a><br /></td></tr>
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<tr class="separator:ga53607976e0866ab424e294cda9f6036e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga427eb6e533480e02a27cd0ca876183d6"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga427eb6e533480e02a27cd0ca876183d6">TIM_GetPrescaler</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga427eb6e533480e02a27cd0ca876183d6"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Prescaler value. <a href="group___t_i_m___group1.html#ga427eb6e533480e02a27cd0ca876183d6">More...</a><br /></td></tr>
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<tr class="separator:ga427eb6e533480e02a27cd0ca876183d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace2384dd33e849a054f61b8e1fc7e7c3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#gace2384dd33e849a054f61b8e1fc7e7c3">TIM_UpdateDisableConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gace2384dd33e849a054f61b8e1fc7e7c3"><td class="mdescLeft"> </td><td class="mdescRight">Enables or Disables the TIMx Update event. <a href="group___t_i_m___group1.html#gace2384dd33e849a054f61b8e1fc7e7c3">More...</a><br /></td></tr>
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<tr class="separator:gace2384dd33e849a054f61b8e1fc7e7c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d7a8f952e209de142499e67a653fc1f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga1d7a8f952e209de142499e67a653fc1f">TIM_UpdateRequestConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_UpdateSource)</td></tr>
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<tr class="memdesc:ga1d7a8f952e209de142499e67a653fc1f"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Update Request Interrupt source. <a href="group___t_i_m___group1.html#ga1d7a8f952e209de142499e67a653fc1f">More...</a><br /></td></tr>
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<tr class="separator:ga1d7a8f952e209de142499e67a653fc1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42b44b9fc2b0798d733720dd6bac1ac0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga42b44b9fc2b0798d733720dd6bac1ac0">TIM_ARRPreloadConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga42b44b9fc2b0798d733720dd6bac1ac0"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables TIMx peripheral Preload register on ARR. <a href="group___t_i_m___group1.html#ga42b44b9fc2b0798d733720dd6bac1ac0">More...</a><br /></td></tr>
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<tr class="separator:ga42b44b9fc2b0798d733720dd6bac1ac0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd2cca5fac6c1291dc4339098d5c9562"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#gadd2cca5fac6c1291dc4339098d5c9562">TIM_SelectOnePulseMode</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OPMode)</td></tr>
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<tr class="memdesc:gadd2cca5fac6c1291dc4339098d5c9562"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIMx's One Pulse Mode. <a href="group___t_i_m___group1.html#gadd2cca5fac6c1291dc4339098d5c9562">More...</a><br /></td></tr>
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<tr class="separator:gadd2cca5fac6c1291dc4339098d5c9562"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20ef804dc32c723662d11ee7da3baab2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga20ef804dc32c723662d11ee7da3baab2">TIM_SetClockDivision</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_CKD)</td></tr>
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<tr class="memdesc:ga20ef804dc32c723662d11ee7da3baab2"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Clock Division value. <a href="group___t_i_m___group1.html#ga20ef804dc32c723662d11ee7da3baab2">More...</a><br /></td></tr>
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<tr class="separator:ga20ef804dc32c723662d11ee7da3baab2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2bdc275bcbd2ce9d1ba632e6c89896b7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group1.html#ga2bdc275bcbd2ce9d1ba632e6c89896b7">TIM_Cmd</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga2bdc275bcbd2ce9d1ba632e6c89896b7"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified TIM peripheral. <a href="group___t_i_m___group1.html#ga2bdc275bcbd2ce9d1ba632e6c89896b7">More...</a><br /></td></tr>
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<tr class="separator:ga2bdc275bcbd2ce9d1ba632e6c89896b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafcdb6ff00158862aef7fed5e7a554a3e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gafcdb6ff00158862aef7fed5e7a554a3e">TIM_OC1Init</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___o_c_init_type_def.html">TIM_OCInitTypeDef</a> *TIM_OCInitStruct)</td></tr>
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<tr class="memdesc:gafcdb6ff00158862aef7fed5e7a554a3e"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIMx Channel1 according to the specified parameters in the TIM_OCInitStruct. <a href="group___t_i_m___group2.html#gafcdb6ff00158862aef7fed5e7a554a3e">More...</a><br /></td></tr>
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<tr class="separator:gafcdb6ff00158862aef7fed5e7a554a3e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2017455121d910d6ff63ac6f219842c5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga2017455121d910d6ff63ac6f219842c5">TIM_OC2Init</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___o_c_init_type_def.html">TIM_OCInitTypeDef</a> *TIM_OCInitStruct)</td></tr>
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<tr class="memdesc:ga2017455121d910d6ff63ac6f219842c5"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIMx Channel2 according to the specified parameters in the TIM_OCInitStruct. <a href="group___t_i_m___group2.html#ga2017455121d910d6ff63ac6f219842c5">More...</a><br /></td></tr>
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<tr class="separator:ga2017455121d910d6ff63ac6f219842c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga90d4a358d4e6d4c5ed17dc1d6beb5f30"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga90d4a358d4e6d4c5ed17dc1d6beb5f30">TIM_OC3Init</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___o_c_init_type_def.html">TIM_OCInitTypeDef</a> *TIM_OCInitStruct)</td></tr>
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<tr class="memdesc:ga90d4a358d4e6d4c5ed17dc1d6beb5f30"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIMx Channel3 according to the specified parameters in the TIM_OCInitStruct. <a href="group___t_i_m___group2.html#ga90d4a358d4e6d4c5ed17dc1d6beb5f30">More...</a><br /></td></tr>
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<tr class="separator:ga90d4a358d4e6d4c5ed17dc1d6beb5f30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64571ebbb58cac39a9e760050175f11c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga64571ebbb58cac39a9e760050175f11c">TIM_OC4Init</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___o_c_init_type_def.html">TIM_OCInitTypeDef</a> *TIM_OCInitStruct)</td></tr>
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<tr class="memdesc:ga64571ebbb58cac39a9e760050175f11c"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIMx Channel4 according to the specified parameters in the TIM_OCInitStruct. <a href="group___t_i_m___group2.html#ga64571ebbb58cac39a9e760050175f11c">More...</a><br /></td></tr>
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<tr class="separator:ga64571ebbb58cac39a9e760050175f11c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga394683c78ae02837882e36014e11643e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga394683c78ae02837882e36014e11643e">TIM_OCStructInit</a> (<a class="el" href="struct_t_i_m___o_c_init_type_def.html">TIM_OCInitTypeDef</a> *TIM_OCInitStruct)</td></tr>
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<tr class="memdesc:ga394683c78ae02837882e36014e11643e"><td class="mdescLeft"> </td><td class="mdescRight">Fills each TIM_OCInitStruct member with its default value. <a href="group___t_i_m___group2.html#ga394683c78ae02837882e36014e11643e">More...</a><br /></td></tr>
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<tr class="separator:ga394683c78ae02837882e36014e11643e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83ea0af5a7c1af521236ce5e4d2c42b0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga83ea0af5a7c1af521236ce5e4d2c42b0">TIM_SelectOCxM</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)</td></tr>
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<tr class="memdesc:ga83ea0af5a7c1af521236ce5e4d2c42b0"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIM Output Compare Mode. <a href="group___t_i_m___group2.html#ga83ea0af5a7c1af521236ce5e4d2c42b0">More...</a><br /></td></tr>
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<tr class="separator:ga83ea0af5a7c1af521236ce5e4d2c42b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga48631e66c32bb905946664f4722b2546"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga48631e66c32bb905946664f4722b2546">TIM_SetCompare1</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Compare1)</td></tr>
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<tr class="memdesc:ga48631e66c32bb905946664f4722b2546"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Capture Compare1 Register value. <a href="group___t_i_m___group2.html#ga48631e66c32bb905946664f4722b2546">More...</a><br /></td></tr>
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<tr class="separator:ga48631e66c32bb905946664f4722b2546"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3de36754f3ba5d46b9ef2bf8e77575c7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga3de36754f3ba5d46b9ef2bf8e77575c7">TIM_SetCompare2</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Compare2)</td></tr>
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<tr class="memdesc:ga3de36754f3ba5d46b9ef2bf8e77575c7"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Capture Compare2 Register value. <a href="group___t_i_m___group2.html#ga3de36754f3ba5d46b9ef2bf8e77575c7">More...</a><br /></td></tr>
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<tr class="separator:ga3de36754f3ba5d46b9ef2bf8e77575c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac372fbbbbc20329802659dd6c6b4e051"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gac372fbbbbc20329802659dd6c6b4e051">TIM_SetCompare3</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Compare3)</td></tr>
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<tr class="memdesc:gac372fbbbbc20329802659dd6c6b4e051"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Capture Compare3 Register value. <a href="group___t_i_m___group2.html#gac372fbbbbc20329802659dd6c6b4e051">More...</a><br /></td></tr>
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<tr class="separator:gac372fbbbbc20329802659dd6c6b4e051"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99ba6c2afa87a239c9d32a49762b4245"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga99ba6c2afa87a239c9d32a49762b4245">TIM_SetCompare4</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint32_t Compare4)</td></tr>
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<tr class="memdesc:ga99ba6c2afa87a239c9d32a49762b4245"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Capture Compare4 Register value. <a href="group___t_i_m___group2.html#ga99ba6c2afa87a239c9d32a49762b4245">More...</a><br /></td></tr>
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<tr class="separator:ga99ba6c2afa87a239c9d32a49762b4245"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4f58c12e6493a0d8b9555c9097b831d6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga4f58c12e6493a0d8b9555c9097b831d6">TIM_ForcedOC1Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ForcedAction)</td></tr>
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<tr class="memdesc:ga4f58c12e6493a0d8b9555c9097b831d6"><td class="mdescLeft"> </td><td class="mdescRight">Forces the TIMx output 1 waveform to active or inactive level. <a href="group___t_i_m___group2.html#ga4f58c12e6493a0d8b9555c9097b831d6">More...</a><br /></td></tr>
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<tr class="separator:ga4f58c12e6493a0d8b9555c9097b831d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3d2902b6fbab8dd55cd531055ffcc63d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga3d2902b6fbab8dd55cd531055ffcc63d">TIM_ForcedOC2Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ForcedAction)</td></tr>
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<tr class="memdesc:ga3d2902b6fbab8dd55cd531055ffcc63d"><td class="mdescLeft"> </td><td class="mdescRight">Forces the TIMx output 2 waveform to active or inactive level. <a href="group___t_i_m___group2.html#ga3d2902b6fbab8dd55cd531055ffcc63d">More...</a><br /></td></tr>
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<tr class="separator:ga3d2902b6fbab8dd55cd531055ffcc63d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga920b0fb4ca44fceffd1c3e441feebd8f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga920b0fb4ca44fceffd1c3e441feebd8f">TIM_ForcedOC3Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ForcedAction)</td></tr>
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<tr class="memdesc:ga920b0fb4ca44fceffd1c3e441feebd8f"><td class="mdescLeft"> </td><td class="mdescRight">Forces the TIMx output 3 waveform to active or inactive level. <a href="group___t_i_m___group2.html#ga920b0fb4ca44fceffd1c3e441feebd8f">More...</a><br /></td></tr>
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<tr class="separator:ga920b0fb4ca44fceffd1c3e441feebd8f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0a0bbe74251e56d4b835d20b0a3aa63"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gaf0a0bbe74251e56d4b835d20b0a3aa63">TIM_ForcedOC4Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ForcedAction)</td></tr>
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<tr class="memdesc:gaf0a0bbe74251e56d4b835d20b0a3aa63"><td class="mdescLeft"> </td><td class="mdescRight">Forces the TIMx output 4 waveform to active or inactive level. <a href="group___t_i_m___group2.html#gaf0a0bbe74251e56d4b835d20b0a3aa63">More...</a><br /></td></tr>
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<tr class="separator:gaf0a0bbe74251e56d4b835d20b0a3aa63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60e6c29ad8f919bef616cf8e3306dd64"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga60e6c29ad8f919bef616cf8e3306dd64">TIM_OC1PreloadConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPreload)</td></tr>
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<tr class="memdesc:ga60e6c29ad8f919bef616cf8e3306dd64"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx peripheral Preload register on CCR1. <a href="group___t_i_m___group2.html#ga60e6c29ad8f919bef616cf8e3306dd64">More...</a><br /></td></tr>
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<tr class="separator:ga60e6c29ad8f919bef616cf8e3306dd64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75b4614c6dd2cd52f2c5becdb6590c10"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga75b4614c6dd2cd52f2c5becdb6590c10">TIM_OC2PreloadConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPreload)</td></tr>
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<tr class="memdesc:ga75b4614c6dd2cd52f2c5becdb6590c10"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx peripheral Preload register on CCR2. <a href="group___t_i_m___group2.html#ga75b4614c6dd2cd52f2c5becdb6590c10">More...</a><br /></td></tr>
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<tr class="separator:ga75b4614c6dd2cd52f2c5becdb6590c10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b2391685a519e60e596b7d596f86f09"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga8b2391685a519e60e596b7d596f86f09">TIM_OC3PreloadConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPreload)</td></tr>
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<tr class="memdesc:ga8b2391685a519e60e596b7d596f86f09"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx peripheral Preload register on CCR3. <a href="group___t_i_m___group2.html#ga8b2391685a519e60e596b7d596f86f09">More...</a><br /></td></tr>
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<tr class="separator:ga8b2391685a519e60e596b7d596f86f09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8bf4dfb35ff0c7b494dd96579f50b1ec"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga8bf4dfb35ff0c7b494dd96579f50b1ec">TIM_OC4PreloadConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPreload)</td></tr>
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<tr class="memdesc:ga8bf4dfb35ff0c7b494dd96579f50b1ec"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx peripheral Preload register on CCR4. <a href="group___t_i_m___group2.html#ga8bf4dfb35ff0c7b494dd96579f50b1ec">More...</a><br /></td></tr>
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<tr class="separator:ga8bf4dfb35ff0c7b494dd96579f50b1ec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec82031ca62f31f5483195c09752a83a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gaec82031ca62f31f5483195c09752a83a">TIM_OC1FastConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCFast)</td></tr>
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<tr class="memdesc:gaec82031ca62f31f5483195c09752a83a"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Output Compare 1 Fast feature. <a href="group___t_i_m___group2.html#gaec82031ca62f31f5483195c09752a83a">More...</a><br /></td></tr>
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<tr class="separator:gaec82031ca62f31f5483195c09752a83a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga413359c87f46c69f1ffe2dc8fb3a65e7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga413359c87f46c69f1ffe2dc8fb3a65e7">TIM_OC2FastConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCFast)</td></tr>
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<tr class="memdesc:ga413359c87f46c69f1ffe2dc8fb3a65e7"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Output Compare 2 Fast feature. <a href="group___t_i_m___group2.html#ga413359c87f46c69f1ffe2dc8fb3a65e7">More...</a><br /></td></tr>
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<tr class="separator:ga413359c87f46c69f1ffe2dc8fb3a65e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2f3698e6e56bd9b0a4be7056ba789e1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gab2f3698e6e56bd9b0a4be7056ba789e1">TIM_OC3FastConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCFast)</td></tr>
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<tr class="memdesc:gab2f3698e6e56bd9b0a4be7056ba789e1"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Output Compare 3 Fast feature. <a href="group___t_i_m___group2.html#gab2f3698e6e56bd9b0a4be7056ba789e1">More...</a><br /></td></tr>
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<tr class="separator:gab2f3698e6e56bd9b0a4be7056ba789e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58279a04e8ea5333f1079d3cce8dde12"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga58279a04e8ea5333f1079d3cce8dde12">TIM_OC4FastConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCFast)</td></tr>
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<tr class="memdesc:ga58279a04e8ea5333f1079d3cce8dde12"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Output Compare 4 Fast feature. <a href="group___t_i_m___group2.html#ga58279a04e8ea5333f1079d3cce8dde12">More...</a><br /></td></tr>
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<tr class="separator:ga58279a04e8ea5333f1079d3cce8dde12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34e926cd8a99cfcc7480b2d6de5118b6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga34e926cd8a99cfcc7480b2d6de5118b6">TIM_ClearOC1Ref</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCClear)</td></tr>
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<tr class="memdesc:ga34e926cd8a99cfcc7480b2d6de5118b6"><td class="mdescLeft"> </td><td class="mdescRight">Clears or safeguards the OCREF1 signal on an external event. <a href="group___t_i_m___group2.html#ga34e926cd8a99cfcc7480b2d6de5118b6">More...</a><br /></td></tr>
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<tr class="separator:ga34e926cd8a99cfcc7480b2d6de5118b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac474ebc815d24c8a589969e0c68b27b0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gac474ebc815d24c8a589969e0c68b27b0">TIM_ClearOC2Ref</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCClear)</td></tr>
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<tr class="memdesc:gac474ebc815d24c8a589969e0c68b27b0"><td class="mdescLeft"> </td><td class="mdescRight">Clears or safeguards the OCREF2 signal on an external event. <a href="group___t_i_m___group2.html#gac474ebc815d24c8a589969e0c68b27b0">More...</a><br /></td></tr>
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<tr class="separator:gac474ebc815d24c8a589969e0c68b27b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bd9476a14bd346c319945ec4fa2bc67"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga0bd9476a14bd346c319945ec4fa2bc67">TIM_ClearOC3Ref</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCClear)</td></tr>
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<tr class="memdesc:ga0bd9476a14bd346c319945ec4fa2bc67"><td class="mdescLeft"> </td><td class="mdescRight">Clears or safeguards the OCREF3 signal on an external event. <a href="group___t_i_m___group2.html#ga0bd9476a14bd346c319945ec4fa2bc67">More...</a><br /></td></tr>
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<tr class="separator:ga0bd9476a14bd346c319945ec4fa2bc67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeee5fa66b26e7c6f71850272dc3028f3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gaeee5fa66b26e7c6f71850272dc3028f3">TIM_ClearOC4Ref</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCClear)</td></tr>
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<tr class="memdesc:gaeee5fa66b26e7c6f71850272dc3028f3"><td class="mdescLeft"> </td><td class="mdescRight">Clears or safeguards the OCREF4 signal on an external event. <a href="group___t_i_m___group2.html#gaeee5fa66b26e7c6f71850272dc3028f3">More...</a><br /></td></tr>
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<tr class="separator:gaeee5fa66b26e7c6f71850272dc3028f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03878f78163485c8a3508cff2111c297"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga03878f78163485c8a3508cff2111c297">TIM_OC1PolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPolarity)</td></tr>
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<tr class="memdesc:ga03878f78163485c8a3508cff2111c297"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx channel 1 polarity. <a href="group___t_i_m___group2.html#ga03878f78163485c8a3508cff2111c297">More...</a><br /></td></tr>
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<tr class="separator:ga03878f78163485c8a3508cff2111c297"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3cb91578e7dd34ea7d09862482960445"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga3cb91578e7dd34ea7d09862482960445">TIM_OC1NPolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCNPolarity)</td></tr>
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<tr class="memdesc:ga3cb91578e7dd34ea7d09862482960445"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Channel 1N polarity. <a href="group___t_i_m___group2.html#ga3cb91578e7dd34ea7d09862482960445">More...</a><br /></td></tr>
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<tr class="separator:ga3cb91578e7dd34ea7d09862482960445"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6831cacaac1ef50291af94db94450797"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga6831cacaac1ef50291af94db94450797">TIM_OC2PolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPolarity)</td></tr>
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<tr class="memdesc:ga6831cacaac1ef50291af94db94450797"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx channel 2 polarity. <a href="group___t_i_m___group2.html#ga6831cacaac1ef50291af94db94450797">More...</a><br /></td></tr>
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<tr class="separator:ga6831cacaac1ef50291af94db94450797"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2fa6ea3a89f446b52b4e699272b70cad"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga2fa6ea3a89f446b52b4e699272b70cad">TIM_OC2NPolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCNPolarity)</td></tr>
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<tr class="memdesc:ga2fa6ea3a89f446b52b4e699272b70cad"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Channel 2N polarity. <a href="group___t_i_m___group2.html#ga2fa6ea3a89f446b52b4e699272b70cad">More...</a><br /></td></tr>
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<tr class="separator:ga2fa6ea3a89f446b52b4e699272b70cad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ef43b03fe666495e80aac9741ae7ab0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga1ef43b03fe666495e80aac9741ae7ab0">TIM_OC3PolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPolarity)</td></tr>
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<tr class="memdesc:ga1ef43b03fe666495e80aac9741ae7ab0"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx channel 3 polarity. <a href="group___t_i_m___group2.html#ga1ef43b03fe666495e80aac9741ae7ab0">More...</a><br /></td></tr>
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<tr class="separator:ga1ef43b03fe666495e80aac9741ae7ab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac710acc5b682e892584fc6f089f61dc2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gac710acc5b682e892584fc6f089f61dc2">TIM_OC3NPolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCNPolarity)</td></tr>
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<tr class="memdesc:gac710acc5b682e892584fc6f089f61dc2"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Channel 3N polarity. <a href="group___t_i_m___group2.html#gac710acc5b682e892584fc6f089f61dc2">More...</a><br /></td></tr>
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<tr class="separator:gac710acc5b682e892584fc6f089f61dc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad678410f7c7244f83daad93ce9d1056e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#gad678410f7c7244f83daad93ce9d1056e">TIM_OC4PolarityConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_OCPolarity)</td></tr>
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<tr class="memdesc:gad678410f7c7244f83daad93ce9d1056e"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx channel 4 polarity. <a href="group___t_i_m___group2.html#gad678410f7c7244f83daad93ce9d1056e">More...</a><br /></td></tr>
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<tr class="separator:gad678410f7c7244f83daad93ce9d1056e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3ecc4647d9ede261beb5e0535cf29ebb"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga3ecc4647d9ede261beb5e0535cf29ebb">TIM_CCxCmd</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)</td></tr>
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<tr class="memdesc:ga3ecc4647d9ede261beb5e0535cf29ebb"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIM Capture Compare Channel x. <a href="group___t_i_m___group2.html#ga3ecc4647d9ede261beb5e0535cf29ebb">More...</a><br /></td></tr>
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<tr class="separator:ga3ecc4647d9ede261beb5e0535cf29ebb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga304ff7c8a1615498da749bf2507e9f2b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group2.html#ga304ff7c8a1615498da749bf2507e9f2b">TIM_CCxNCmd</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN)</td></tr>
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<tr class="memdesc:ga304ff7c8a1615498da749bf2507e9f2b"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIM Capture Compare Channel xN. <a href="group___t_i_m___group2.html#ga304ff7c8a1615498da749bf2507e9f2b">More...</a><br /></td></tr>
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<tr class="separator:ga304ff7c8a1615498da749bf2507e9f2b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e6a153dd6552e4e1188eba227316f7f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga9e6a153dd6552e4e1188eba227316f7f">TIM_ICInit</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___i_c_init_type_def.html">TIM_ICInitTypeDef</a> *TIM_ICInitStruct)</td></tr>
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<tr class="memdesc:ga9e6a153dd6552e4e1188eba227316f7f"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the TIM peripheral according to the specified parameters in the TIM_ICInitStruct. <a href="group___t_i_m___group3.html#ga9e6a153dd6552e4e1188eba227316f7f">More...</a><br /></td></tr>
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<tr class="separator:ga9e6a153dd6552e4e1188eba227316f7f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5005dac8e4e8a4c7fc2a0ef05b77cc50"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga5005dac8e4e8a4c7fc2a0ef05b77cc50">TIM_ICStructInit</a> (<a class="el" href="struct_t_i_m___i_c_init_type_def.html">TIM_ICInitTypeDef</a> *TIM_ICInitStruct)</td></tr>
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<tr class="memdesc:ga5005dac8e4e8a4c7fc2a0ef05b77cc50"><td class="mdescLeft"> </td><td class="mdescRight">Fills each TIM_ICInitStruct member with its default value. <a href="group___t_i_m___group3.html#ga5005dac8e4e8a4c7fc2a0ef05b77cc50">More...</a><br /></td></tr>
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<tr class="separator:ga5005dac8e4e8a4c7fc2a0ef05b77cc50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa71f9296556310f85628d6c748a06475"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#gaa71f9296556310f85628d6c748a06475">TIM_PWMIConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___i_c_init_type_def.html">TIM_ICInitTypeDef</a> *TIM_ICInitStruct)</td></tr>
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<tr class="memdesc:gaa71f9296556310f85628d6c748a06475"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIM peripheral according to the specified parameters in the TIM_ICInitStruct to measure an external PWM signal. <a href="group___t_i_m___group3.html#gaa71f9296556310f85628d6c748a06475">More...</a><br /></td></tr>
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<tr class="separator:gaa71f9296556310f85628d6c748a06475"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6bd39ca543305ff0cd06fce0f678d94d"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga6bd39ca543305ff0cd06fce0f678d94d">TIM_GetCapture1</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga6bd39ca543305ff0cd06fce0f678d94d"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Input Capture 1 value. <a href="group___t_i_m___group3.html#ga6bd39ca543305ff0cd06fce0f678d94d">More...</a><br /></td></tr>
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<tr class="separator:ga6bd39ca543305ff0cd06fce0f678d94d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2524cb5db14e388fb7f20c99fb3d58a5"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga2524cb5db14e388fb7f20c99fb3d58a5">TIM_GetCapture2</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga2524cb5db14e388fb7f20c99fb3d58a5"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Input Capture 2 value. <a href="group___t_i_m___group3.html#ga2524cb5db14e388fb7f20c99fb3d58a5">More...</a><br /></td></tr>
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<tr class="separator:ga2524cb5db14e388fb7f20c99fb3d58a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga71ee9ce2c535ec0fb3fac5f9119221f7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga71ee9ce2c535ec0fb3fac5f9119221f7">TIM_GetCapture3</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga71ee9ce2c535ec0fb3fac5f9119221f7"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Input Capture 3 value. <a href="group___t_i_m___group3.html#ga71ee9ce2c535ec0fb3fac5f9119221f7">More...</a><br /></td></tr>
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<tr class="separator:ga71ee9ce2c535ec0fb3fac5f9119221f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga420b022cbc71ac603b5dd4922687abb1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga420b022cbc71ac603b5dd4922687abb1">TIM_GetCapture4</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga420b022cbc71ac603b5dd4922687abb1"><td class="mdescLeft"> </td><td class="mdescRight">Gets the TIMx Input Capture 4 value. <a href="group___t_i_m___group3.html#ga420b022cbc71ac603b5dd4922687abb1">More...</a><br /></td></tr>
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<tr class="separator:ga420b022cbc71ac603b5dd4922687abb1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0f684dea88e222de9689d8ed0ca8805"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#gaf0f684dea88e222de9689d8ed0ca8805">TIM_SetIC1Prescaler</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ICPSC)</td></tr>
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<tr class="memdesc:gaf0f684dea88e222de9689d8ed0ca8805"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Input Capture 1 prescaler. <a href="group___t_i_m___group3.html#gaf0f684dea88e222de9689d8ed0ca8805">More...</a><br /></td></tr>
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<tr class="separator:gaf0f684dea88e222de9689d8ed0ca8805"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3cc4869b5fe73271808512c89322a325"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga3cc4869b5fe73271808512c89322a325">TIM_SetIC2Prescaler</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ICPSC)</td></tr>
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<tr class="memdesc:ga3cc4869b5fe73271808512c89322a325"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Input Capture 2 prescaler. <a href="group___t_i_m___group3.html#ga3cc4869b5fe73271808512c89322a325">More...</a><br /></td></tr>
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<tr class="separator:ga3cc4869b5fe73271808512c89322a325"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76f906383b8132ebe00dffadb70cf7f9"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga76f906383b8132ebe00dffadb70cf7f9">TIM_SetIC3Prescaler</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ICPSC)</td></tr>
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<tr class="memdesc:ga76f906383b8132ebe00dffadb70cf7f9"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Input Capture 3 prescaler. <a href="group___t_i_m___group3.html#ga76f906383b8132ebe00dffadb70cf7f9">More...</a><br /></td></tr>
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<tr class="separator:ga76f906383b8132ebe00dffadb70cf7f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f2c784271356d6b64b8c0da64dbdbc2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group3.html#ga0f2c784271356d6b64b8c0da64dbdbc2">TIM_SetIC4Prescaler</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ICPSC)</td></tr>
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<tr class="memdesc:ga0f2c784271356d6b64b8c0da64dbdbc2"><td class="mdescLeft"> </td><td class="mdescRight">Sets the TIMx Input Capture 4 prescaler. <a href="group___t_i_m___group3.html#ga0f2c784271356d6b64b8c0da64dbdbc2">More...</a><br /></td></tr>
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<tr class="separator:ga0f2c784271356d6b64b8c0da64dbdbc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3df4ba3f0727f63ce621e2b2e6035d4f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group4.html#ga3df4ba3f0727f63ce621e2b2e6035d4f">TIM_BDTRConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, <a class="el" href="struct_t_i_m___b_d_t_r_init_type_def.html">TIM_BDTRInitTypeDef</a> *TIM_BDTRInitStruct)</td></tr>
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<tr class="memdesc:ga3df4ba3f0727f63ce621e2b2e6035d4f"><td class="mdescLeft"> </td><td class="mdescRight">Configures the Break feature, dead time, Lock level, OSSI/OSSR State and the AOE(automatic output enable). <a href="group___t_i_m___group4.html#ga3df4ba3f0727f63ce621e2b2e6035d4f">More...</a><br /></td></tr>
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<tr class="separator:ga3df4ba3f0727f63ce621e2b2e6035d4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea0f49938cda8ae0738162194798afc6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group4.html#gaea0f49938cda8ae0738162194798afc6">TIM_BDTRStructInit</a> (<a class="el" href="struct_t_i_m___b_d_t_r_init_type_def.html">TIM_BDTRInitTypeDef</a> *TIM_BDTRInitStruct)</td></tr>
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<tr class="memdesc:gaea0f49938cda8ae0738162194798afc6"><td class="mdescLeft"> </td><td class="mdescRight">Fills each TIM_BDTRInitStruct member with its default value. <a href="group___t_i_m___group4.html#gaea0f49938cda8ae0738162194798afc6">More...</a><br /></td></tr>
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<tr class="separator:gaea0f49938cda8ae0738162194798afc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e59ebced2ab8e0b817c460f1670e97d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group4.html#ga3e59ebced2ab8e0b817c460f1670e97d">TIM_CtrlPWMOutputs</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga3e59ebced2ab8e0b817c460f1670e97d"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIM peripheral Main Outputs. <a href="group___t_i_m___group4.html#ga3e59ebced2ab8e0b817c460f1670e97d">More...</a><br /></td></tr>
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<tr class="separator:ga3e59ebced2ab8e0b817c460f1670e97d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaff2e7f9959b1b36e830df028c14accc8"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group4.html#gaff2e7f9959b1b36e830df028c14accc8">TIM_SelectCOM</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gaff2e7f9959b1b36e830df028c14accc8"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIM peripheral Commutation event. <a href="group___t_i_m___group4.html#gaff2e7f9959b1b36e830df028c14accc8">More...</a><br /></td></tr>
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<tr class="separator:gaff2e7f9959b1b36e830df028c14accc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0a935254e44312b1d78e8684a58db3c1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group4.html#ga0a935254e44312b1d78e8684a58db3c1">TIM_CCPreloadControl</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga0a935254e44312b1d78e8684a58db3c1"><td class="mdescLeft"> </td><td class="mdescRight">Sets or Resets the TIM peripheral Capture Compare Preload Control bit. <a href="group___t_i_m___group4.html#ga0a935254e44312b1d78e8684a58db3c1">More...</a><br /></td></tr>
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<tr class="separator:ga0a935254e44312b1d78e8684a58db3c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70e3d6c09d55ee69002e154c85cd40e4"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga70e3d6c09d55ee69002e154c85cd40e4">TIM_ITConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_IT, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga70e3d6c09d55ee69002e154c85cd40e4"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified TIM interrupts. <a href="group___t_i_m___group5.html#ga70e3d6c09d55ee69002e154c85cd40e4">More...</a><br /></td></tr>
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<tr class="separator:ga70e3d6c09d55ee69002e154c85cd40e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga38bd4ffda920dd4f7655a0a2c6100a6e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga38bd4ffda920dd4f7655a0a2c6100a6e">TIM_GenerateEvent</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_EventSource)</td></tr>
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<tr class="memdesc:ga38bd4ffda920dd4f7655a0a2c6100a6e"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx event to be generate by software. <a href="group___t_i_m___group5.html#ga38bd4ffda920dd4f7655a0a2c6100a6e">More...</a><br /></td></tr>
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<tr class="separator:ga38bd4ffda920dd4f7655a0a2c6100a6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0adcbbd5e838ec8642e7a9b80075f41f"><td class="memItemLeft" align="right" valign="top">FlagStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga0adcbbd5e838ec8642e7a9b80075f41f">TIM_GetFlagStatus</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_FLAG)</td></tr>
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<tr class="memdesc:ga0adcbbd5e838ec8642e7a9b80075f41f"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the specified TIM flag is set or not. <a href="group___t_i_m___group5.html#ga0adcbbd5e838ec8642e7a9b80075f41f">More...</a><br /></td></tr>
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<tr class="separator:ga0adcbbd5e838ec8642e7a9b80075f41f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga46568c7b254941dc53e785342d60baf3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga46568c7b254941dc53e785342d60baf3">TIM_ClearFlag</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_FLAG)</td></tr>
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<tr class="memdesc:ga46568c7b254941dc53e785342d60baf3"><td class="mdescLeft"> </td><td class="mdescRight">Clears the TIMx's pending flags. <a href="group___t_i_m___group5.html#ga46568c7b254941dc53e785342d60baf3">More...</a><br /></td></tr>
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<tr class="separator:ga46568c7b254941dc53e785342d60baf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0827a0b411707304f76d33050727c24d"><td class="memItemLeft" align="right" valign="top">ITStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga0827a0b411707304f76d33050727c24d">TIM_GetITStatus</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_IT)</td></tr>
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<tr class="memdesc:ga0827a0b411707304f76d33050727c24d"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the TIM interrupt has occurred or not. <a href="group___t_i_m___group5.html#ga0827a0b411707304f76d33050727c24d">More...</a><br /></td></tr>
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<tr class="separator:ga0827a0b411707304f76d33050727c24d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9eb1e95af71ed380f51a2c6d585cc5d6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga9eb1e95af71ed380f51a2c6d585cc5d6">TIM_ClearITPendingBit</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_IT)</td></tr>
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<tr class="memdesc:ga9eb1e95af71ed380f51a2c6d585cc5d6"><td class="mdescLeft"> </td><td class="mdescRight">Clears the TIMx's interrupt pending bits. <a href="group___t_i_m___group5.html#ga9eb1e95af71ed380f51a2c6d585cc5d6">More...</a><br /></td></tr>
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<tr class="separator:ga9eb1e95af71ed380f51a2c6d585cc5d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7156f84c436c8ac92cd789611826d09"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#gad7156f84c436c8ac92cd789611826d09">TIM_DMAConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength)</td></tr>
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<tr class="memdesc:gad7156f84c436c8ac92cd789611826d09"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx's DMA interface. <a href="group___t_i_m___group5.html#gad7156f84c436c8ac92cd789611826d09">More...</a><br /></td></tr>
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<tr class="separator:gad7156f84c436c8ac92cd789611826d09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga24700389cfa3ea9b42234933b23f1399"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga24700389cfa3ea9b42234933b23f1399">TIM_DMACmd</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_DMASource, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga24700389cfa3ea9b42234933b23f1399"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx's DMA Requests. <a href="group___t_i_m___group5.html#ga24700389cfa3ea9b42234933b23f1399">More...</a><br /></td></tr>
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<tr class="separator:ga24700389cfa3ea9b42234933b23f1399"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5273cb65acb885fe7982827b1c6b7d75"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group5.html#ga5273cb65acb885fe7982827b1c6b7d75">TIM_SelectCCDMA</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga5273cb65acb885fe7982827b1c6b7d75"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIMx peripheral Capture Compare DMA source. <a href="group___t_i_m___group5.html#ga5273cb65acb885fe7982827b1c6b7d75">More...</a><br /></td></tr>
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<tr class="separator:ga5273cb65acb885fe7982827b1c6b7d75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2394f0221709c0659874f9a4184cf86e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group6.html#ga2394f0221709c0659874f9a4184cf86e">TIM_InternalClockConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx)</td></tr>
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<tr class="memdesc:ga2394f0221709c0659874f9a4184cf86e"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx internal Clock. <a href="group___t_i_m___group6.html#ga2394f0221709c0659874f9a4184cf86e">More...</a><br /></td></tr>
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<tr class="separator:ga2394f0221709c0659874f9a4184cf86e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabef227d21d9e121e6a4ec5ab6223f5a9"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group6.html#gabef227d21d9e121e6a4ec5ab6223f5a9">TIM_ITRxExternalClockConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_InputTriggerSource)</td></tr>
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<tr class="memdesc:gabef227d21d9e121e6a4ec5ab6223f5a9"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Internal Trigger as External Clock. <a href="group___t_i_m___group6.html#gabef227d21d9e121e6a4ec5ab6223f5a9">More...</a><br /></td></tr>
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<tr class="separator:gabef227d21d9e121e6a4ec5ab6223f5a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf460e7d9c9969044e364130e209937fc"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group6.html#gaf460e7d9c9969044e364130e209937fc">TIM_TIxExternalClockConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_TIxExternalCLKSource, uint16_t TIM_ICPolarity, uint16_t ICFilter)</td></tr>
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<tr class="memdesc:gaf460e7d9c9969044e364130e209937fc"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Trigger as External Clock. <a href="group___t_i_m___group6.html#gaf460e7d9c9969044e364130e209937fc">More...</a><br /></td></tr>
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<tr class="separator:gaf460e7d9c9969044e364130e209937fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47c05638b93aabcd641dbc8859e1b2df"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group6.html#ga47c05638b93aabcd641dbc8859e1b2df">TIM_ETRClockMode1Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)</td></tr>
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<tr class="memdesc:ga47c05638b93aabcd641dbc8859e1b2df"><td class="mdescLeft"> </td><td class="mdescRight">Configures the External clock Mode1. <a href="group___t_i_m___group6.html#ga47c05638b93aabcd641dbc8859e1b2df">More...</a><br /></td></tr>
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<tr class="separator:ga47c05638b93aabcd641dbc8859e1b2df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0a9cbcbab32326cbbdaf4c111f59ec20"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group6.html#ga0a9cbcbab32326cbbdaf4c111f59ec20">TIM_ETRClockMode2Config</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)</td></tr>
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<tr class="memdesc:ga0a9cbcbab32326cbbdaf4c111f59ec20"><td class="mdescLeft"> </td><td class="mdescRight">Configures the External clock Mode2. <a href="group___t_i_m___group6.html#ga0a9cbcbab32326cbbdaf4c111f59ec20">More...</a><br /></td></tr>
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<tr class="separator:ga0a9cbcbab32326cbbdaf4c111f59ec20"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4252583c6ae8a73d6fc66f7e951dbc35"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group7.html#ga4252583c6ae8a73d6fc66f7e951dbc35">TIM_SelectInputTrigger</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_InputTriggerSource)</td></tr>
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<tr class="memdesc:ga4252583c6ae8a73d6fc66f7e951dbc35"><td class="mdescLeft"> </td><td class="mdescRight">Selects the Input Trigger source. <a href="group___t_i_m___group7.html#ga4252583c6ae8a73d6fc66f7e951dbc35">More...</a><br /></td></tr>
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<tr class="separator:ga4252583c6ae8a73d6fc66f7e951dbc35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga28745aaa549e2067e42c19569209e6c6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group7.html#ga28745aaa549e2067e42c19569209e6c6">TIM_SelectOutputTrigger</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_TRGOSource)</td></tr>
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<tr class="memdesc:ga28745aaa549e2067e42c19569209e6c6"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIMx Trigger Output Mode. <a href="group___t_i_m___group7.html#ga28745aaa549e2067e42c19569209e6c6">More...</a><br /></td></tr>
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<tr class="separator:ga28745aaa549e2067e42c19569209e6c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f19ce1d90990691cf037e419ba08003"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group7.html#ga2f19ce1d90990691cf037e419ba08003">TIM_SelectSlaveMode</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_SlaveMode)</td></tr>
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<tr class="memdesc:ga2f19ce1d90990691cf037e419ba08003"><td class="mdescLeft"> </td><td class="mdescRight">Selects the TIMx Slave Mode. <a href="group___t_i_m___group7.html#ga2f19ce1d90990691cf037e419ba08003">More...</a><br /></td></tr>
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<tr class="separator:ga2f19ce1d90990691cf037e419ba08003"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4dcc3d11b670c381d0ff9cb7e9fd01e2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group7.html#ga4dcc3d11b670c381d0ff9cb7e9fd01e2">TIM_SelectMasterSlaveMode</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_MasterSlaveMode)</td></tr>
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<tr class="memdesc:ga4dcc3d11b670c381d0ff9cb7e9fd01e2"><td class="mdescLeft"> </td><td class="mdescRight">Sets or Resets the TIMx Master/Slave Mode. <a href="group___t_i_m___group7.html#ga4dcc3d11b670c381d0ff9cb7e9fd01e2">More...</a><br /></td></tr>
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<tr class="separator:ga4dcc3d11b670c381d0ff9cb7e9fd01e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8bdde400b7a30f3e747fe8e4962c0abe"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group7.html#ga8bdde400b7a30f3e747fe8e4962c0abe">TIM_ETRConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)</td></tr>
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<tr class="memdesc:ga8bdde400b7a30f3e747fe8e4962c0abe"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx External Trigger (ETR). <a href="group___t_i_m___group7.html#ga8bdde400b7a30f3e747fe8e4962c0abe">More...</a><br /></td></tr>
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<tr class="separator:ga8bdde400b7a30f3e747fe8e4962c0abe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0fc7e76c47a3bd1ba1ebc71427832b51"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group8.html#ga0fc7e76c47a3bd1ba1ebc71427832b51">TIM_EncoderInterfaceConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)</td></tr>
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<tr class="memdesc:ga0fc7e76c47a3bd1ba1ebc71427832b51"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIMx Encoder Interface. <a href="group___t_i_m___group8.html#ga0fc7e76c47a3bd1ba1ebc71427832b51">More...</a><br /></td></tr>
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<tr class="separator:ga0fc7e76c47a3bd1ba1ebc71427832b51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42c2d1025a3937c9d9f38631af86ffa4"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group8.html#ga42c2d1025a3937c9d9f38631af86ffa4">TIM_SelectHallSensor</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga42c2d1025a3937c9d9f38631af86ffa4"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the TIMx's Hall sensor interface. <a href="group___t_i_m___group8.html#ga42c2d1025a3937c9d9f38631af86ffa4">More...</a><br /></td></tr>
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<tr class="separator:ga42c2d1025a3937c9d9f38631af86ffa4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga08ffb6f2bfa96b6fbcbb8d8001cb8ba9"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m___group9.html#ga08ffb6f2bfa96b6fbcbb8d8001cb8ba9">TIM_RemapConfig</a> (<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *TIMx, uint16_t TIM_Remap)</td></tr>
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<tr class="memdesc:ga08ffb6f2bfa96b6fbcbb8d8001cb8ba9"><td class="mdescLeft"> </td><td class="mdescRight">Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. <a href="group___t_i_m___group9.html#ga08ffb6f2bfa96b6fbcbb8d8001cb8ba9">More...</a><br /></td></tr>
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<tr class="separator:ga08ffb6f2bfa96b6fbcbb8d8001cb8ba9"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>This file provides firmware functions to manage the following functionalities of the TIM peripheral: </p>
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<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
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<dl class="section version"><dt>Version</dt><dd>V1.4.0 </dd></dl>
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<dl class="section date"><dt>Date</dt><dd>04-August-2014<ul>
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<li>TimeBase management</li>
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<li>Output Compare management</li>
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<li>Input Capture management</li>
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<li>Advanced-control timers (TIM1 and TIM8) specific features</li>
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<li>Interrupts, DMA and flags management</li>
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<li>Clocks management</li>
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<li>Synchronization management</li>
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<li>Specific interface management</li>
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<li>Specific remapping management</li>
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</ul>
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</dd></dl>
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<pre class="fragment">===============================================================================
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##### How to use this driver #####
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===============================================================================
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[..]
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This driver provides functions to configure and program the TIM
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of all STM32F4xx devices.
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These functions are split in 9 groups:
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(#) TIM TimeBase management: this group includes all needed functions
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to configure the TM Timebase unit:
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(++) Set/Get Prescaler
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(++) Set/Get Autoreload
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(++) Counter modes configuration
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(++) Set Clock division
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(++) Select the One Pulse mode
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(++) Update Request Configuration
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(++) Update Disable Configuration
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(++) Auto-Preload Configuration
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(++) Enable/Disable the counter
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(#) TIM Output Compare management: this group includes all needed
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functions to configure the Capture/Compare unit used in Output
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compare mode:
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(++) Configure each channel, independently, in Output Compare mode
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(++) Select the output compare modes
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(++) Select the Polarities of each channel
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(++) Set/Get the Capture/Compare register values
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(++) Select the Output Compare Fast mode
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(++) Select the Output Compare Forced mode
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(++) Output Compare-Preload Configuration
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(++) Clear Output Compare Reference
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(++) Select the OCREF Clear signal
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(++) Enable/Disable the Capture/Compare Channels
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(#) TIM Input Capture management: this group includes all needed
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functions to configure the Capture/Compare unit used in
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Input Capture mode:
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(++) Configure each channel in input capture mode
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(++) Configure Channel1/2 in PWM Input mode
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(++) Set the Input Capture Prescaler
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(++) Get the Capture/Compare values
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(#) Advanced-control timers (TIM1 and TIM8) specific features
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(++) Configures the Break input, dead time, Lock level, the OSSI,
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the OSSR State and the AOE(automatic output enable)
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(++) Enable/Disable the TIM peripheral Main Outputs
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(++) Select the Commutation event
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(++) Set/Reset the Capture Compare Preload Control bit
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(#) TIM interrupts, DMA and flags management
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(++) Enable/Disable interrupt sources
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(++) Get flags status
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(++) Clear flags/ Pending bits
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(++) Enable/Disable DMA requests
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(++) Configure DMA burst mode
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(++) Select CaptureCompare DMA request
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(#) TIM clocks management: this group includes all needed functions
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to configure the clock controller unit:
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(++) Select internal/External clock
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(++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx
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(#) TIM synchronization management: this group includes all needed
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functions to configure the Synchronization unit:
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(++) Select Input Trigger
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(++) Select Output Trigger
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(++) Select Master Slave Mode
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(++) ETR Configuration when used as external trigger
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(#) TIM specific interface management, this group includes all
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needed functions to use the specific TIM interface:
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(++) Encoder Interface Configuration
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(++) Select Hall Sensor
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(#) TIM specific remapping management includes the Remapping
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configuration of specific timers </pre><dl class="section attention"><dt>Attention</dt><dd></dd></dl>
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<h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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<p>Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at: </p><pre class="fragment"> http://www.st.com/software_license_agreement_liberty_v2
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</pre><p>Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. </p>
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