302 lines
31 KiB
HTML
302 lines
31 KiB
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<a href="#define-members">Macros</a> |
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<a href="#func-members">Functions</a> </div>
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<div class="title">stm32f4xx_dac.c File Reference</div> </div>
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<p>This file provides firmware functions to manage the following functionalities of the Digital-to-Analog Converter (DAC) peripheral:
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<a href="#details">More...</a></p>
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<div class="textblock"><code>#include "<a class="el" href="stm32f4xx__dac_8h_source.html">stm32f4xx_dac.h</a>"</code><br />
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<code>#include "<a class="el" href="stm32f4xx__rcc_8h_source.html">stm32f4xx_rcc.h</a>"</code><br />
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Include dependency graph for stm32f4xx_dac.c:</div>
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<div class="center"><img src="stm32f4xx__dac_8c__incl.png" border="0" usemap="#discovery_2libs_2_stm_core_n_pheriph_2src_2stm32f4xx__dac_8c" alt=""/></div>
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</div><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga8a5812a1d5ced986bb997a4bb7ae697d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a5812a1d5ced986bb997a4bb7ae697d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>CR_CLEAR_MASK</b>   ((uint32_t)0x00000FFE)</td></tr>
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<tr class="separator:ga8a5812a1d5ced986bb997a4bb7ae697d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6401668f65168b2b689b49155f380bdd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6401668f65168b2b689b49155f380bdd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DUAL_SWTRIG_SET</b>   ((uint32_t)0x00000003)</td></tr>
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<tr class="separator:ga6401668f65168b2b689b49155f380bdd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd3ce00f8b25892532af267f26932ed7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd3ce00f8b25892532af267f26932ed7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DUAL_SWTRIG_RESET</b>   ((uint32_t)0xFFFFFFFC)</td></tr>
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<tr class="separator:gacd3ce00f8b25892532af267f26932ed7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1305e3b7cfb0f898678baeab6e91cbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf1305e3b7cfb0f898678baeab6e91cbf"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DHR12R1_OFFSET</b>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gaf1305e3b7cfb0f898678baeab6e91cbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga157b0fbccea090637eea09172fdd6a39"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga157b0fbccea090637eea09172fdd6a39"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DHR12R2_OFFSET</b>   ((uint32_t)0x00000014)</td></tr>
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<tr class="separator:ga157b0fbccea090637eea09172fdd6a39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2893b0491ec29a95fd061e5e0fa029e3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2893b0491ec29a95fd061e5e0fa029e3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DHR12RD_OFFSET</b>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga2893b0491ec29a95fd061e5e0fa029e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga051bab7263211bd232d13665339c1745"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga051bab7263211bd232d13665339c1745"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>DOR_OFFSET</b>   ((uint32_t)0x0000002C)</td></tr>
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<tr class="separator:ga051bab7263211bd232d13665339c1745"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga1fae225204e1e049d6795319e99ba8bc"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga1fae225204e1e049d6795319e99ba8bc">DAC_DeInit</a> (void)</td></tr>
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<tr class="memdesc:ga1fae225204e1e049d6795319e99ba8bc"><td class="mdescLeft"> </td><td class="mdescRight">Deinitializes the DAC peripheral registers to their default reset values. <a href="group___d_a_c___group1.html#ga1fae225204e1e049d6795319e99ba8bc">More...</a><br /></td></tr>
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<tr class="separator:ga1fae225204e1e049d6795319e99ba8bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c59850468ed4bf0659663fe495441da"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga7c59850468ed4bf0659663fe495441da">DAC_Init</a> (uint32_t DAC_Channel, <a class="el" href="struct_d_a_c___init_type_def.html">DAC_InitTypeDef</a> *DAC_InitStruct)</td></tr>
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<tr class="memdesc:ga7c59850468ed4bf0659663fe495441da"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the DAC peripheral according to the specified parameters in the DAC_InitStruct. <a href="group___d_a_c___group1.html#ga7c59850468ed4bf0659663fe495441da">More...</a><br /></td></tr>
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<tr class="separator:ga7c59850468ed4bf0659663fe495441da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadfc270974d54cb5fa5f92556015c4046"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#gadfc270974d54cb5fa5f92556015c4046">DAC_StructInit</a> (<a class="el" href="struct_d_a_c___init_type_def.html">DAC_InitTypeDef</a> *DAC_InitStruct)</td></tr>
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<tr class="memdesc:gadfc270974d54cb5fa5f92556015c4046"><td class="mdescLeft"> </td><td class="mdescRight">Fills each DAC_InitStruct member with its default value. <a href="group___d_a_c___group1.html#gadfc270974d54cb5fa5f92556015c4046">More...</a><br /></td></tr>
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<tr class="separator:gadfc270974d54cb5fa5f92556015c4046"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga323e61530d7fa9396c3bce9edb61f733"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga323e61530d7fa9396c3bce9edb61f733">DAC_Cmd</a> (uint32_t DAC_Channel, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga323e61530d7fa9396c3bce9edb61f733"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified DAC channel. <a href="group___d_a_c___group1.html#ga323e61530d7fa9396c3bce9edb61f733">More...</a><br /></td></tr>
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<tr class="separator:ga323e61530d7fa9396c3bce9edb61f733"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga46f9f7f6b9520a86e300fe966afe5fb3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga46f9f7f6b9520a86e300fe966afe5fb3">DAC_SoftwareTriggerCmd</a> (uint32_t DAC_Channel, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga46f9f7f6b9520a86e300fe966afe5fb3"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the selected DAC channel software trigger. <a href="group___d_a_c___group1.html#ga46f9f7f6b9520a86e300fe966afe5fb3">More...</a><br /></td></tr>
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<tr class="separator:ga46f9f7f6b9520a86e300fe966afe5fb3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4d3b364a6b184dcd65f3b294ebf56dc"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#gab4d3b364a6b184dcd65f3b294ebf56dc">DAC_DualSoftwareTriggerCmd</a> (FunctionalState NewState)</td></tr>
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<tr class="memdesc:gab4d3b364a6b184dcd65f3b294ebf56dc"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables simultaneously the two DAC channels software triggers. <a href="group___d_a_c___group1.html#gab4d3b364a6b184dcd65f3b294ebf56dc">More...</a><br /></td></tr>
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<tr class="separator:gab4d3b364a6b184dcd65f3b294ebf56dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd51ae6880821d4dcd923969ec19a19e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#gabd51ae6880821d4dcd923969ec19a19e">DAC_WaveGenerationCmd</a> (uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)</td></tr>
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<tr class="memdesc:gabd51ae6880821d4dcd923969ec19a19e"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the selected DAC channel wave generation. <a href="group___d_a_c___group1.html#gabd51ae6880821d4dcd923969ec19a19e">More...</a><br /></td></tr>
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<tr class="separator:gabd51ae6880821d4dcd923969ec19a19e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad06b4230d2b17d1d13f41dce4c782461"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#gad06b4230d2b17d1d13f41dce4c782461">DAC_SetChannel1Data</a> (uint32_t DAC_Align, uint16_t Data)</td></tr>
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<tr class="memdesc:gad06b4230d2b17d1d13f41dce4c782461"><td class="mdescLeft"> </td><td class="mdescRight">Set the specified data holding register value for DAC channel1. <a href="group___d_a_c___group1.html#gad06b4230d2b17d1d13f41dce4c782461">More...</a><br /></td></tr>
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<tr class="separator:gad06b4230d2b17d1d13f41dce4c782461"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44e12006ec186791378d132da8541552"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga44e12006ec186791378d132da8541552">DAC_SetChannel2Data</a> (uint32_t DAC_Align, uint16_t Data)</td></tr>
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<tr class="memdesc:ga44e12006ec186791378d132da8541552"><td class="mdescLeft"> </td><td class="mdescRight">Set the specified data holding register value for DAC channel2. <a href="group___d_a_c___group1.html#ga44e12006ec186791378d132da8541552">More...</a><br /></td></tr>
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<tr class="separator:ga44e12006ec186791378d132da8541552"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ca2cfdf56ab35a23f2517f23d7fbb24"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga4ca2cfdf56ab35a23f2517f23d7fbb24">DAC_SetDualChannelData</a> (uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)</td></tr>
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<tr class="memdesc:ga4ca2cfdf56ab35a23f2517f23d7fbb24"><td class="mdescLeft"> </td><td class="mdescRight">Set the specified data holding register value for dual channel DAC. <a href="group___d_a_c___group1.html#ga4ca2cfdf56ab35a23f2517f23d7fbb24">More...</a><br /></td></tr>
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<tr class="separator:ga4ca2cfdf56ab35a23f2517f23d7fbb24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51274838de1e5dd012a82d7f44d7a50b"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group1.html#ga51274838de1e5dd012a82d7f44d7a50b">DAC_GetDataOutputValue</a> (uint32_t DAC_Channel)</td></tr>
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<tr class="memdesc:ga51274838de1e5dd012a82d7f44d7a50b"><td class="mdescLeft"> </td><td class="mdescRight">Returns the last data output value of the selected DAC channel. <a href="group___d_a_c___group1.html#ga51274838de1e5dd012a82d7f44d7a50b">More...</a><br /></td></tr>
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<tr class="separator:ga51274838de1e5dd012a82d7f44d7a50b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga194cba38f60ace11658824f0250121f4"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group2.html#ga194cba38f60ace11658824f0250121f4">DAC_DMACmd</a> (uint32_t DAC_Channel, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga194cba38f60ace11658824f0250121f4"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified DAC channel DMA request. <a href="group___d_a_c___group2.html#ga194cba38f60ace11658824f0250121f4">More...</a><br /></td></tr>
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<tr class="separator:ga194cba38f60ace11658824f0250121f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12d7495b30eae40c2570118cabbda1c3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group3.html#ga12d7495b30eae40c2570118cabbda1c3">DAC_ITConfig</a> (uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)</td></tr>
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<tr class="memdesc:ga12d7495b30eae40c2570118cabbda1c3"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the specified DAC interrupts. <a href="group___d_a_c___group3.html#ga12d7495b30eae40c2570118cabbda1c3">More...</a><br /></td></tr>
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<tr class="separator:ga12d7495b30eae40c2570118cabbda1c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ee60b78f0ccd23bfbe54bce2a2f909b"><td class="memItemLeft" align="right" valign="top">FlagStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group3.html#ga9ee60b78f0ccd23bfbe54bce2a2f909b">DAC_GetFlagStatus</a> (uint32_t DAC_Channel, uint32_t DAC_FLAG)</td></tr>
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<tr class="memdesc:ga9ee60b78f0ccd23bfbe54bce2a2f909b"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the specified DAC flag is set or not. <a href="group___d_a_c___group3.html#ga9ee60b78f0ccd23bfbe54bce2a2f909b">More...</a><br /></td></tr>
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<tr class="separator:ga9ee60b78f0ccd23bfbe54bce2a2f909b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49543c52786d70d6b6311f3fee856d37"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group3.html#ga49543c52786d70d6b6311f3fee856d37">DAC_ClearFlag</a> (uint32_t DAC_Channel, uint32_t DAC_FLAG)</td></tr>
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<tr class="memdesc:ga49543c52786d70d6b6311f3fee856d37"><td class="mdescLeft"> </td><td class="mdescRight">Clears the DAC channel's pending flags. <a href="group___d_a_c___group3.html#ga49543c52786d70d6b6311f3fee856d37">More...</a><br /></td></tr>
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<tr class="separator:ga49543c52786d70d6b6311f3fee856d37"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga541aac3b50db3a8a806ec5ef30679aca"><td class="memItemLeft" align="right" valign="top">ITStatus </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group3.html#ga541aac3b50db3a8a806ec5ef30679aca">DAC_GetITStatus</a> (uint32_t DAC_Channel, uint32_t DAC_IT)</td></tr>
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<tr class="memdesc:ga541aac3b50db3a8a806ec5ef30679aca"><td class="mdescLeft"> </td><td class="mdescRight">Checks whether the specified DAC interrupt has occurred or not. <a href="group___d_a_c___group3.html#ga541aac3b50db3a8a806ec5ef30679aca">More...</a><br /></td></tr>
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<tr class="separator:ga541aac3b50db3a8a806ec5ef30679aca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12d90e69a2642997136b23224d180641"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_c___group3.html#ga12d90e69a2642997136b23224d180641">DAC_ClearITPendingBit</a> (uint32_t DAC_Channel, uint32_t DAC_IT)</td></tr>
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<tr class="memdesc:ga12d90e69a2642997136b23224d180641"><td class="mdescLeft"> </td><td class="mdescRight">Clears the DAC channel's interrupt pending bits. <a href="group___d_a_c___group3.html#ga12d90e69a2642997136b23224d180641">More...</a><br /></td></tr>
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<tr class="separator:ga12d90e69a2642997136b23224d180641"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>This file provides firmware functions to manage the following functionalities of the Digital-to-Analog Converter (DAC) peripheral: </p>
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<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
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<dl class="section version"><dt>Version</dt><dd>V1.4.0 </dd></dl>
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<dl class="section date"><dt>Date</dt><dd>04-August-2014<ul>
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<li>DAC channels configuration: trigger, output buffer, data format</li>
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<li>DMA management</li>
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<li>Interrupts and flags management</li>
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</ul>
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</dd></dl>
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<pre class="fragment">===============================================================================
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##### DAC Peripheral features #####
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===============================================================================
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[..]
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*** DAC Channels ***
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====================
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[..]
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The device integrates two 12-bit Digital Analog Converters that can
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be used independently or simultaneously (dual mode):
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(#) DAC channel1 with DAC_OUT1 (PA4) as output
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(#) DAC channel2 with DAC_OUT2 (PA5) as output
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*** DAC Triggers ***
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====================
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[..]
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Digital to Analog conversion can be non-triggered using DAC_Trigger_None
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and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register
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using DAC_SetChannel1Data() / DAC_SetChannel2Data() functions.
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[..]
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Digital to Analog conversion can be triggered by:
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(#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
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The used pin (GPIOx_Pin9) must be configured in input mode.
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(#) Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8
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(DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
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The timer TRGO event should be selected using TIM_SelectOutputTrigger()
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(#) Software using DAC_Trigger_Software
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*** DAC Buffer mode feature ***
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===============================
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[..]
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Each DAC channel integrates an output buffer that can be used to
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reduce the output impedance, and to drive external loads directly
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without having to add an external operational amplifier.
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To enable, the output buffer use
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DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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[..]
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(@) Refer to the device datasheet for more details about output
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impedance value with and without output buffer.
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*** DAC wave generation feature ***
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===================================
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[..]
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Both DAC channels can be used to generate
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(#) Noise wave using DAC_WaveGeneration_Noise
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(#) Triangle wave using DAC_WaveGeneration_Triangle
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-@- Wave generation can be disabled using DAC_WaveGeneration_None
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*** DAC data format ***
|
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=======================
|
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[..]
|
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The DAC data format can be:
|
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(#) 8-bit right alignment using DAC_Align_8b_R
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(#) 12-bit left alignment using DAC_Align_12b_L
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(#) 12-bit right alignment using DAC_Align_12b_R
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*** DAC data value to voltage correspondence ***
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================================================
|
|
[..]
|
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The analog output voltage on each DAC channel pin is determined
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by the following equation:
|
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DAC_OUTx = VREF+ * DOR / 4095
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with DOR is the Data Output Register
|
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VEF+ is the input voltage reference (refer to the device datasheet)
|
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e.g. To set DAC_OUT1 to 0.7V, use
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DAC_SetChannel1Data(DAC_Align_12b_R, 868);
|
|
Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
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*** DMA requests ***
|
|
=====================
|
|
[..]
|
|
A DMA1 request can be generated when an external trigger (but not
|
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a software trigger) occurs if DMA1 requests are enabled using
|
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DAC_DMACmd()
|
|
[..]
|
|
DMA1 requests are mapped as following:
|
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(#) DAC channel1 : mapped on DMA1 Stream5 channel7 which must be
|
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already configured
|
|
(#) DAC channel2 : mapped on DMA1 Stream6 channel7 which must be
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already configured
|
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|
|
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##### How to use this driver #####
|
|
===============================================================================
|
|
[..]
|
|
(+) DAC APB clock must be enabled to get write access to DAC
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registers using
|
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
|
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(+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
|
|
(+) Configure the DAC channel using DAC_Init() function
|
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(+) Enable the DAC channel using DAC_Cmd() function</pre><dl class="section attention"><dt>Attention</dt><dd></dd></dl>
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<h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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<p>Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at: </p><pre class="fragment"> http://www.st.com/software_license_agreement_liberty_v2
|
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</pre><p>Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. </p>
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