12555 lines
2.3 MiB
12555 lines
2.3 MiB
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<div class="title">stm32f4xx.h File Reference</div> </div>
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<p>CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral register's definitions, bits definitions and memory mapping for STM32F4xx devices.
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<a href="#details">More...</a></p>
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<div class="textblock"><code>#include "<a class="el" href="core__cm4_8h_source.html">core_cm4.h</a>"</code><br />
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<code>#include "<a class="el" href="system__stm32f4xx_8h_source.html">system_stm32f4xx.h</a>"</code><br />
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<code>#include <stdint.h></code><br />
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<code>#include "stm32f4xx_conf.h"</code><br />
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Include dependency graph for stm32f4xx.h:</div>
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<p><a href="stm32f4xx_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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Classes</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html">ADC_TypeDef</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Analog to Digital Converter. <a href="struct_a_d_c___type_def.html#details">More...</a><br /></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___common___type_def.html">ADC_Common_TypeDef</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_a_n___tx_mail_box___type_def.html">CAN_TxMailBox_TypeDef</a></td></tr>
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||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Controller Area Network TxMailBox. <a href="struct_c_a_n___tx_mail_box___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_a_n___f_i_f_o_mail_box___type_def.html">CAN_FIFOMailBox_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Controller Area Network FIFOMailBox. <a href="struct_c_a_n___f_i_f_o_mail_box___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_a_n___filter_register___type_def.html">CAN_FilterRegister_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Controller Area Network FilterRegister. <a href="struct_c_a_n___filter_register___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_a_n___type_def.html">CAN_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Controller Area Network. <a href="struct_c_a_n___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_r_c___type_def.html">CRC_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">CRC calculation unit. <a href="struct_c_r_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_a_c___type_def.html">DAC_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Digital to Analog Converter. <a href="struct_d_a_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_b_g_m_c_u___type_def.html">DBGMCU_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Debug MCU. <a href="struct_d_b_g_m_c_u___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_c_m_i___type_def.html">DCMI_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">DCMI. <a href="struct_d_c_m_i___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">DMA Controller. <a href="struct_d_m_a___stream___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_m_a___type_def.html">DMA_TypeDef</a></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_m_a2_d___type_def.html">DMA2D_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">DMA2D Controller. <a href="struct_d_m_a2_d___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_e_t_h___type_def.html">ETH_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Ethernet MAC. <a href="struct_e_t_h___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_e_x_t_i___type_def.html">EXTI_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">External Interrupt/Event Controller. <a href="struct_e_x_t_i___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_l_a_s_h___type_def.html">FLASH_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">FLASH Registers. <a href="struct_f_l_a_s_h___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_s_m_c___bank1___type_def.html">FSMC_Bank1_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Flexible Static Memory Controller. <a href="struct_f_s_m_c___bank1___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_s_m_c___bank1_e___type_def.html">FSMC_Bank1E_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Flexible Static Memory Controller Bank1E. <a href="struct_f_s_m_c___bank1_e___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_s_m_c___bank2___type_def.html">FSMC_Bank2_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Flexible Static Memory Controller Bank2. <a href="struct_f_s_m_c___bank2___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_s_m_c___bank3___type_def.html">FSMC_Bank3_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Flexible Static Memory Controller Bank3. <a href="struct_f_s_m_c___bank3___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_s_m_c___bank4___type_def.html">FSMC_Bank4_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Flexible Static Memory Controller Bank4. <a href="struct_f_s_m_c___bank4___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">General Purpose I/O. <a href="struct_g_p_i_o___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_y_s_c_f_g___type_def.html">SYSCFG_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">System configuration controller. <a href="struct_s_y_s_c_f_g___type_def.html#details">More...</a><br /></td></tr>
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||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i2_c___type_def.html">I2C_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Inter-integrated Circuit Interface. <a href="struct_i2_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_w_d_g___type_def.html">IWDG_TypeDef</a></td></tr>
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||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Independent WATCHDOG. <a href="struct_i_w_d_g___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_t_d_c___type_def.html">LTDC_TypeDef</a></td></tr>
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||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">LCD-TFT Display Controller. <a href="struct_l_t_d_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_t_d_c___layer___type_def.html">LTDC_Layer_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">LCD-TFT Display layer x Controller. <a href="struct_l_t_d_c___layer___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_p_w_r___type_def.html">PWR_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Power Control. <a href="struct_p_w_r___type_def.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___type_def.html">RCC_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Reset and Clock Control. <a href="struct_r_c_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_t_c___type_def.html">RTC_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Real-Time Clock. <a href="struct_r_t_c___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_a_i___type_def.html">SAI_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Serial Audio Interface. <a href="struct_s_a_i___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_a_i___block___type_def.html">SAI_Block_TypeDef</a></td></tr>
|
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_d_i_o___type_def.html">SDIO_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">SD host Interface. <a href="struct_s_d_i_o___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Serial Peripheral Interface. <a href="struct_s_p_i___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">TIM. <a href="struct_t_i_m___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Universal Synchronous Asynchronous Receiver Transmitter. <a href="struct_u_s_a_r_t___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_w_w_d_g___type_def.html">WWDG_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Window WATCHDOG. <a href="struct_w_w_d_g___type_def.html#details">More...</a><br /></td></tr>
|
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_c_r_y_p___type_def.html">CRYP_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Crypto Processor. <a href="struct_c_r_y_p___type_def.html#details">More...</a><br /></td></tr>
|
||
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_h_a_s_h___type_def.html">HASH_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">HASH. <a href="struct_h_a_s_h___type_def.html#details">More...</a><br /></td></tr>
|
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_h_a_s_h___d_i_g_e_s_t___type_def.html">HASH_DIGEST_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">HASH_DIGEST. <a href="struct_h_a_s_h___d_i_g_e_s_t___type_def.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_n_g___type_def.html">RNG_TypeDef</a></td></tr>
|
||
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">RNG. <a href="struct_r_n_g___type_def.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
||
</table><table class="memberdecls">
|
||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
|
||
Macros</h2></td></tr>
|
||
<tr class="memitem:ga317241f394c57389b4699c5f1bf9b897"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#ga317241f394c57389b4699c5f1bf9b897">STM32F40_41xxx</a></td></tr>
|
||
<tr class="separator:ga317241f394c57389b4699c5f1bf9b897"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaca81a6c87370480adbdaa6083efd243d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gaca81a6c87370480adbdaa6083efd243d">USE_STDPERIPH_DRIVER</a></td></tr>
|
||
<tr class="memdesc:gaca81a6c87370480adbdaa6083efd243d"><td class="mdescLeft"> </td><td class="mdescRight">Comment the line below if you will not use the peripherals drivers. In this case, these drivers will not be included and the application code will be based on direct access to peripherals registers. <a href="group___library__configuration__section.html#gaca81a6c87370480adbdaa6083efd243d">More...</a><br /></td></tr>
|
||
<tr class="separator:gaca81a6c87370480adbdaa6083efd243d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaeafcff4f57440c60e64812dddd13e7cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gaeafcff4f57440c60e64812dddd13e7cb">HSE_VALUE</a>   ((uint32_t)8000000)</td></tr>
|
||
<tr class="memdesc:gaeafcff4f57440c60e64812dddd13e7cb"><td class="mdescLeft"> </td><td class="mdescRight">In the following line adjust the value of External High Speed oscillator (HSE) used in your application. <a href="group___library__configuration__section.html#gaeafcff4f57440c60e64812dddd13e7cb">More...</a><br /></td></tr>
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||
<tr class="separator:gaeafcff4f57440c60e64812dddd13e7cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68ecbc9b0a1a40a1ec9d18d5e9747c4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#ga68ecbc9b0a1a40a1ec9d18d5e9747c4f">HSE_STARTUP_TIMEOUT</a>   ((uint16_t)0x05000)</td></tr>
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||
<tr class="memdesc:ga68ecbc9b0a1a40a1ec9d18d5e9747c4f"><td class="mdescLeft"> </td><td class="mdescRight">In the following line adjust the External High Speed oscillator (HSE) Startup Timeout value. <a href="group___library__configuration__section.html#ga68ecbc9b0a1a40a1ec9d18d5e9747c4f">More...</a><br /></td></tr>
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<tr class="separator:ga68ecbc9b0a1a40a1ec9d18d5e9747c4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa8c76e274d0f6dd2cefb5d0b17fbc37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gaaa8c76e274d0f6dd2cefb5d0b17fbc37">HSI_VALUE</a>   ((uint32_t)16000000)</td></tr>
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<tr class="separator:gaaa8c76e274d0f6dd2cefb5d0b17fbc37"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gab16ffe03509714c63d5e530131c494f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gab16ffe03509714c63d5e530131c494f4">__STM32F4XX_STDPERIPH_VERSION_MAIN</a>   (0x01)</td></tr>
|
||
<tr class="memdesc:gab16ffe03509714c63d5e530131c494f4"><td class="mdescLeft"> </td><td class="mdescRight">STM32F4XX Standard Peripherals Library version number V1.4.0. <a href="group___library__configuration__section.html#gab16ffe03509714c63d5e530131c494f4">More...</a><br /></td></tr>
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<tr class="separator:gab16ffe03509714c63d5e530131c494f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadce716e810a51b042298fb21b63e5366"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gadce716e810a51b042298fb21b63e5366">__STM32F4XX_STDPERIPH_VERSION_SUB1</a>   (0x04)</td></tr>
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<tr class="separator:gadce716e810a51b042298fb21b63e5366"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b16607e43a35289dc5ebb608b1261d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#ga4b16607e43a35289dc5ebb608b1261d4">__STM32F4XX_STDPERIPH_VERSION_SUB2</a>   (0x00)</td></tr>
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<tr class="separator:ga4b16607e43a35289dc5ebb608b1261d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5bec5e54ac96b9238a6363f2088f85c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___library__configuration__section.html#gad5bec5e54ac96b9238a6363f2088f85c">__STM32F4XX_STDPERIPH_VERSION_RC</a>   (0x00)</td></tr>
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<tr class="separator:gad5bec5e54ac96b9238a6363f2088f85c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2e0157b17c803dbc58b024ec8b2942e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><b>__STM32F4XX_STDPERIPH_VERSION</b></td></tr>
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<tr class="separator:ga2e0157b17c803dbc58b024ec8b2942e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#ga45a97e4bb8b6ce7c334acc5f45ace3ba">__CM4_REV</a>   0x0001</td></tr>
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||
<tr class="memdesc:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="mdescLeft"> </td><td class="mdescRight">Configuration of the Cortex-M4 Processor and Core Peripherals. <a href="group___configuration__section__for___c_m_s_i_s.html#ga45a97e4bb8b6ce7c334acc5f45ace3ba">More...</a><br /></td></tr>
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<tr class="separator:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4127d1b31aaf336fab3d7329d117f448"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a>   1</td></tr>
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||
<tr class="separator:ga4127d1b31aaf336fab3d7329d117f448"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3fe3587d5100c787e02102ce3944460"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>   4</td></tr>
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<tr class="separator:gae3fe3587d5100c787e02102ce3944460"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a>   0</td></tr>
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<tr class="separator:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a>   1</td></tr>
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<tr class="separator:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffaf7c3f537d7a3370b1bbdda67a2bf6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaffaf7c3f537d7a3370b1bbdda67a2bf6"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>IS_FUNCTIONAL_STATE</b>(STATE)   (((STATE) == DISABLE) || ((STATE) == ENABLE))</td></tr>
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<tr class="separator:gaffaf7c3f537d7a3370b1bbdda67a2bf6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23a9099a5f8fc9c6e253c0eecb2be8db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#ga23a9099a5f8fc9c6e253c0eecb2be8db">FLASH_BASE</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga23a9099a5f8fc9c6e253c0eecb2be8db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabea1f1810ebeac402164b42ab54bcdf9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gabea1f1810ebeac402164b42ab54bcdf9">CCMDATARAM_BASE</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gabea1f1810ebeac402164b42ab54bcdf9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d0fbfb8894012dbbb96754b95e562cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#ga7d0fbfb8894012dbbb96754b95e562cd">SRAM1_BASE</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga7d0fbfb8894012dbbb96754b95e562cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbb42a3d0a8a90a79d2146e4014241b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gadbb42a3d0a8a90a79d2146e4014241b1">SRAM2_BASE</a>   ((uint32_t)0x2001C000)</td></tr>
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||
<tr class="separator:gadbb42a3d0a8a90a79d2146e4014241b1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gadb41012a2428a526d7ee5ff0f61d2344"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gadb41012a2428a526d7ee5ff0f61d2344">SRAM3_BASE</a>   ((uint32_t)0x20020000)</td></tr>
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||
<tr class="separator:gadb41012a2428a526d7ee5ff0f61d2344"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9171f49478fa86d932f89e78e73b88b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#ga9171f49478fa86d932f89e78e73b88b0">PERIPH_BASE</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga9171f49478fa86d932f89e78e73b88b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52e57051bdf8909222b36e5408a48f32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#ga52e57051bdf8909222b36e5408a48f32">BKPSRAM_BASE</a>   ((uint32_t)0x40024000)</td></tr>
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<tr class="separator:ga52e57051bdf8909222b36e5408a48f32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddf0e199dccba83272b20c9fb4d3aaed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a>   ((uint32_t)0xA0000000)</td></tr>
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<tr class="separator:gaddf0e199dccba83272b20c9fb4d3aaed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf98d1f99ecd952ee59e80b345d835bb0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaf98d1f99ecd952ee59e80b345d835bb0">CCMDATARAM_BB_BASE</a>   ((uint32_t)0x12000000)</td></tr>
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<tr class="separator:gaf98d1f99ecd952ee59e80b345d835bb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4c4f61082e4b168f29d9cf97dc3ca5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gac4c4f61082e4b168f29d9cf97dc3ca5c">SRAM1_BB_BASE</a>   ((uint32_t)0x22000000)</td></tr>
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<tr class="separator:gac4c4f61082e4b168f29d9cf97dc3ca5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac33cb6edadf184ab9860d77089503922"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gac33cb6edadf184ab9860d77089503922">SRAM2_BB_BASE</a>   ((uint32_t)0x2201C000)</td></tr>
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<tr class="separator:gac33cb6edadf184ab9860d77089503922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaebfa4db60f9ac39c7c7f3fed98090410"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaebfa4db60f9ac39c7c7f3fed98090410">SRAM3_BB_BASE</a>   ((uint32_t)0x22400000)</td></tr>
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<tr class="separator:gaebfa4db60f9ac39c7c7f3fed98090410"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaed7efc100877000845c236ccdc9e144a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaed7efc100877000845c236ccdc9e144a">PERIPH_BB_BASE</a>   ((uint32_t)0x42000000)</td></tr>
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<tr class="separator:gaed7efc100877000845c236ccdc9e144a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee19a30c9fa326bb10b547e4eaf4e250"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaee19a30c9fa326bb10b547e4eaf4e250">BKPSRAM_BB_BASE</a>   ((uint32_t)0x42024000)</td></tr>
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||
<tr class="separator:gaee19a30c9fa326bb10b547e4eaf4e250"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga05e8f3d2e5868754a7cd88614955aecc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga05e8f3d2e5868754a7cd88614955aecc"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>SRAM_BASE</b>   <a class="el" href="group___peripheral__memory__map.html#ga7d0fbfb8894012dbbb96754b95e562cd">SRAM1_BASE</a></td></tr>
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<tr class="separator:ga05e8f3d2e5868754a7cd88614955aecc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3548b6e2f017f39d399358f3ac98454"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gad3548b6e2f017f39d399358f3ac98454">SRAM_BB_BASE</a>   <a class="el" href="group___peripheral__memory__map.html#gac4c4f61082e4b168f29d9cf97dc3ca5c">SRAM1_BB_BASE</a></td></tr>
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||
<tr class="separator:gad3548b6e2f017f39d399358f3ac98454"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga45666d911f39addd4c8c0a0ac3388cfb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga45666d911f39addd4c8c0a0ac3388cfb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>APB1PERIPH_BASE</b>   <a class="el" href="group___peripheral__memory__map.html#ga9171f49478fa86d932f89e78e73b88b0">PERIPH_BASE</a></td></tr>
|
||
<tr class="separator:ga45666d911f39addd4c8c0a0ac3388cfb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga25b99d6065f1c8f751e78f43ade652cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25b99d6065f1c8f751e78f43ade652cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>APB2PERIPH_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#ga9171f49478fa86d932f89e78e73b88b0">PERIPH_BASE</a> + 0x00010000)</td></tr>
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||
<tr class="separator:ga25b99d6065f1c8f751e78f43ade652cb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga811a9a4ca17f0a50354a9169541d56c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga811a9a4ca17f0a50354a9169541d56c4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>AHB1PERIPH_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#ga9171f49478fa86d932f89e78e73b88b0">PERIPH_BASE</a> + 0x00020000)</td></tr>
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||
<tr class="separator:ga811a9a4ca17f0a50354a9169541d56c4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaeedaa71d22a1948492365e2cd26cfd46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a>   (<a class="el" href="group___peripheral__memory__map.html#ga9171f49478fa86d932f89e78e73b88b0">PERIPH_BASE</a> + 0x10000000)</td></tr>
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||
<tr class="separator:gaeedaa71d22a1948492365e2cd26cfd46"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga00d0fe6ad532ab32f0f81cafca8d3aa5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00d0fe6ad532ab32f0f81cafca8d3aa5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM2_BASE</b>   (APB1PERIPH_BASE + 0x0000)</td></tr>
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||
<tr class="separator:ga00d0fe6ad532ab32f0f81cafca8d3aa5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf0c34a518f87e1e505cd2332e989564a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf0c34a518f87e1e505cd2332e989564a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM3_BASE</b>   (APB1PERIPH_BASE + 0x0400)</td></tr>
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||
<tr class="separator:gaf0c34a518f87e1e505cd2332e989564a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56e2d44b0002f316527b8913866a370d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56e2d44b0002f316527b8913866a370d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM4_BASE</b>   (APB1PERIPH_BASE + 0x0800)</td></tr>
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||
<tr class="separator:ga56e2d44b0002f316527b8913866a370d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga3e1671477190d065ba7c944558336d7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3e1671477190d065ba7c944558336d7e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM5_BASE</b>   (APB1PERIPH_BASE + 0x0C00)</td></tr>
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||
<tr class="separator:ga3e1671477190d065ba7c944558336d7e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga8268ec947929f192559f28c6bf7d1eac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8268ec947929f192559f28c6bf7d1eac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM6_BASE</b>   (APB1PERIPH_BASE + 0x1000)</td></tr>
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||
<tr class="separator:ga8268ec947929f192559f28c6bf7d1eac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ebf54364c6a2be6eb19ded6b18b6387"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ebf54364c6a2be6eb19ded6b18b6387"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM7_BASE</b>   (APB1PERIPH_BASE + 0x1400)</td></tr>
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||
<tr class="separator:ga0ebf54364c6a2be6eb19ded6b18b6387"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33dea32fadbaecea161c2ef7927992fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33dea32fadbaecea161c2ef7927992fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM12_BASE</b>   (APB1PERIPH_BASE + 0x1800)</td></tr>
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||
<tr class="separator:ga33dea32fadbaecea161c2ef7927992fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad20f79948e9359125a40bbf6ed063590"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad20f79948e9359125a40bbf6ed063590"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM13_BASE</b>   (APB1PERIPH_BASE + 0x1C00)</td></tr>
|
||
<tr class="separator:gad20f79948e9359125a40bbf6ed063590"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga862855347d6e1d92730dfe17ee8e90b8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga862855347d6e1d92730dfe17ee8e90b8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM14_BASE</b>   (APB1PERIPH_BASE + 0x2000)</td></tr>
|
||
<tr class="separator:ga862855347d6e1d92730dfe17ee8e90b8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4265e665d56225412e57a61d87417022"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4265e665d56225412e57a61d87417022"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BASE</b>   (APB1PERIPH_BASE + 0x2800)</td></tr>
|
||
<tr class="separator:ga4265e665d56225412e57a61d87417022"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a5bf4728ab93dea5b569f5b972cbe62"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a5bf4728ab93dea5b569f5b972cbe62"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>WWDG_BASE</b>   (APB1PERIPH_BASE + 0x2C00)</td></tr>
|
||
<tr class="separator:ga9a5bf4728ab93dea5b569f5b972cbe62"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8543ee4997296af5536b007cd4748f55"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8543ee4997296af5536b007cd4748f55"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>IWDG_BASE</b>   (APB1PERIPH_BASE + 0x3000)</td></tr>
|
||
<tr class="separator:ga8543ee4997296af5536b007cd4748f55"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa5f7b241ed5b756decd835300c9e7bc9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa5f7b241ed5b756decd835300c9e7bc9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2S2ext_BASE</b>   (APB1PERIPH_BASE + 0x3400)</td></tr>
|
||
<tr class="separator:gaa5f7b241ed5b756decd835300c9e7bc9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac3e357b4c25106ed375fb1affab6bb86"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3e357b4c25106ed375fb1affab6bb86"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI2_BASE</b>   (APB1PERIPH_BASE + 0x3800)</td></tr>
|
||
<tr class="separator:gac3e357b4c25106ed375fb1affab6bb86"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae634fe8faa6922690e90fbec2fc86162"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae634fe8faa6922690e90fbec2fc86162"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI3_BASE</b>   (APB1PERIPH_BASE + 0x3C00)</td></tr>
|
||
<tr class="separator:gae634fe8faa6922690e90fbec2fc86162"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89b61d6e6b09e94f3fccb7bef34e0263"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89b61d6e6b09e94f3fccb7bef34e0263"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2S3ext_BASE</b>   (APB1PERIPH_BASE + 0x4000)</td></tr>
|
||
<tr class="separator:ga89b61d6e6b09e94f3fccb7bef34e0263"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gade83162a04bca0b15b39018a8e8ec090"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gade83162a04bca0b15b39018a8e8ec090"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART2_BASE</b>   (APB1PERIPH_BASE + 0x4400)</td></tr>
|
||
<tr class="separator:gade83162a04bca0b15b39018a8e8ec090"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe0d6539ac0026d598274ee7f45b0251"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabe0d6539ac0026d598274ee7f45b0251"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART3_BASE</b>   (APB1PERIPH_BASE + 0x4800)</td></tr>
|
||
<tr class="separator:gabe0d6539ac0026d598274ee7f45b0251"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga94d92270bf587ccdc3a37a5bb5d20467"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga94d92270bf587ccdc3a37a5bb5d20467"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART4_BASE</b>   (APB1PERIPH_BASE + 0x4C00)</td></tr>
|
||
<tr class="separator:ga94d92270bf587ccdc3a37a5bb5d20467"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa155689c0e206e6994951dc3cf31052a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa155689c0e206e6994951dc3cf31052a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART5_BASE</b>   (APB1PERIPH_BASE + 0x5000)</td></tr>
|
||
<tr class="separator:gaa155689c0e206e6994951dc3cf31052a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd72dbffb1738ca87c838545c4eb85a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd72dbffb1738ca87c838545c4eb85a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C1_BASE</b>   (APB1PERIPH_BASE + 0x5400)</td></tr>
|
||
<tr class="separator:gacd72dbffb1738ca87c838545c4eb85a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04bda70f25c795fb79f163b633ad4a5d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04bda70f25c795fb79f163b633ad4a5d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C2_BASE</b>   (APB1PERIPH_BASE + 0x5800)</td></tr>
|
||
<tr class="separator:ga04bda70f25c795fb79f163b633ad4a5d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e8b9198748235a1729e1e8f8f24983b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e8b9198748235a1729e1e8f8f24983b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C3_BASE</b>   (APB1PERIPH_BASE + 0x5C00)</td></tr>
|
||
<tr class="separator:ga4e8b9198748235a1729e1e8f8f24983b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad8e45ea6c032d9fce1b0516fff9d8eaa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad8e45ea6c032d9fce1b0516fff9d8eaa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CAN1_BASE</b>   (APB1PERIPH_BASE + 0x6400)</td></tr>
|
||
<tr class="separator:gad8e45ea6c032d9fce1b0516fff9d8eaa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf7b8267b0d439f8f3e82f86be4b9fba1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf7b8267b0d439f8f3e82f86be4b9fba1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CAN2_BASE</b>   (APB1PERIPH_BASE + 0x6800)</td></tr>
|
||
<tr class="separator:gaf7b8267b0d439f8f3e82f86be4b9fba1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac691ec23dace8b7a649a25acb110217a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac691ec23dace8b7a649a25acb110217a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>PWR_BASE</b>   (APB1PERIPH_BASE + 0x7000)</td></tr>
|
||
<tr class="separator:gac691ec23dace8b7a649a25acb110217a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad18d0b914c7f68cecbee1a2d23a67d38"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad18d0b914c7f68cecbee1a2d23a67d38"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DAC_BASE</b>   (APB1PERIPH_BASE + 0x7400)</td></tr>
|
||
<tr class="separator:gad18d0b914c7f68cecbee1a2d23a67d38"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3150e4b10ec876c0b20f22de12a8fa40"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3150e4b10ec876c0b20f22de12a8fa40"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART7_BASE</b>   (APB1PERIPH_BASE + 0x7800)</td></tr>
|
||
<tr class="separator:ga3150e4b10ec876c0b20f22de12a8fa40"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9c6cd59a248941d9d2462ab21a2346e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gac9c6cd59a248941d9d2462ab21a2346e">UART8_BASE</a>   (APB1PERIPH_BASE + 0x7C00)</td></tr>
|
||
<tr class="separator:gac9c6cd59a248941d9d2462ab21a2346e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf8aa324ca5011b8173ab16585ed7324a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8aa324ca5011b8173ab16585ed7324a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM1_BASE</b>   (APB2PERIPH_BASE + 0x0000)</td></tr>
|
||
<tr class="separator:gaf8aa324ca5011b8173ab16585ed7324a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b72f698b7a048a6f9fcfe2efe5bc1db"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5b72f698b7a048a6f9fcfe2efe5bc1db"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM8_BASE</b>   (APB2PERIPH_BASE + 0x0400)</td></tr>
|
||
<tr class="separator:ga5b72f698b7a048a6f9fcfe2efe5bc1db"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86162ab3f740db9026c1320d46938b4d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86162ab3f740db9026c1320d46938b4d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART1_BASE</b>   (APB2PERIPH_BASE + 0x1000)</td></tr>
|
||
<tr class="separator:ga86162ab3f740db9026c1320d46938b4d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gade4d3907fd0387ee832f426f52d568bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gade4d3907fd0387ee832f426f52d568bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART6_BASE</b>   (APB2PERIPH_BASE + 0x1400)</td></tr>
|
||
<tr class="separator:gade4d3907fd0387ee832f426f52d568bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga695c9a2f892363a1c942405c8d351b91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga695c9a2f892363a1c942405c8d351b91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_BASE</b>   (APB2PERIPH_BASE + 0x2000)</td></tr>
|
||
<tr class="separator:ga695c9a2f892363a1c942405c8d351b91"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6544abc57f9759f610eee09a02442ae6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6544abc57f9759f610eee09a02442ae6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC2_BASE</b>   (APB2PERIPH_BASE + 0x2100)</td></tr>
|
||
<tr class="separator:ga6544abc57f9759f610eee09a02442ae6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca766f86c8e0b00a8e2b0224dcbb4c82"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaca766f86c8e0b00a8e2b0224dcbb4c82"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC3_BASE</b>   (APB2PERIPH_BASE + 0x2200)</td></tr>
|
||
<tr class="separator:gaca766f86c8e0b00a8e2b0224dcbb4c82"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad06cb9e5985bd216a376f26f22303cd6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad06cb9e5985bd216a376f26f22303cd6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC_BASE</b>   (APB2PERIPH_BASE + 0x2300)</td></tr>
|
||
<tr class="separator:gad06cb9e5985bd216a376f26f22303cd6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga95dd0abbc6767893b4b02935fa846f52"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95dd0abbc6767893b4b02935fa846f52"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SDIO_BASE</b>   (APB2PERIPH_BASE + 0x2C00)</td></tr>
|
||
<tr class="separator:ga95dd0abbc6767893b4b02935fa846f52"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50cd8b47929f18b05efbd0f41253bf8d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50cd8b47929f18b05efbd0f41253bf8d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI1_BASE</b>   (APB2PERIPH_BASE + 0x3000)</td></tr>
|
||
<tr class="separator:ga50cd8b47929f18b05efbd0f41253bf8d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5cfaedf263cee1e79554665f921c708"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5cfaedf263cee1e79554665f921c708"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI4_BASE</b>   (APB2PERIPH_BASE + 0x3400)</td></tr>
|
||
<tr class="separator:gac5cfaedf263cee1e79554665f921c708"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga62246020bf3b34b6a4d8d0e84ec79d3d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62246020bf3b34b6a4d8d0e84ec79d3d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SYSCFG_BASE</b>   (APB2PERIPH_BASE + 0x3800)</td></tr>
|
||
<tr class="separator:ga62246020bf3b34b6a4d8d0e84ec79d3d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga87371508b3bcdcd98cd1ec629be29061"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga87371508b3bcdcd98cd1ec629be29061"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>EXTI_BASE</b>   (APB2PERIPH_BASE + 0x3C00)</td></tr>
|
||
<tr class="separator:ga87371508b3bcdcd98cd1ec629be29061"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92ae902be7902560939223dd765ece08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92ae902be7902560939223dd765ece08"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM9_BASE</b>   (APB2PERIPH_BASE + 0x4000)</td></tr>
|
||
<tr class="separator:ga92ae902be7902560939223dd765ece08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3eff32f3801db31fb4b61d5618cad54a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3eff32f3801db31fb4b61d5618cad54a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM10_BASE</b>   (APB2PERIPH_BASE + 0x4400)</td></tr>
|
||
<tr class="separator:ga3eff32f3801db31fb4b61d5618cad54a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3a4a06bb84c703084f0509e105ffaf1d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3a4a06bb84c703084f0509e105ffaf1d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM11_BASE</b>   (APB2PERIPH_BASE + 0x4800)</td></tr>
|
||
<tr class="separator:ga3a4a06bb84c703084f0509e105ffaf1d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac1c58d33414e167d478ecd0e31331dfa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac1c58d33414e167d478ecd0e31331dfa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI5_BASE</b>   (APB2PERIPH_BASE + 0x5000)</td></tr>
|
||
<tr class="separator:gac1c58d33414e167d478ecd0e31331dfa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf69c602bd348dc0aa1b4e829e40ebb70"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf69c602bd348dc0aa1b4e829e40ebb70"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI6_BASE</b>   (APB2PERIPH_BASE + 0x5400)</td></tr>
|
||
<tr class="separator:gaf69c602bd348dc0aa1b4e829e40ebb70"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga24c1053b754946b512f9c31123e09d21"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga24c1053b754946b512f9c31123e09d21"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1_BASE</b>   (APB2PERIPH_BASE + 0x5800)</td></tr>
|
||
<tr class="separator:ga24c1053b754946b512f9c31123e09d21"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga31f72e5e5d7aea23bc8a5191bc32e900"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga31f72e5e5d7aea23bc8a5191bc32e900"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1_Block_A_BASE</b>   (SAI1_BASE + 0x004)</td></tr>
|
||
<tr class="separator:ga31f72e5e5d7aea23bc8a5191bc32e900"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacdb59b321830def8c7a57c154178bc48"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacdb59b321830def8c7a57c154178bc48"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1_Block_B_BASE</b>   (SAI1_BASE + 0x024)</td></tr>
|
||
<tr class="separator:gacdb59b321830def8c7a57c154178bc48"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac6e45c39fafa3e82cdedbf447b461704"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac6e45c39fafa3e82cdedbf447b461704"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>LTDC_BASE</b>   (APB2PERIPH_BASE + 0x6800)</td></tr>
|
||
<tr class="separator:gac6e45c39fafa3e82cdedbf447b461704"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81a2641d0a8e698f32b160b2d20d070b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81a2641d0a8e698f32b160b2d20d070b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>LTDC_Layer1_BASE</b>   (LTDC_BASE + 0x84)</td></tr>
|
||
<tr class="separator:ga81a2641d0a8e698f32b160b2d20d070b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga696614b764a3820d9f9560a0eec1e111"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#ga696614b764a3820d9f9560a0eec1e111">LTDC_Layer2_BASE</a>   (LTDC_BASE + 0x104)</td></tr>
|
||
<tr class="separator:ga696614b764a3820d9f9560a0eec1e111"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7723846cc5db8e43a44d78cf21f6efa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7723846cc5db8e43a44d78cf21f6efa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOA_BASE</b>   (AHB1PERIPH_BASE + 0x0000)</td></tr>
|
||
<tr class="separator:gad7723846cc5db8e43a44d78cf21f6efa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac944a89eb789000ece920c0f89cb6a68"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac944a89eb789000ece920c0f89cb6a68"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOB_BASE</b>   (AHB1PERIPH_BASE + 0x0400)</td></tr>
|
||
<tr class="separator:gac944a89eb789000ece920c0f89cb6a68"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga26f267dc35338eef219544c51f1e6b3f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga26f267dc35338eef219544c51f1e6b3f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOC_BASE</b>   (AHB1PERIPH_BASE + 0x0800)</td></tr>
|
||
<tr class="separator:ga26f267dc35338eef219544c51f1e6b3f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a93ab27129f04064089616910c296ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a93ab27129f04064089616910c296ec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOD_BASE</b>   (AHB1PERIPH_BASE + 0x0C00)</td></tr>
|
||
<tr class="separator:ga1a93ab27129f04064089616910c296ec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab487b1983d936c4fee3e9e88b95aad9d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab487b1983d936c4fee3e9e88b95aad9d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOE_BASE</b>   (AHB1PERIPH_BASE + 0x1000)</td></tr>
|
||
<tr class="separator:gab487b1983d936c4fee3e9e88b95aad9d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f9a3f4223a1a784af464a114978d26e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f9a3f4223a1a784af464a114978d26e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOF_BASE</b>   (AHB1PERIPH_BASE + 0x1400)</td></tr>
|
||
<tr class="separator:ga7f9a3f4223a1a784af464a114978d26e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5d8ca4020f2e8c00bde974e8e7c13cfe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d8ca4020f2e8c00bde974e8e7c13cfe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOG_BASE</b>   (AHB1PERIPH_BASE + 0x1800)</td></tr>
|
||
<tr class="separator:ga5d8ca4020f2e8c00bde974e8e7c13cfe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee4716389f3a1c727495375b76645608"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee4716389f3a1c727495375b76645608"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOH_BASE</b>   (AHB1PERIPH_BASE + 0x1C00)</td></tr>
|
||
<tr class="separator:gaee4716389f3a1c727495375b76645608"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50acf918c2e1c4597d5ccfe25eb3ad3d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50acf918c2e1c4597d5ccfe25eb3ad3d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOI_BASE</b>   (AHB1PERIPH_BASE + 0x2000)</td></tr>
|
||
<tr class="separator:ga50acf918c2e1c4597d5ccfe25eb3ad3d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga73f5a4e42f41acc614ee82c8ebfe0b85"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73f5a4e42f41acc614ee82c8ebfe0b85"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOJ_BASE</b>   (AHB1PERIPH_BASE + 0x2400)</td></tr>
|
||
<tr class="separator:ga73f5a4e42f41acc614ee82c8ebfe0b85"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46d3f8cd7c045b5e13cd7395b8e936e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46d3f8cd7c045b5e13cd7395b8e936e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOK_BASE</b>   (AHB1PERIPH_BASE + 0x2800)</td></tr>
|
||
<tr class="separator:ga46d3f8cd7c045b5e13cd7395b8e936e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga656a447589e785594cbf2f45c835ad7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga656a447589e785594cbf2f45c835ad7e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRC_BASE</b>   (AHB1PERIPH_BASE + 0x3000)</td></tr>
|
||
<tr class="separator:ga656a447589e785594cbf2f45c835ad7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0e681b03f364532055d88f63fec0d99d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e681b03f364532055d88f63fec0d99d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BASE</b>   (AHB1PERIPH_BASE + 0x3800)</td></tr>
|
||
<tr class="separator:ga0e681b03f364532055d88f63fec0d99d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8e21f4845015730c5731763169ec0e9b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8e21f4845015730c5731763169ec0e9b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_R_BASE</b>   (AHB1PERIPH_BASE + 0x3C00)</td></tr>
|
||
<tr class="separator:ga8e21f4845015730c5731763169ec0e9b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2d8a917a0e4ea99a22ac6ebf279bc72"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab2d8a917a0e4ea99a22ac6ebf279bc72"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_BASE</b>   (AHB1PERIPH_BASE + 0x6000)</td></tr>
|
||
<tr class="separator:gab2d8a917a0e4ea99a22ac6ebf279bc72"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d3c52aa35dcc68f78b704dfde57ba95"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d3c52aa35dcc68f78b704dfde57ba95"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream0_BASE</b>   (DMA1_BASE + 0x010)</td></tr>
|
||
<tr class="separator:ga0d3c52aa35dcc68f78b704dfde57ba95"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b4152cef577e37eccc9311d8bdbf3c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5b4152cef577e37eccc9311d8bdbf3c2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream1_BASE</b>   (DMA1_BASE + 0x028)</td></tr>
|
||
<tr class="separator:ga5b4152cef577e37eccc9311d8bdbf3c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga48a551ee91d3f07dd74347fdb35c703d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga48a551ee91d3f07dd74347fdb35c703d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream2_BASE</b>   (DMA1_BASE + 0x040)</td></tr>
|
||
<tr class="separator:ga48a551ee91d3f07dd74347fdb35c703d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac51deb54ff7cfe1290dfcf517ae67127"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac51deb54ff7cfe1290dfcf517ae67127"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream3_BASE</b>   (DMA1_BASE + 0x058)</td></tr>
|
||
<tr class="separator:gac51deb54ff7cfe1290dfcf517ae67127"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga757a3c0d866c0fe68c6176156065a26b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga757a3c0d866c0fe68c6176156065a26b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream4_BASE</b>   (DMA1_BASE + 0x070)</td></tr>
|
||
<tr class="separator:ga757a3c0d866c0fe68c6176156065a26b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ded7bed8969fe2e2d616e7f90eb7654"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ded7bed8969fe2e2d616e7f90eb7654"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream5_BASE</b>   (DMA1_BASE + 0x088)</td></tr>
|
||
<tr class="separator:ga0ded7bed8969fe2e2d616e7f90eb7654"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga58998ddc40adb6361704d6c9dad08125"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga58998ddc40adb6361704d6c9dad08125"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream6_BASE</b>   (DMA1_BASE + 0x0A0)</td></tr>
|
||
<tr class="separator:ga58998ddc40adb6361704d6c9dad08125"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga82186dd6d3f60995d428b34c041919d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82186dd6d3f60995d428b34c041919d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream7_BASE</b>   (DMA1_BASE + 0x0B8)</td></tr>
|
||
<tr class="separator:ga82186dd6d3f60995d428b34c041919d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab72a9ae145053ee13d1d491fb5c1df64"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab72a9ae145053ee13d1d491fb5c1df64"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_BASE</b>   (AHB1PERIPH_BASE + 0x6400)</td></tr>
|
||
<tr class="separator:gab72a9ae145053ee13d1d491fb5c1df64"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac4c67b24726ba6b94d03adb351bcec4d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac4c67b24726ba6b94d03adb351bcec4d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream0_BASE</b>   (DMA2_BASE + 0x010)</td></tr>
|
||
<tr class="separator:gac4c67b24726ba6b94d03adb351bcec4d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga35512bdc3f5e9df4557c2fbe7935d0b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga35512bdc3f5e9df4557c2fbe7935d0b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream1_BASE</b>   (DMA2_BASE + 0x028)</td></tr>
|
||
<tr class="separator:ga35512bdc3f5e9df4557c2fbe7935d0b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaed33a06f08188466f2ede06160984e9a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaed33a06f08188466f2ede06160984e9a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream2_BASE</b>   (DMA2_BASE + 0x040)</td></tr>
|
||
<tr class="separator:gaed33a06f08188466f2ede06160984e9a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf3a9480e08c6ae94f4482e0cdaebdd17"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3a9480e08c6ae94f4482e0cdaebdd17"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream3_BASE</b>   (DMA2_BASE + 0x058)</td></tr>
|
||
<tr class="separator:gaf3a9480e08c6ae94f4482e0cdaebdd17"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad1e67740e6301233473f64638145dd1f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad1e67740e6301233473f64638145dd1f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream4_BASE</b>   (DMA2_BASE + 0x070)</td></tr>
|
||
<tr class="separator:gad1e67740e6301233473f64638145dd1f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaed1460fdc407b6decfbffccb0260d0af"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaed1460fdc407b6decfbffccb0260d0af"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream5_BASE</b>   (DMA2_BASE + 0x088)</td></tr>
|
||
<tr class="separator:gaed1460fdc407b6decfbffccb0260d0af"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e81174c96fd204fa7c82c815e85c8e6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e81174c96fd204fa7c82c815e85c8e6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream6_BASE</b>   (DMA2_BASE + 0x0A0)</td></tr>
|
||
<tr class="separator:ga5e81174c96fd204fa7c82c815e85c8e6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa9faa708ad2440d24eb1064cba9bb06d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa9faa708ad2440d24eb1064cba9bb06d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream7_BASE</b>   (DMA2_BASE + 0x0B8)</td></tr>
|
||
<tr class="separator:gaa9faa708ad2440d24eb1064cba9bb06d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad965a7b1106ece575ed3da10c45c65cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad965a7b1106ece575ed3da10c45c65cc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_BASE</b>   (AHB1PERIPH_BASE + 0x8000)</td></tr>
|
||
<tr class="separator:gad965a7b1106ece575ed3da10c45c65cc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3cf7005808feb61bff1fee01e50a711a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3cf7005808feb61bff1fee01e50a711a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MAC_BASE</b>   (ETH_BASE)</td></tr>
|
||
<tr class="separator:ga3cf7005808feb61bff1fee01e50a711a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4946f2b3b03f7998343ac1778fbcf725"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4946f2b3b03f7998343ac1778fbcf725"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMC_BASE</b>   (ETH_BASE + 0x0100)</td></tr>
|
||
<tr class="separator:ga4946f2b3b03f7998343ac1778fbcf725"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0f60b922aeb7275c785cbaa8f94ecf0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa0f60b922aeb7275c785cbaa8f94ecf0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTP_BASE</b>   (ETH_BASE + 0x0700)</td></tr>
|
||
<tr class="separator:gaa0f60b922aeb7275c785cbaa8f94ecf0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gace2114e1b37c1ba88d60f3e831b67e93"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gace2114e1b37c1ba88d60f3e831b67e93"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMA_BASE</b>   (ETH_BASE + 0x1000)</td></tr>
|
||
<tr class="separator:gace2114e1b37c1ba88d60f3e831b67e93"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacec66385fd1604e69584eb19a0aaa303"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gacec66385fd1604e69584eb19a0aaa303">DMA2D_BASE</a>   (AHB1PERIPH_BASE + 0xB000)</td></tr>
|
||
<tr class="separator:gacec66385fd1604e69584eb19a0aaa303"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55b794507e021135486de57129a2505c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga55b794507e021135486de57129a2505c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a> + 0x50000)</td></tr>
|
||
<tr class="separator:ga55b794507e021135486de57129a2505c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga019f3ad3b3212e56b45984efd8b8efef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga019f3ad3b3212e56b45984efd8b8efef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a> + 0x60000)</td></tr>
|
||
<tr class="separator:ga019f3ad3b3212e56b45984efd8b8efef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga398d121ca28c3f0f90a140b62184e242"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga398d121ca28c3f0f90a140b62184e242"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a> + 0x60400)</td></tr>
|
||
<tr class="separator:ga398d121ca28c3f0f90a140b62184e242"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41efdf0e6db11dad3003d01882ee8bcb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41efdf0e6db11dad3003d01882ee8bcb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_DIGEST_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a> + 0x60710)</td></tr>
|
||
<tr class="separator:ga41efdf0e6db11dad3003d01882ee8bcb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab92662976cfe62457141e5b4f83d541c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral__memory__map.html#gab92662976cfe62457141e5b4f83d541c">RNG_BASE</a>   (<a class="el" href="group___peripheral__memory__map.html#gaeedaa71d22a1948492365e2cd26cfd46">AHB2PERIPH_BASE</a> + 0x60800)</td></tr>
|
||
<tr class="separator:gab92662976cfe62457141e5b4f83d541c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad196fe6f5e4041b201d14f43508c06d2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad196fe6f5e4041b201d14f43508c06d2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank1_R_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a> + 0x0000)</td></tr>
|
||
<tr class="separator:gad196fe6f5e4041b201d14f43508c06d2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaea182589c84aee30b7f735474d8774e2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaea182589c84aee30b7f735474d8774e2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank1E_R_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a> + 0x0104)</td></tr>
|
||
<tr class="separator:gaea182589c84aee30b7f735474d8774e2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3cb46d62f4f6458e186a5a4c753e4918"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3cb46d62f4f6458e186a5a4c753e4918"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank2_R_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a> + 0x0060)</td></tr>
|
||
<tr class="separator:ga3cb46d62f4f6458e186a5a4c753e4918"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacf056152c9e5aefcc67db78d1302c0d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacf056152c9e5aefcc67db78d1302c0d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank3_R_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a> + 0x0080)</td></tr>
|
||
<tr class="separator:gacf056152c9e5aefcc67db78d1302c0d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9e5417133160b0bdd0498d982acec19"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9e5417133160b0bdd0498d982acec19"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank4_R_BASE</b>   (<a class="el" href="group___peripheral__memory__map.html#gaddf0e199dccba83272b20c9fb4d3aaed">FSMC_R_BASE</a> + 0x00A0)</td></tr>
|
||
<tr class="separator:gaf9e5417133160b0bdd0498d982acec19"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4adaf4fd82ccc3a538f1f27a70cdbbef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4adaf4fd82ccc3a538f1f27a70cdbbef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_BASE</b>   ((uint32_t )0xE0042000)</td></tr>
|
||
<tr class="separator:ga4adaf4fd82ccc3a538f1f27a70cdbbef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3cfac9f2e43673f790f8668d48b4b92b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3cfac9f2e43673f790f8668d48b4b92b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM2</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM2_BASE)</td></tr>
|
||
<tr class="separator:ga3cfac9f2e43673f790f8668d48b4b92b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga61ee4c391385607d7af432b63905fcc9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga61ee4c391385607d7af432b63905fcc9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM3</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM3_BASE)</td></tr>
|
||
<tr class="separator:ga61ee4c391385607d7af432b63905fcc9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga91a09bad8bdc7a1cb3d85cf49c94c8ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga91a09bad8bdc7a1cb3d85cf49c94c8ec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM4</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM4_BASE)</td></tr>
|
||
<tr class="separator:ga91a09bad8bdc7a1cb3d85cf49c94c8ec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5125ff6a23a2ed66e2e19bd196128c14"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5125ff6a23a2ed66e2e19bd196128c14"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM5</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM5_BASE)</td></tr>
|
||
<tr class="separator:ga5125ff6a23a2ed66e2e19bd196128c14"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac7b4ed55f9201b498b38c962cca97314"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7b4ed55f9201b498b38c962cca97314"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM6</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM6_BASE)</td></tr>
|
||
<tr class="separator:gac7b4ed55f9201b498b38c962cca97314"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga49267c49946fd61db6af8b49bcf16394"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga49267c49946fd61db6af8b49bcf16394"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM7</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM7_BASE)</td></tr>
|
||
<tr class="separator:ga49267c49946fd61db6af8b49bcf16394"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2397f8a0f8e7aa10cf8e8c049e431e53"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2397f8a0f8e7aa10cf8e8c049e431e53"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM12</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM12_BASE)</td></tr>
|
||
<tr class="separator:ga2397f8a0f8e7aa10cf8e8c049e431e53"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a959a833074d59bf6cc7fb437c65b18"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a959a833074d59bf6cc7fb437c65b18"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM13</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM13_BASE)</td></tr>
|
||
<tr class="separator:ga5a959a833074d59bf6cc7fb437c65b18"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2dd30f46fad69dd73e1d8941a43daffe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2dd30f46fad69dd73e1d8941a43daffe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM14</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM14_BASE)</td></tr>
|
||
<tr class="separator:ga2dd30f46fad69dd73e1d8941a43daffe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5359a088f5d8b20ce74d920e46059304"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5359a088f5d8b20ce74d920e46059304"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC</b>   ((<a class="el" href="struct_r_t_c___type_def.html">RTC_TypeDef</a> *) RTC_BASE)</td></tr>
|
||
<tr class="separator:ga5359a088f5d8b20ce74d920e46059304"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9821fd01757986612ddb8982e2fe27f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9821fd01757986612ddb8982e2fe27f1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>WWDG</b>   ((<a class="el" href="struct_w_w_d_g___type_def.html">WWDG_TypeDef</a> *) WWDG_BASE)</td></tr>
|
||
<tr class="separator:ga9821fd01757986612ddb8982e2fe27f1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad16b79dd94ee85d261d08a8ee94187e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad16b79dd94ee85d261d08a8ee94187e7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>IWDG</b>   ((<a class="el" href="struct_i_w_d_g___type_def.html">IWDG_TypeDef</a> *) IWDG_BASE)</td></tr>
|
||
<tr class="separator:gad16b79dd94ee85d261d08a8ee94187e7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9efe6de71871a01dd38abcb229f30c02"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9efe6de71871a01dd38abcb229f30c02"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2S2ext</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) I2S2ext_BASE)</td></tr>
|
||
<tr class="separator:ga9efe6de71871a01dd38abcb229f30c02"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2c3d8ce359dcfbb2261e07ed42af72b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2c3d8ce359dcfbb2261e07ed42af72b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI2</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI2_BASE)</td></tr>
|
||
<tr class="separator:gaf2c3d8ce359dcfbb2261e07ed42af72b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2339cbf25502bf562b19208b1b257fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab2339cbf25502bf562b19208b1b257fc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI3</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI3_BASE)</td></tr>
|
||
<tr class="separator:gab2339cbf25502bf562b19208b1b257fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga15b3a03302ed53911099c5216da0b1cf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga15b3a03302ed53911099c5216da0b1cf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2S3ext</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) I2S3ext_BASE)</td></tr>
|
||
<tr class="separator:ga15b3a03302ed53911099c5216da0b1cf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf114a9eab03ca08a6fb720e511595930"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf114a9eab03ca08a6fb720e511595930"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART2</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) USART2_BASE)</td></tr>
|
||
<tr class="separator:gaf114a9eab03ca08a6fb720e511595930"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2350115553c1fe0a7bc14e6a7ec6a225"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2350115553c1fe0a7bc14e6a7ec6a225"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART3</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) USART3_BASE)</td></tr>
|
||
<tr class="separator:ga2350115553c1fe0a7bc14e6a7ec6a225"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7c035f6f443c999fc043b2b7fb598800"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7c035f6f443c999fc043b2b7fb598800"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART4</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) UART4_BASE)</td></tr>
|
||
<tr class="separator:ga7c035f6f443c999fc043b2b7fb598800"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9274e37cf5e8a174fc5dd627b98ec0fe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9274e37cf5e8a174fc5dd627b98ec0fe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART5</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) UART5_BASE)</td></tr>
|
||
<tr class="separator:ga9274e37cf5e8a174fc5dd627b98ec0fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab45d257574da6fe1f091cc45b7eda6cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab45d257574da6fe1f091cc45b7eda6cc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C1</b>   ((<a class="el" href="struct_i2_c___type_def.html">I2C_TypeDef</a> *) I2C1_BASE)</td></tr>
|
||
<tr class="separator:gab45d257574da6fe1f091cc45b7eda6cc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafa60ac20c1921ef1002083bb3e1f5d16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafa60ac20c1921ef1002083bb3e1f5d16"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C2</b>   ((<a class="el" href="struct_i2_c___type_def.html">I2C_TypeDef</a> *) I2C2_BASE)</td></tr>
|
||
<tr class="separator:gafa60ac20c1921ef1002083bb3e1f5d16"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1489b37ed2bca9d9c659119590583bda"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1489b37ed2bca9d9c659119590583bda"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>I2C3</b>   ((<a class="el" href="struct_i2_c___type_def.html">I2C_TypeDef</a> *) I2C3_BASE)</td></tr>
|
||
<tr class="separator:ga1489b37ed2bca9d9c659119590583bda"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4964ecb6a5c689aaf8ee2832b8093aac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4964ecb6a5c689aaf8ee2832b8093aac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CAN1</b>   ((<a class="el" href="struct_c_a_n___type_def.html">CAN_TypeDef</a> *) CAN1_BASE)</td></tr>
|
||
<tr class="separator:ga4964ecb6a5c689aaf8ee2832b8093aac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5e4c86ed487dc91418b156e24808033"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5e4c86ed487dc91418b156e24808033"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CAN2</b>   ((<a class="el" href="struct_c_a_n___type_def.html">CAN_TypeDef</a> *) CAN2_BASE)</td></tr>
|
||
<tr class="separator:gac5e4c86ed487dc91418b156e24808033"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04651c526497822a859942b928e57f8e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04651c526497822a859942b928e57f8e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>PWR</b>   ((<a class="el" href="struct_p_w_r___type_def.html">PWR_TypeDef</a> *) PWR_BASE)</td></tr>
|
||
<tr class="separator:ga04651c526497822a859942b928e57f8e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4aa2a4ab86ce00c23035e5cee2e7fc7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4aa2a4ab86ce00c23035e5cee2e7fc7e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DAC</b>   ((<a class="el" href="struct_d_a_c___type_def.html">DAC_TypeDef</a> *) DAC_BASE)</td></tr>
|
||
<tr class="separator:ga4aa2a4ab86ce00c23035e5cee2e7fc7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga20bc10f5b73e8b51724b2f23c5b2e785"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga20bc10f5b73e8b51724b2f23c5b2e785"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART7</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) UART7_BASE)</td></tr>
|
||
<tr class="separator:ga20bc10f5b73e8b51724b2f23c5b2e785"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fe70804956e53dcbdc82dbacbbbfabc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fe70804956e53dcbdc82dbacbbbfabc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>UART8</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) <a class="el" href="group___peripheral__memory__map.html#gac9c6cd59a248941d9d2462ab21a2346e">UART8_BASE</a>)</td></tr>
|
||
<tr class="separator:ga2fe70804956e53dcbdc82dbacbbbfabc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e87451fea8dc9380056d3cfc5ed81fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e87451fea8dc9380056d3cfc5ed81fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM1</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM1_BASE)</td></tr>
|
||
<tr class="separator:ga2e87451fea8dc9380056d3cfc5ed81fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a3660400b17735e91331f256095810e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a3660400b17735e91331f256095810e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM8</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM8_BASE)</td></tr>
|
||
<tr class="separator:ga9a3660400b17735e91331f256095810e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92871691058ff7ccffd7635930cb08da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92871691058ff7ccffd7635930cb08da"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART1</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) USART1_BASE)</td></tr>
|
||
<tr class="separator:ga92871691058ff7ccffd7635930cb08da"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2dab39a19ce3dd05fe360dcbb7b5dc84"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2dab39a19ce3dd05fe360dcbb7b5dc84"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>USART6</b>   ((<a class="el" href="struct_u_s_a_r_t___type_def.html">USART_TypeDef</a> *) USART6_BASE)</td></tr>
|
||
<tr class="separator:ga2dab39a19ce3dd05fe360dcbb7b5dc84"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54d148b91f3d356713f7e367a2243bea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54d148b91f3d356713f7e367a2243bea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC</b>   ((<a class="el" href="struct_a_d_c___common___type_def.html">ADC_Common_TypeDef</a> *) ADC_BASE)</td></tr>
|
||
<tr class="separator:ga54d148b91f3d356713f7e367a2243bea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90d2d5c526ce5c0a551f533eccbee71a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90d2d5c526ce5c0a551f533eccbee71a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC1</b>   ((<a class="el" href="struct_a_d_c___type_def.html">ADC_TypeDef</a> *) ADC1_BASE)</td></tr>
|
||
<tr class="separator:ga90d2d5c526ce5c0a551f533eccbee71a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5503ae96c26b4475226f96715a1bf1e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5503ae96c26b4475226f96715a1bf1e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC2</b>   ((<a class="el" href="struct_a_d_c___type_def.html">ADC_TypeDef</a> *) ADC2_BASE)</td></tr>
|
||
<tr class="separator:gac5503ae96c26b4475226f96715a1bf1e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae917784606daf6b04c9b7b96b40c2f74"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae917784606daf6b04c9b7b96b40c2f74"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ADC3</b>   ((<a class="el" href="struct_a_d_c___type_def.html">ADC_TypeDef</a> *) ADC3_BASE)</td></tr>
|
||
<tr class="separator:gae917784606daf6b04c9b7b96b40c2f74"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8149aa2760fffac16bc75216d5fd9331"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8149aa2760fffac16bc75216d5fd9331"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SDIO</b>   ((<a class="el" href="struct_s_d_i_o___type_def.html">SDIO_TypeDef</a> *) SDIO_BASE)</td></tr>
|
||
<tr class="separator:ga8149aa2760fffac16bc75216d5fd9331"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad483be344a28ac800be8f03654a9612f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad483be344a28ac800be8f03654a9612f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI1</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI1_BASE)</td></tr>
|
||
<tr class="separator:gad483be344a28ac800be8f03654a9612f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a2e6edef68cfe1946f39a5033da2301"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a2e6edef68cfe1946f39a5033da2301"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI4</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI4_BASE)</td></tr>
|
||
<tr class="separator:ga2a2e6edef68cfe1946f39a5033da2301"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3c833fe1c486cb62250ccbca32899cb8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c833fe1c486cb62250ccbca32899cb8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SYSCFG</b>   ((<a class="el" href="struct_s_y_s_c_f_g___type_def.html">SYSCFG_TypeDef</a> *) SYSCFG_BASE)</td></tr>
|
||
<tr class="separator:ga3c833fe1c486cb62250ccbca32899cb8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9189e770cd9b63dadd36683eb9843cac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9189e770cd9b63dadd36683eb9843cac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>EXTI</b>   ((<a class="el" href="struct_e_x_t_i___type_def.html">EXTI_TypeDef</a> *) EXTI_BASE)</td></tr>
|
||
<tr class="separator:ga9189e770cd9b63dadd36683eb9843cac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf52b4b4c36110a0addfa98059f54a50e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf52b4b4c36110a0addfa98059f54a50e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM9</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM9_BASE)</td></tr>
|
||
<tr class="separator:gaf52b4b4c36110a0addfa98059f54a50e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46b2ad3f5f506f0f8df0d2ec3e767267"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46b2ad3f5f506f0f8df0d2ec3e767267"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM10</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM10_BASE)</td></tr>
|
||
<tr class="separator:ga46b2ad3f5f506f0f8df0d2ec3e767267"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacfd11ef966c7165f57e2cebe0abc71ad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacfd11ef966c7165f57e2cebe0abc71ad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>TIM11</b>   ((<a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *) TIM11_BASE)</td></tr>
|
||
<tr class="separator:gacfd11ef966c7165f57e2cebe0abc71ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e676c061e19ced149b7c6de6b8985e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e676c061e19ced149b7c6de6b8985e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI5</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI5_BASE)</td></tr>
|
||
<tr class="separator:ga5e676c061e19ced149b7c6de6b8985e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f05da7f4b924ab39c1f8afcea225074"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0f05da7f4b924ab39c1f8afcea225074"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SPI6</b>   ((<a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *) SPI6_BASE)</td></tr>
|
||
<tr class="separator:ga0f05da7f4b924ab39c1f8afcea225074"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa878b214698fcf74a3268d07562abbb2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa878b214698fcf74a3268d07562abbb2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1</b>   ((<a class="el" href="struct_s_a_i___type_def.html">SAI_TypeDef</a> *) SAI1_BASE)</td></tr>
|
||
<tr class="separator:gaa878b214698fcf74a3268d07562abbb2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa29e42155e075c03d156d759b4e69c5c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa29e42155e075c03d156d759b4e69c5c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1_Block_A</b>   ((<a class="el" href="struct_s_a_i___block___type_def.html">SAI_Block_TypeDef</a> *)SAI1_Block_A_BASE)</td></tr>
|
||
<tr class="separator:gaa29e42155e075c03d156d759b4e69c5c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa4ab9bf6de588a9309acd4bf007c4e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa4ab9bf6de588a9309acd4bf007c4e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SAI1_Block_B</b>   ((<a class="el" href="struct_s_a_i___block___type_def.html">SAI_Block_TypeDef</a> *)SAI1_Block_B_BASE)</td></tr>
|
||
<tr class="separator:gaaa4ab9bf6de588a9309acd4bf007c4e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4459673012beca799917db0644a908c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4459673012beca799917db0644a908c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>LTDC</b>   ((<a class="el" href="struct_l_t_d_c___type_def.html">LTDC_TypeDef</a> *)LTDC_BASE)</td></tr>
|
||
<tr class="separator:ga4459673012beca799917db0644a908c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f3ddebb027d7bdf4e8636e67a42ad17"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f3ddebb027d7bdf4e8636e67a42ad17"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>LTDC_Layer1</b>   ((<a class="el" href="struct_l_t_d_c___layer___type_def.html">LTDC_Layer_TypeDef</a> *)LTDC_Layer1_BASE)</td></tr>
|
||
<tr class="separator:ga6f3ddebb027d7bdf4e8636e67a42ad17"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gada57137d7b85a1223b5bf289e158e363"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gada57137d7b85a1223b5bf289e158e363"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>LTDC_Layer2</b>   ((<a class="el" href="struct_l_t_d_c___layer___type_def.html">LTDC_Layer_TypeDef</a> *)<a class="el" href="group___peripheral__memory__map.html#ga696614b764a3820d9f9560a0eec1e111">LTDC_Layer2_BASE</a>)</td></tr>
|
||
<tr class="separator:gada57137d7b85a1223b5bf289e158e363"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac485358099728ddae050db37924dd6b7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac485358099728ddae050db37924dd6b7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOA</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOA_BASE)</td></tr>
|
||
<tr class="separator:gac485358099728ddae050db37924dd6b7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68b66ac73be4c836db878a42e1fea3cd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68b66ac73be4c836db878a42e1fea3cd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOB</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOB_BASE)</td></tr>
|
||
<tr class="separator:ga68b66ac73be4c836db878a42e1fea3cd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2dca03332d620196ba943bc2346eaa08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2dca03332d620196ba943bc2346eaa08"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOC</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOC_BASE)</td></tr>
|
||
<tr class="separator:ga2dca03332d620196ba943bc2346eaa08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7580b1a929ea9df59725ba9c18eba6ac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7580b1a929ea9df59725ba9c18eba6ac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOD</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOD_BASE)</td></tr>
|
||
<tr class="separator:ga7580b1a929ea9df59725ba9c18eba6ac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae04bdb5e8acc47cab1d0532e6b0d0763"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae04bdb5e8acc47cab1d0532e6b0d0763"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOE</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOE_BASE)</td></tr>
|
||
<tr class="separator:gae04bdb5e8acc47cab1d0532e6b0d0763"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga43c3022dede7c9db7a58d3c3409dbc8d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga43c3022dede7c9db7a58d3c3409dbc8d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOF</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOF_BASE)</td></tr>
|
||
<tr class="separator:ga43c3022dede7c9db7a58d3c3409dbc8d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga02a2a23a32f9b02166a8c64012842414"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga02a2a23a32f9b02166a8c64012842414"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOG</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOG_BASE)</td></tr>
|
||
<tr class="separator:ga02a2a23a32f9b02166a8c64012842414"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadeacbb43ae86c879945afe98c679b285"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadeacbb43ae86c879945afe98c679b285"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOH</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOH_BASE)</td></tr>
|
||
<tr class="separator:gadeacbb43ae86c879945afe98c679b285"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad15f13545ecdbbabfccf43d5997e5ade"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad15f13545ecdbbabfccf43d5997e5ade"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOI</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOI_BASE)</td></tr>
|
||
<tr class="separator:gad15f13545ecdbbabfccf43d5997e5ade"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7d3020a351195b6600a5d64c01c461fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7d3020a351195b6600a5d64c01c461fa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOJ</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOJ_BASE)</td></tr>
|
||
<tr class="separator:ga7d3020a351195b6600a5d64c01c461fa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga273d78d198f0221223b3e9d7798f1649"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga273d78d198f0221223b3e9d7798f1649"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIOK</b>   ((<a class="el" href="struct_g_p_i_o___type_def.html">GPIO_TypeDef</a> *) GPIOK_BASE)</td></tr>
|
||
<tr class="separator:ga273d78d198f0221223b3e9d7798f1649"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4381bb54c2dbc34500521165aa7b89b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4381bb54c2dbc34500521165aa7b89b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRC</b>   ((<a class="el" href="struct_c_r_c___type_def.html">CRC_TypeDef</a> *) CRC_BASE)</td></tr>
|
||
<tr class="separator:ga4381bb54c2dbc34500521165aa7b89b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74944438a086975793d26ae48d5882d4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga74944438a086975793d26ae48d5882d4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC</b>   ((<a class="el" href="struct_r_c_c___type_def.html">RCC_TypeDef</a> *) RCC_BASE)</td></tr>
|
||
<tr class="separator:ga74944438a086975793d26ae48d5882d4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga844ea28ba1e0a5a0e497f16b61ea306b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga844ea28ba1e0a5a0e497f16b61ea306b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH</b>   ((<a class="el" href="struct_f_l_a_s_h___type_def.html">FLASH_TypeDef</a> *) FLASH_R_BASE)</td></tr>
|
||
<tr class="separator:ga844ea28ba1e0a5a0e497f16b61ea306b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacc16d2a5937f7585320a98f7f6b578f9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacc16d2a5937f7585320a98f7f6b578f9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1</b>   ((<a class="el" href="struct_d_m_a___type_def.html">DMA_TypeDef</a> *) DMA1_BASE)</td></tr>
|
||
<tr class="separator:gacc16d2a5937f7585320a98f7f6b578f9"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga61247dd5d594289c404dd8774202dfd8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga61247dd5d594289c404dd8774202dfd8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream0</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream0_BASE)</td></tr>
|
||
<tr class="separator:ga61247dd5d594289c404dd8774202dfd8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf7d82f110f19982d483eebc465d222b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf7d82f110f19982d483eebc465d222b2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream1</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream1_BASE)</td></tr>
|
||
<tr class="separator:gaf7d82f110f19982d483eebc465d222b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad0e2140b8eeec3594035f1a7bf2a7250"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0e2140b8eeec3594035f1a7bf2a7250"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream2</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream2_BASE)</td></tr>
|
||
<tr class="separator:gad0e2140b8eeec3594035f1a7bf2a7250"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96ac1af7a92469fe86a9fbdec091f25d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga96ac1af7a92469fe86a9fbdec091f25d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream3</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream3_BASE)</td></tr>
|
||
<tr class="separator:ga96ac1af7a92469fe86a9fbdec091f25d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga87df45f4b82e0b3a8c1b17f1a77aecdb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga87df45f4b82e0b3a8c1b17f1a77aecdb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream4</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream4_BASE)</td></tr>
|
||
<tr class="separator:ga87df45f4b82e0b3a8c1b17f1a77aecdb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac3abc20f80e25c19b02104ad34eae652"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3abc20f80e25c19b02104ad34eae652"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream5</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream5_BASE)</td></tr>
|
||
<tr class="separator:gac3abc20f80e25c19b02104ad34eae652"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac95127480470900755953f1cfe68567d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac95127480470900755953f1cfe68567d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream6</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream6_BASE)</td></tr>
|
||
<tr class="separator:gac95127480470900755953f1cfe68567d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8ecdeaf43d0f4207dab1fdb4d7bf8d26"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ecdeaf43d0f4207dab1fdb4d7bf8d26"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA1_Stream7</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA1_Stream7_BASE)</td></tr>
|
||
<tr class="separator:ga8ecdeaf43d0f4207dab1fdb4d7bf8d26"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga506520140eec1708bc7570c49bdf972d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga506520140eec1708bc7570c49bdf972d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2</b>   ((<a class="el" href="struct_d_m_a___type_def.html">DMA_TypeDef</a> *) DMA2_BASE)</td></tr>
|
||
<tr class="separator:ga506520140eec1708bc7570c49bdf972d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3a2efe5fd7a7a79be3b08a1670bbd016"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3a2efe5fd7a7a79be3b08a1670bbd016"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream0</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream0_BASE)</td></tr>
|
||
<tr class="separator:ga3a2efe5fd7a7a79be3b08a1670bbd016"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae96f15d34d3c41c16fce69bc2878151a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae96f15d34d3c41c16fce69bc2878151a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream1</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream1_BASE)</td></tr>
|
||
<tr class="separator:gae96f15d34d3c41c16fce69bc2878151a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga71bb410664b861ff0520f08976e24ee1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga71bb410664b861ff0520f08976e24ee1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream2</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream2_BASE)</td></tr>
|
||
<tr class="separator:ga71bb410664b861ff0520f08976e24ee1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa6ead6a5ca6b8df70b5505aaeec6fd2e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa6ead6a5ca6b8df70b5505aaeec6fd2e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream3</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream3_BASE)</td></tr>
|
||
<tr class="separator:gaa6ead6a5ca6b8df70b5505aaeec6fd2e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae32674772021620800275dd3b6d62c2f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae32674772021620800275dd3b6d62c2f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream4</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream4_BASE)</td></tr>
|
||
<tr class="separator:gae32674772021620800275dd3b6d62c2f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac40f58718761251875b5a897287efd83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac40f58718761251875b5a897287efd83"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream5</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream5_BASE)</td></tr>
|
||
<tr class="separator:gac40f58718761251875b5a897287efd83"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga11a00b283e0911cd427e277e5a314ccc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga11a00b283e0911cd427e277e5a314ccc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream6</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream6_BASE)</td></tr>
|
||
<tr class="separator:ga11a00b283e0911cd427e277e5a314ccc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacc135dbca0eca67d5aa0abc555f053ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacc135dbca0eca67d5aa0abc555f053ce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2_Stream7</b>   ((<a class="el" href="struct_d_m_a___stream___type_def.html">DMA_Stream_TypeDef</a> *) DMA2_Stream7_BASE)</td></tr>
|
||
<tr class="separator:gacc135dbca0eca67d5aa0abc555f053ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3a3f60de4318afbd0b3318e7a416aadc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3a3f60de4318afbd0b3318e7a416aadc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH</b>   ((<a class="el" href="struct_e_t_h___type_def.html">ETH_TypeDef</a> *) ETH_BASE)</td></tr>
|
||
<tr class="separator:ga3a3f60de4318afbd0b3318e7a416aadc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46ffe4de9c874b15e9adb93a448d0778"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46ffe4de9c874b15e9adb93a448d0778"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA2D</b>   ((<a class="el" href="struct_d_m_a2_d___type_def.html">DMA2D_TypeDef</a> *)<a class="el" href="group___peripheral__memory__map.html#gacec66385fd1604e69584eb19a0aaa303">DMA2D_BASE</a>)</td></tr>
|
||
<tr class="separator:ga46ffe4de9c874b15e9adb93a448d0778"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga049d9f61cb078d642e68f3c22bb6d90c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga049d9f61cb078d642e68f3c22bb6d90c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI</b>   ((<a class="el" href="struct_d_c_m_i___type_def.html">DCMI_TypeDef</a> *) DCMI_BASE)</td></tr>
|
||
<tr class="separator:ga049d9f61cb078d642e68f3c22bb6d90c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf8c417168aefe66429b5f1b6adc9effa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8c417168aefe66429b5f1b6adc9effa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP</b>   ((<a class="el" href="struct_c_r_y_p___type_def.html">CRYP_TypeDef</a> *) CRYP_BASE)</td></tr>
|
||
<tr class="separator:gaf8c417168aefe66429b5f1b6adc9effa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7172fe24d1ffc31d15b20a77ea9f34dd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7172fe24d1ffc31d15b20a77ea9f34dd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH</b>   ((<a class="el" href="struct_h_a_s_h___type_def.html">HASH_TypeDef</a> *) HASH_BASE)</td></tr>
|
||
<tr class="separator:ga7172fe24d1ffc31d15b20a77ea9f34dd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf3fca8c1cf565b0422dd4cfae7709bde"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3fca8c1cf565b0422dd4cfae7709bde"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_DIGEST</b>   ((<a class="el" href="struct_h_a_s_h___d_i_g_e_s_t___type_def.html">HASH_DIGEST_TypeDef</a> *) HASH_DIGEST_BASE)</td></tr>
|
||
<tr class="separator:gaf3fca8c1cf565b0422dd4cfae7709bde"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b0885b8b55bbc13691092b704d9309f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5b0885b8b55bbc13691092b704d9309f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG</b>   ((<a class="el" href="struct_r_n_g___type_def.html">RNG_TypeDef</a> *) <a class="el" href="group___peripheral__memory__map.html#gab92662976cfe62457141e5b4f83d541c">RNG_BASE</a>)</td></tr>
|
||
<tr class="separator:ga5b0885b8b55bbc13691092b704d9309f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a759bad07fe730c99f9e1490e646220"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a759bad07fe730c99f9e1490e646220"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank1</b>   ((<a class="el" href="struct_f_s_m_c___bank1___type_def.html">FSMC_Bank1_TypeDef</a> *) FSMC_Bank1_R_BASE)</td></tr>
|
||
<tr class="separator:ga2a759bad07fe730c99f9e1490e646220"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga422986101f42a8811ae89ac69deb2759"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga422986101f42a8811ae89ac69deb2759"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank1E</b>   ((<a class="el" href="struct_f_s_m_c___bank1_e___type_def.html">FSMC_Bank1E_TypeDef</a> *) FSMC_Bank1E_R_BASE)</td></tr>
|
||
<tr class="separator:ga422986101f42a8811ae89ac69deb2759"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabb3dfb5e88694aa2983ecabd33a55e0a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabb3dfb5e88694aa2983ecabd33a55e0a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank2</b>   ((<a class="el" href="struct_f_s_m_c___bank2___type_def.html">FSMC_Bank2_TypeDef</a> *) FSMC_Bank2_R_BASE)</td></tr>
|
||
<tr class="separator:gabb3dfb5e88694aa2983ecabd33a55e0a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga411eedc00b5b2b22b494004d4f41b736"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga411eedc00b5b2b22b494004d4f41b736"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank3</b>   ((<a class="el" href="struct_f_s_m_c___bank3___type_def.html">FSMC_Bank3_TypeDef</a> *) FSMC_Bank3_R_BASE)</td></tr>
|
||
<tr class="separator:ga411eedc00b5b2b22b494004d4f41b736"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5aa00e4ac522693c6a21bc23ef5a96df"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5aa00e4ac522693c6a21bc23ef5a96df"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FSMC_Bank4</b>   ((<a class="el" href="struct_f_s_m_c___bank4___type_def.html">FSMC_Bank4_TypeDef</a> *) FSMC_Bank4_R_BASE)</td></tr>
|
||
<tr class="separator:ga5aa00e4ac522693c6a21bc23ef5a96df"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92ec6d9ec2251fda7d4ce09748cd74b4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92ec6d9ec2251fda7d4ce09748cd74b4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU</b>   ((<a class="el" href="struct_d_b_g_m_c_u___type_def.html">DBGMCU_TypeDef</a> *) DBGMCU_BASE)</td></tr>
|
||
<tr class="separator:ga92ec6d9ec2251fda7d4ce09748cd74b4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8b7f27694281e4cad956da567e5583b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b7f27694281e4cad956da567e5583b2">ADC_SR_AWD</a>   ((uint8_t)0x01)</td></tr>
|
||
<tr class="separator:ga8b7f27694281e4cad956da567e5583b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3dc295c5253743aeb2cda582953b7b53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3dc295c5253743aeb2cda582953b7b53">ADC_SR_EOC</a>   ((uint8_t)0x02)</td></tr>
|
||
<tr class="separator:ga3dc295c5253743aeb2cda582953b7b53"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabc9f07589bb1a4e398781df372389b56"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc9f07589bb1a4e398781df372389b56">ADC_SR_JEOC</a>   ((uint8_t)0x04)</td></tr>
|
||
<tr class="separator:gabc9f07589bb1a4e398781df372389b56"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7340a01ffec051c06e80a037eee58a14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7340a01ffec051c06e80a037eee58a14">ADC_SR_JSTRT</a>   ((uint8_t)0x08)</td></tr>
|
||
<tr class="separator:ga7340a01ffec051c06e80a037eee58a14"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga45eb11ad986d8220cde9fa47a91ed222"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45eb11ad986d8220cde9fa47a91ed222">ADC_SR_STRT</a>   ((uint8_t)0x10)</td></tr>
|
||
<tr class="separator:ga45eb11ad986d8220cde9fa47a91ed222"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e5211d5e3e53cdedf4d9d6fe4ce2a45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e5211d5e3e53cdedf4d9d6fe4ce2a45">ADC_SR_OVR</a>   ((uint8_t)0x20)</td></tr>
|
||
<tr class="separator:ga1e5211d5e3e53cdedf4d9d6fe4ce2a45"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad8bb755c7059bb2d4f5e2e999d2a2677"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8bb755c7059bb2d4f5e2e999d2a2677">ADC_CR1_AWDCH</a>   ((uint32_t)0x0000001F)</td></tr>
|
||
<tr class="separator:gad8bb755c7059bb2d4f5e2e999d2a2677"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga18725d77c35c173cdb5bdab658d9dace"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga18725d77c35c173cdb5bdab658d9dace">ADC_CR1_AWDCH_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:gafcd37244d74db7c9a34a4f08b94301ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafcd37244d74db7c9a34a4f08b94301ae">ADC_CR1_AWDCH_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gafcd37244d74db7c9a34a4f08b94301ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga625eebdc95937325cad90a151853f5a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga625eebdc95937325cad90a151853f5a0">ADC_CR1_AWDCH_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:gafb768d4aafbabc114d4650cf962392ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb768d4aafbabc114d4650cf962392ec">ADC_CR1_AWDCH_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="memitem:gaf37f3c0d7c72192803d0772e076cf8ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf37f3c0d7c72192803d0772e076cf8ee">ADC_CR1_AWDCH_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaf37f3c0d7c72192803d0772e076cf8ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa39fee2e812a7ca45998cccf32e90aea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa39fee2e812a7ca45998cccf32e90aea">ADC_CR1_EOCIE</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaa39fee2e812a7ca45998cccf32e90aea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd44f86b189696d5a3780342516de722"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd44f86b189696d5a3780342516de722">ADC_CR1_AWDIE</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gacd44f86b189696d5a3780342516de722"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c46fc1dc6c63acf88821f46a8f6d5e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c46fc1dc6c63acf88821f46a8f6d5e7">ADC_CR1_JEOCIE</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga5c46fc1dc6c63acf88821f46a8f6d5e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaeab75ece0c73dd97e8f21911ed22d06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaeab75ece0c73dd97e8f21911ed22d06">ADC_CR1_SCAN</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaaeab75ece0c73dd97e8f21911ed22d06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c9fc31f19c04033dfa98e982519c451"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c9fc31f19c04033dfa98e982519c451">ADC_CR1_AWDSGL</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga5c9fc31f19c04033dfa98e982519c451"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6353cb0d564410358b3a086dd0241f8c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6353cb0d564410358b3a086dd0241f8c">ADC_CR1_JAUTO</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga6353cb0d564410358b3a086dd0241f8c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd690297fc73fca40d797f4c90800b9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd690297fc73fca40d797f4c90800b9a">ADC_CR1_DISCEN</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gabd690297fc73fca40d797f4c90800b9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd06a2840346bf45ff335707db0b6e30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd06a2840346bf45ff335707db0b6e30">ADC_CR1_JDISCEN</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gacd06a2840346bf45ff335707db0b6e30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeaa416a291023449ae82e7ef39844075"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeaa416a291023449ae82e7ef39844075">ADC_CR1_DISCNUM</a>   ((uint32_t)0x0000E000)</td></tr>
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<tr class="separator:gaeaa416a291023449ae82e7ef39844075"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59ff81db7def261f0e84d5dbb6cca1ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59ff81db7def261f0e84d5dbb6cca1ce">ADC_CR1_DISCNUM_0</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga59ff81db7def261f0e84d5dbb6cca1ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39940d3611126052f4f748934c629ebf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39940d3611126052f4f748934c629ebf">ADC_CR1_DISCNUM_1</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga39940d3611126052f4f748934c629ebf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab73d5fdf276f5ef3965afdda78ac9e1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab73d5fdf276f5ef3965afdda78ac9e1e">ADC_CR1_DISCNUM_2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gab73d5fdf276f5ef3965afdda78ac9e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4886de74bcd3a1e545094089f76fd0b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4886de74bcd3a1e545094089f76fd0b3">ADC_CR1_JAWDEN</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga4886de74bcd3a1e545094089f76fd0b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e006d43fcb9fe1306745c95a1bdd651"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e006d43fcb9fe1306745c95a1bdd651">ADC_CR1_AWDEN</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga6e006d43fcb9fe1306745c95a1bdd651"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga71e4a4c233895a2e7b6dd3ca6ca849e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga71e4a4c233895a2e7b6dd3ca6ca849e5">ADC_CR1_RES</a>   ((uint32_t)0x03000000)</td></tr>
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<tr class="separator:ga71e4a4c233895a2e7b6dd3ca6ca849e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacfc432ddbd2140a92d877f6d9dc52417"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacfc432ddbd2140a92d877f6d9dc52417">ADC_CR1_RES_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gacfc432ddbd2140a92d877f6d9dc52417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga674904864f540043692a5b5ead9fae10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga674904864f540043692a5b5ead9fae10">ADC_CR1_RES_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga674904864f540043692a5b5ead9fae10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa892fda7c204bf18a33a059f28be0fba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa892fda7c204bf18a33a059f28be0fba">ADC_CR1_OVRIE</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaa892fda7c204bf18a33a059f28be0fba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89b646f092b052d8488d2016f6290f0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89b646f092b052d8488d2016f6290f0e">ADC_CR2_ADON</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga89b646f092b052d8488d2016f6290f0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49bb71a868c9d88a0f7bbe48918b2140"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49bb71a868c9d88a0f7bbe48918b2140">ADC_CR2_CONT</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga49bb71a868c9d88a0f7bbe48918b2140"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga017309ac4b532bc8c607388f4e2cbbec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga017309ac4b532bc8c607388f4e2cbbec">ADC_CR2_DMA</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga017309ac4b532bc8c607388f4e2cbbec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d7d75f0c4c8fa190fbf9f86fbe6dfc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d7d75f0c4c8fa190fbf9f86fbe6dfc8">ADC_CR2_DDS</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga0d7d75f0c4c8fa190fbf9f86fbe6dfc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf9dac2004ab20295e04012060ab24aeb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf9dac2004ab20295e04012060ab24aeb">ADC_CR2_EOCS</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf9dac2004ab20295e04012060ab24aeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5950b5a7438a447584f6dd86c343362"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5950b5a7438a447584f6dd86c343362">ADC_CR2_ALIGN</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gaf5950b5a7438a447584f6dd86c343362"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab3aa5d0e2a4b77960ec8f3b425a3eac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab3aa5d0e2a4b77960ec8f3b425a3eac">ADC_CR2_JEXTSEL</a>   ((uint32_t)0x000F0000)</td></tr>
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<tr class="separator:gaab3aa5d0e2a4b77960ec8f3b425a3eac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa70c1f30e2101e2177ce564440203ba3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa70c1f30e2101e2177ce564440203ba3">ADC_CR2_JEXTSEL_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaa70c1f30e2101e2177ce564440203ba3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99fa4a240d34ce231d6d0543bac7fd9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99fa4a240d34ce231d6d0543bac7fd9b">ADC_CR2_JEXTSEL_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga99fa4a240d34ce231d6d0543bac7fd9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga571bb97f950181fedbc0d4756482713d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga571bb97f950181fedbc0d4756482713d">ADC_CR2_JEXTSEL_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga571bb97f950181fedbc0d4756482713d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae34f5dda7a153ffd927c9cd38999f822"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae34f5dda7a153ffd927c9cd38999f822">ADC_CR2_JEXTSEL_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gae34f5dda7a153ffd927c9cd38999f822"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07330f702208792faca3a563dc4fd9c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07330f702208792faca3a563dc4fd9c6">ADC_CR2_JEXTEN</a>   ((uint32_t)0x00300000)</td></tr>
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<tr class="separator:ga07330f702208792faca3a563dc4fd9c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0b3c99510de210ff3137ff8de328889b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b3c99510de210ff3137ff8de328889b">ADC_CR2_JEXTEN_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga0b3c99510de210ff3137ff8de328889b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga949c70fdf36a32a6afcbf44fec123832"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga949c70fdf36a32a6afcbf44fec123832">ADC_CR2_JEXTEN_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga949c70fdf36a32a6afcbf44fec123832"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac12fe8a6cc24eef2ed2e1f1525855678"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac12fe8a6cc24eef2ed2e1f1525855678">ADC_CR2_JSWSTART</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gac12fe8a6cc24eef2ed2e1f1525855678"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d1054d6cd017e305cf6e8a864ce96c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d1054d6cd017e305cf6e8a864ce96c8">ADC_CR2_EXTSEL</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:ga6d1054d6cd017e305cf6e8a864ce96c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9410c7fd93f6d0b157ede745ee269d7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9410c7fd93f6d0b157ede745ee269d7b">ADC_CR2_EXTSEL_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga9410c7fd93f6d0b157ede745ee269d7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a6725419743a8d01b4a223609952893"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a6725419743a8d01b4a223609952893">ADC_CR2_EXTSEL_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga5a6725419743a8d01b4a223609952893"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c2322988b5fff19d012d9179d412ad0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c2322988b5fff19d012d9179d412ad0">ADC_CR2_EXTSEL_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga5c2322988b5fff19d012d9179d412ad0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga387de6160834197888efa43e164c2db9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga387de6160834197888efa43e164c2db9">ADC_CR2_EXTSEL_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga387de6160834197888efa43e164c2db9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga574b4d8e90655d0432882d620e629234"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga574b4d8e90655d0432882d620e629234">ADC_CR2_EXTEN</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="memitem:ga3519da0cc6fbd31444a16244c70232e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3519da0cc6fbd31444a16244c70232e6">ADC_CR2_EXTEN_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga3519da0cc6fbd31444a16244c70232e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17e37edddbb6ad791bffb350cca23d4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17e37edddbb6ad791bffb350cca23d4d">ADC_CR2_EXTEN_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga17e37edddbb6ad791bffb350cca23d4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5eae65bad1a6c975e1911eb5ba117468"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5eae65bad1a6c975e1911eb5ba117468">ADC_CR2_SWSTART</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga5eae65bad1a6c975e1911eb5ba117468"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga32242a2c2156a012a7343bcb43d490d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga32242a2c2156a012a7343bcb43d490d0">ADC_SMPR1_SMP10</a>   ((uint32_t)0x00000007)</td></tr>
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<tr class="separator:ga32242a2c2156a012a7343bcb43d490d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a8996c53042759f01e966fb00351ebf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a8996c53042759f01e966fb00351ebf">ADC_SMPR1_SMP10_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga8a8996c53042759f01e966fb00351ebf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42b96f058436c8bdcfabe1e08c7edd61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42b96f058436c8bdcfabe1e08c7edd61">ADC_SMPR1_SMP10_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga42b96f058436c8bdcfabe1e08c7edd61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga289d89b4d92d7f685a8e44aeb9ddcded"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga289d89b4d92d7f685a8e44aeb9ddcded">ADC_SMPR1_SMP10_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga289d89b4d92d7f685a8e44aeb9ddcded"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c74d559f2a70a2e8c807b7bcaccd800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c74d559f2a70a2e8c807b7bcaccd800">ADC_SMPR1_SMP11</a>   ((uint32_t)0x00000038)</td></tr>
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<tr class="separator:ga4c74d559f2a70a2e8c807b7bcaccd800"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60780d613953f48a2dfc8debce72fb28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60780d613953f48a2dfc8debce72fb28">ADC_SMPR1_SMP11_0</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga60780d613953f48a2dfc8debce72fb28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa61e1dbafcae3e1c8eae4320a6e5ec5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa61e1dbafcae3e1c8eae4320a6e5ec5d">ADC_SMPR1_SMP11_1</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaa61e1dbafcae3e1c8eae4320a6e5ec5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93a876a9a6d90cd30456433b7e38c3f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93a876a9a6d90cd30456433b7e38c3f2">ADC_SMPR1_SMP11_2</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga93a876a9a6d90cd30456433b7e38c3f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga433b5a7d944666fb7abed3b107c352fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga433b5a7d944666fb7abed3b107c352fc">ADC_SMPR1_SMP12</a>   ((uint32_t)0x000001C0)</td></tr>
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<tr class="separator:ga433b5a7d944666fb7abed3b107c352fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaaac6ae97c00276d7472bc92a9edd6e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaaac6ae97c00276d7472bc92a9edd6e2">ADC_SMPR1_SMP12_0</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaaaac6ae97c00276d7472bc92a9edd6e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6020f9d742e15650ad919aaccaf2ff6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6020f9d742e15650ad919aaccaf2ff6c">ADC_SMPR1_SMP12_1</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga6020f9d742e15650ad919aaccaf2ff6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb59adb544d416e91ea0c12d4f39ccc9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb59adb544d416e91ea0c12d4f39ccc9">ADC_SMPR1_SMP12_2</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gadb59adb544d416e91ea0c12d4f39ccc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2df120cd93a177ea17946a656259129e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2df120cd93a177ea17946a656259129e">ADC_SMPR1_SMP13</a>   ((uint32_t)0x00000E00)</td></tr>
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<tr class="separator:ga2df120cd93a177ea17946a656259129e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49e7444d6cf630eccfd52fb4155bd553"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49e7444d6cf630eccfd52fb4155bd553">ADC_SMPR1_SMP13_0</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga49e7444d6cf630eccfd52fb4155bd553"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5d5ad9d8d08feaee18d1f2d8d6787a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5d5ad9d8d08feaee18d1f2d8d6787a1">ADC_SMPR1_SMP13_1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gad5d5ad9d8d08feaee18d1f2d8d6787a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4cd285d46485136deb6223377d0b17c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4cd285d46485136deb6223377d0b17c">ADC_SMPR1_SMP13_2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gac4cd285d46485136deb6223377d0b17c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1574fc02a40f22fc751073e02ebb781"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab1574fc02a40f22fc751073e02ebb781">ADC_SMPR1_SMP14</a>   ((uint32_t)0x00007000)</td></tr>
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<tr class="separator:gab1574fc02a40f22fc751073e02ebb781"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9243898272b1d27018c971eecfa57f78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9243898272b1d27018c971eecfa57f78">ADC_SMPR1_SMP14_0</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga9243898272b1d27018c971eecfa57f78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1016b8ca359247491a2a0a5d77aa1c22"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1016b8ca359247491a2a0a5d77aa1c22">ADC_SMPR1_SMP14_1</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga1016b8ca359247491a2a0a5d77aa1c22"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e658a8b72bac244bf919a874690e49e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e658a8b72bac244bf919a874690e49e">ADC_SMPR1_SMP14_2</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga8e658a8b72bac244bf919a874690e49e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ae0043ad863f7710834217bc82c8ecf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ae0043ad863f7710834217bc82c8ecf">ADC_SMPR1_SMP15</a>   ((uint32_t)0x00038000)</td></tr>
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<tr class="separator:ga5ae0043ad863f7710834217bc82c8ecf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac5f8e555f5ece2ee632dd9d6c60d9584"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac5f8e555f5ece2ee632dd9d6c60d9584">ADC_SMPR1_SMP15_0</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gac5f8e555f5ece2ee632dd9d6c60d9584"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab978e10b7dcfe6c1b88dd4fef50498ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab978e10b7dcfe6c1b88dd4fef50498ac">ADC_SMPR1_SMP15_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gab978e10b7dcfe6c1b88dd4fef50498ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga045285e1c5ab9ae570e37fe627b0e117"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga045285e1c5ab9ae570e37fe627b0e117">ADC_SMPR1_SMP15_2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga045285e1c5ab9ae570e37fe627b0e117"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2925d05347e46e9c6a970214fa76bbec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2925d05347e46e9c6a970214fa76bbec">ADC_SMPR1_SMP16</a>   ((uint32_t)0x001C0000)</td></tr>
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<tr class="separator:ga2925d05347e46e9c6a970214fa76bbec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae1a7d0ef695bd2017bcda3949f0134be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1a7d0ef695bd2017bcda3949f0134be">ADC_SMPR1_SMP16_0</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gae1a7d0ef695bd2017bcda3949f0134be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga793ff2f46f51e1d485a9bd728687bf15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga793ff2f46f51e1d485a9bd728687bf15">ADC_SMPR1_SMP16_1</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga793ff2f46f51e1d485a9bd728687bf15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade321fdbf74f830e54951ccfca285686"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade321fdbf74f830e54951ccfca285686">ADC_SMPR1_SMP16_2</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gade321fdbf74f830e54951ccfca285686"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9867370ecef7b99c32b8ecb44ad9e581"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9867370ecef7b99c32b8ecb44ad9e581">ADC_SMPR1_SMP17</a>   ((uint32_t)0x00E00000)</td></tr>
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<tr class="separator:ga9867370ecef7b99c32b8ecb44ad9e581"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42b004d74f288cb191bfc6a327f94480"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42b004d74f288cb191bfc6a327f94480">ADC_SMPR1_SMP17_0</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga42b004d74f288cb191bfc6a327f94480"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3ac4c21586d6a353c208a5175906ecc1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ac4c21586d6a353c208a5175906ecc1">ADC_SMPR1_SMP17_1</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga3ac4c21586d6a353c208a5175906ecc1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac81ceec799a7da2def4f33339bd5e273"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac81ceec799a7da2def4f33339bd5e273">ADC_SMPR1_SMP17_2</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gac81ceec799a7da2def4f33339bd5e273"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac3c7d84a92899d950de236fe9d14df2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3c7d84a92899d950de236fe9d14df2c">ADC_SMPR1_SMP18</a>   ((uint32_t)0x07000000)</td></tr>
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||
<tr class="separator:gac3c7d84a92899d950de236fe9d14df2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6862168bb7688638764defc72120716b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6862168bb7688638764defc72120716b">ADC_SMPR1_SMP18_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga6862168bb7688638764defc72120716b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga72a01c59a0a785b18235641b36735090"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga72a01c59a0a785b18235641b36735090">ADC_SMPR1_SMP18_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga72a01c59a0a785b18235641b36735090"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec1addc9c417b4b7693768817b058059"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec1addc9c417b4b7693768817b058059">ADC_SMPR1_SMP18_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaec1addc9c417b4b7693768817b058059"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a13b3c652e5759e2d8bc7e38889bc5e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a13b3c652e5759e2d8bc7e38889bc5e">ADC_SMPR2_SMP0</a>   ((uint32_t)0x00000007)</td></tr>
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||
<tr class="separator:ga5a13b3c652e5759e2d8bc7e38889bc5e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bde59fce56980a59a3dfdb0da7ebe0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1bde59fce56980a59a3dfdb0da7ebe0c">ADC_SMPR2_SMP0_0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga1bde59fce56980a59a3dfdb0da7ebe0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d5b6e025d8e70767914c144793b93e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d5b6e025d8e70767914c144793b93e6">ADC_SMPR2_SMP0_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga1d5b6e025d8e70767914c144793b93e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga361de56c56c45834fc837df349f155dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga361de56c56c45834fc837df349f155dc">ADC_SMPR2_SMP0_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:ga5b85dd0b1708cdf1bf403b07ad51da36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b85dd0b1708cdf1bf403b07ad51da36">ADC_SMPR2_SMP1</a>   ((uint32_t)0x00000038)</td></tr>
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<tr class="separator:ga5b85dd0b1708cdf1bf403b07ad51da36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa99de1a2d2bbe8921353114d03cb7f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa99de1a2d2bbe8921353114d03cb7f6">ADC_SMPR2_SMP1_0</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gaaa99de1a2d2bbe8921353114d03cb7f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6ceb41e5e3cb6ae7da28070bc0b07d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6ceb41e5e3cb6ae7da28070bc0b07d2">ADC_SMPR2_SMP1_1</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaf6ceb41e5e3cb6ae7da28070bc0b07d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b9efc8f9488d389301c4a6f9ef4427a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b9efc8f9488d389301c4a6f9ef4427a">ADC_SMPR2_SMP1_2</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga8b9efc8f9488d389301c4a6f9ef4427a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea6e1e298372596bcdcdf93e763b3683"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea6e1e298372596bcdcdf93e763b3683">ADC_SMPR2_SMP2</a>   ((uint32_t)0x000001C0)</td></tr>
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<tr class="separator:gaea6e1e298372596bcdcdf93e763b3683"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga97e2ac0d4d8afb3aa0b4c09c8fa1d018"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97e2ac0d4d8afb3aa0b4c09c8fa1d018">ADC_SMPR2_SMP2_0</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga97e2ac0d4d8afb3aa0b4c09c8fa1d018"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83fe79e3e10b689a209dc5a724f89199"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83fe79e3e10b689a209dc5a724f89199">ADC_SMPR2_SMP2_1</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga83fe79e3e10b689a209dc5a724f89199"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad580d376e0a0bcb34183a6d6735b3122"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad580d376e0a0bcb34183a6d6735b3122">ADC_SMPR2_SMP2_2</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gad580d376e0a0bcb34183a6d6735b3122"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga081c3d61e5311a11cb046d56630e1fd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga081c3d61e5311a11cb046d56630e1fd0">ADC_SMPR2_SMP3</a>   ((uint32_t)0x00000E00)</td></tr>
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<tr class="separator:ga081c3d61e5311a11cb046d56630e1fd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1679a42f67ca4b9b9496dd6000fec01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1679a42f67ca4b9b9496dd6000fec01">ADC_SMPR2_SMP3_0</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaa1679a42f67ca4b9b9496dd6000fec01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bf92b0a67dcec9b3c325d58e7e517b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1bf92b0a67dcec9b3c325d58e7e517b0">ADC_SMPR2_SMP3_1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga1bf92b0a67dcec9b3c325d58e7e517b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40682268fa8534bd369eb64a329bdf46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40682268fa8534bd369eb64a329bdf46">ADC_SMPR2_SMP3_2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga40682268fa8534bd369eb64a329bdf46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeab838fcf0aace87b2163b96d208bb64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeab838fcf0aace87b2163b96d208bb64">ADC_SMPR2_SMP4</a>   ((uint32_t)0x00007000)</td></tr>
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<tr class="separator:gaeab838fcf0aace87b2163b96d208bb64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae4123bce64dc4f1831f992b09d6db4f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae4123bce64dc4f1831f992b09d6db4f2">ADC_SMPR2_SMP4_0</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gae4123bce64dc4f1831f992b09d6db4f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3edf57b459804d17d5a588dd446c763"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3edf57b459804d17d5a588dd446c763">ADC_SMPR2_SMP4_1</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gad3edf57b459804d17d5a588dd446c763"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac2a2fd74311c4ffcaed4a8d1a3be2245"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac2a2fd74311c4ffcaed4a8d1a3be2245">ADC_SMPR2_SMP4_2</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gac2a2fd74311c4ffcaed4a8d1a3be2245"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9500281fa740994b9cfa6a7df8227849"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9500281fa740994b9cfa6a7df8227849">ADC_SMPR2_SMP5</a>   ((uint32_t)0x00038000)</td></tr>
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<tr class="separator:ga9500281fa740994b9cfa6a7df8227849"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22dd2b1695a4e7a4b1d4ec2b8e244ffc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22dd2b1695a4e7a4b1d4ec2b8e244ffc">ADC_SMPR2_SMP5_0</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga22dd2b1695a4e7a4b1d4ec2b8e244ffc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4de4f6c62646be62d0710dc46eb5e88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab4de4f6c62646be62d0710dc46eb5e88">ADC_SMPR2_SMP5_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gab4de4f6c62646be62d0710dc46eb5e88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c19081d82f2c6478c6aefc207778e1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c19081d82f2c6478c6aefc207778e1e">ADC_SMPR2_SMP5_2</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga6c19081d82f2c6478c6aefc207778e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64cd99c27d07298913541dbdc31aa8ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga64cd99c27d07298913541dbdc31aa8ae">ADC_SMPR2_SMP6</a>   ((uint32_t)0x001C0000)</td></tr>
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<tr class="separator:ga64cd99c27d07298913541dbdc31aa8ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbebc0a7f368e5846408d768603d9b44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbebc0a7f368e5846408d768603d9b44">ADC_SMPR2_SMP6_0</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gadbebc0a7f368e5846408d768603d9b44"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27f59166864f7cd0a5e8e6b4450e72d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27f59166864f7cd0a5e8e6b4450e72d3">ADC_SMPR2_SMP6_1</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga27f59166864f7cd0a5e8e6b4450e72d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4139fac7e8ba3e604e35ba906880f909"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4139fac7e8ba3e604e35ba906880f909">ADC_SMPR2_SMP6_2</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga4139fac7e8ba3e604e35ba906880f909"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ec6ee971fc8b2d1890858df94a5c500"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ec6ee971fc8b2d1890858df94a5c500">ADC_SMPR2_SMP7</a>   ((uint32_t)0x00E00000)</td></tr>
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<tr class="separator:ga6ec6ee971fc8b2d1890858df94a5c500"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f30003c59ab6c232d73aa446c77651a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f30003c59ab6c232d73aa446c77651a">ADC_SMPR2_SMP7_0</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga6f30003c59ab6c232d73aa446c77651a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0c8708fc97082257b43fa4534c721068"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0c8708fc97082257b43fa4534c721068">ADC_SMPR2_SMP7_1</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga0c8708fc97082257b43fa4534c721068"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2e42897bdc25951a73bac060a7a065ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2e42897bdc25951a73bac060a7a065ca">ADC_SMPR2_SMP7_2</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga2e42897bdc25951a73bac060a7a065ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0695c289e658b772070a7f29797e9cc3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0695c289e658b772070a7f29797e9cc3">ADC_SMPR2_SMP8</a>   ((uint32_t)0x07000000)</td></tr>
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<tr class="separator:ga0695c289e658b772070a7f29797e9cc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5f1d2290107eda2dfee33810779b0f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5f1d2290107eda2dfee33810779b0f6">ADC_SMPR2_SMP8_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gab5f1d2290107eda2dfee33810779b0f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb9ce9d71f989bad0ed686caf4dd5250"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb9ce9d71f989bad0ed686caf4dd5250">ADC_SMPR2_SMP8_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gabb9ce9d71f989bad0ed686caf4dd5250"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3756c6141f55c60da0bcd4d599e7d60d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3756c6141f55c60da0bcd4d599e7d60d">ADC_SMPR2_SMP8_2</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga3756c6141f55c60da0bcd4d599e7d60d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5348f83daaa38060702d7b9cfe2e4005"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5348f83daaa38060702d7b9cfe2e4005">ADC_SMPR2_SMP9</a>   ((uint32_t)0x38000000)</td></tr>
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<tr class="separator:ga5348f83daaa38060702d7b9cfe2e4005"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga892f18c89fbaafc74b7d67db74b41423"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga892f18c89fbaafc74b7d67db74b41423">ADC_SMPR2_SMP9_0</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga892f18c89fbaafc74b7d67db74b41423"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a6949e61c5845a7ff2331b64cb579bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a6949e61c5845a7ff2331b64cb579bc">ADC_SMPR2_SMP9_1</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga3a6949e61c5845a7ff2331b64cb579bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga070135017850599b1e19766c6aa31cd1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga070135017850599b1e19766c6aa31cd1">ADC_SMPR2_SMP9_2</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga070135017850599b1e19766c6aa31cd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad76f97130b391455094605a6c803026c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad76f97130b391455094605a6c803026c">ADC_JOFR1_JOFFSET1</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:gad76f97130b391455094605a6c803026c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1b15a9e9ce10303e233059c1de6d956c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b15a9e9ce10303e233059c1de6d956c">ADC_JOFR2_JOFFSET2</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:ga1b15a9e9ce10303e233059c1de6d956c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga743e4c3a7cefc1a193146e77791c3985"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga743e4c3a7cefc1a193146e77791c3985">ADC_JOFR3_JOFFSET3</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:ga743e4c3a7cefc1a193146e77791c3985"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada0937f2f6a64bd6b7531ad553471b8d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada0937f2f6a64bd6b7531ad553471b8d">ADC_JOFR4_JOFFSET4</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:gada0937f2f6a64bd6b7531ad553471b8d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad685f031174465e636ef75a5bd7b637d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad685f031174465e636ef75a5bd7b637d">ADC_HTR_HT</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="memitem:gac7ac18b970378acf726f04ae68232c24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac7ac18b970378acf726f04ae68232c24">ADC_LTR_LT</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:gac7ac18b970378acf726f04ae68232c24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ae1998c0dd11275958e7347a92852fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ae1998c0dd11275958e7347a92852fc">ADC_SQR1_SQ13</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:ga1ae1998c0dd11275958e7347a92852fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40d24ddd458198e7731d5abf9d15fc08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40d24ddd458198e7731d5abf9d15fc08">ADC_SQR1_SQ13_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga40d24ddd458198e7731d5abf9d15fc08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaccdca8b0f3cab9f62ae2ffbb9c30546f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaccdca8b0f3cab9f62ae2ffbb9c30546f">ADC_SQR1_SQ13_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaccdca8b0f3cab9f62ae2ffbb9c30546f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37e8723bfdc43da0b86e40a49b78c9ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37e8723bfdc43da0b86e40a49b78c9ad">ADC_SQR1_SQ13_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga37e8723bfdc43da0b86e40a49b78c9ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga412374f7ce1f62ee187c819391898778"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga412374f7ce1f62ee187c819391898778">ADC_SQR1_SQ13_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga412374f7ce1f62ee187c819391898778"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05ca5e303f844f512c9a9cb5df9a1028"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05ca5e303f844f512c9a9cb5df9a1028">ADC_SQR1_SQ13_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga05ca5e303f844f512c9a9cb5df9a1028"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0251199146cb3d0d2c1c0608fbca585"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0251199146cb3d0d2c1c0608fbca585">ADC_SQR1_SQ14</a>   ((uint32_t)0x000003E0)</td></tr>
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<tr class="separator:gab0251199146cb3d0d2c1c0608fbca585"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacde3a6d9e94aa1c2399e335911fd6212"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacde3a6d9e94aa1c2399e335911fd6212">ADC_SQR1_SQ14_0</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gacde3a6d9e94aa1c2399e335911fd6212"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bc61e4d3ea200e1fc3e9d621ebbd2b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1bc61e4d3ea200e1fc3e9d621ebbd2b4">ADC_SQR1_SQ14_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga1bc61e4d3ea200e1fc3e9d621ebbd2b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeea616e444521cd58c5d8d574c47ccf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeea616e444521cd58c5d8d574c47ccf0">ADC_SQR1_SQ14_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaeea616e444521cd58c5d8d574c47ccf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e0c9439633fb5c67c8f2138c9d2efae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e0c9439633fb5c67c8f2138c9d2efae">ADC_SQR1_SQ14_3</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga0e0c9439633fb5c67c8f2138c9d2efae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea22b4dd0fbb26d2a0babbc483778b0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea22b4dd0fbb26d2a0babbc483778b0e">ADC_SQR1_SQ14_4</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaea22b4dd0fbb26d2a0babbc483778b0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23222c591c6d926f7a741bc9346f1d8f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23222c591c6d926f7a741bc9346f1d8f">ADC_SQR1_SQ15</a>   ((uint32_t)0x00007C00)</td></tr>
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<tr class="separator:ga23222c591c6d926f7a741bc9346f1d8f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacbfbc70f67ce1d8f227e17a7f19c123b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacbfbc70f67ce1d8f227e17a7f19c123b">ADC_SQR1_SQ15_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gacbfbc70f67ce1d8f227e17a7f19c123b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac00e343ff0dd8f1f29e897148e3e070a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac00e343ff0dd8f1f29e897148e3e070a">ADC_SQR1_SQ15_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gac00e343ff0dd8f1f29e897148e3e070a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab63443b0c5a2eca60a8c9714f6f31c03"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab63443b0c5a2eca60a8c9714f6f31c03">ADC_SQR1_SQ15_2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gab63443b0c5a2eca60a8c9714f6f31c03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf676d45ba227a2dc641b2afadfa7852"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf676d45ba227a2dc641b2afadfa7852">ADC_SQR1_SQ15_3</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gadf676d45ba227a2dc641b2afadfa7852"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7dbc07d0904f60abcc15827ccab1a8c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7dbc07d0904f60abcc15827ccab1a8c2">ADC_SQR1_SQ15_4</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga7dbc07d0904f60abcc15827ccab1a8c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafecb33099669a080cede6ce0236389e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafecb33099669a080cede6ce0236389e7">ADC_SQR1_SQ16</a>   ((uint32_t)0x000F8000)</td></tr>
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<tr class="separator:gafecb33099669a080cede6ce0236389e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3404d0bf04b8561bf93455d968b77ea9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3404d0bf04b8561bf93455d968b77ea9">ADC_SQR1_SQ16_0</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga3404d0bf04b8561bf93455d968b77ea9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ea6af777051f14be5cf166dd4ae69d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ea6af777051f14be5cf166dd4ae69d1">ADC_SQR1_SQ16_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga7ea6af777051f14be5cf166dd4ae69d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf59e4a113346ac3daf6829c3321444f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf59e4a113346ac3daf6829c3321444f5">ADC_SQR1_SQ16_2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gaf59e4a113346ac3daf6829c3321444f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6052517e5fcab3f58c42b59fb3ffee55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6052517e5fcab3f58c42b59fb3ffee55">ADC_SQR1_SQ16_3</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga6052517e5fcab3f58c42b59fb3ffee55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7af851b5898b4421958e7a100602c8cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7af851b5898b4421958e7a100602c8cd">ADC_SQR1_SQ16_4</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga7af851b5898b4421958e7a100602c8cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae68a19a18d72f6d87c6f2b8cc8bfc6dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae68a19a18d72f6d87c6f2b8cc8bfc6dc">ADC_SQR1_L</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:gae68a19a18d72f6d87c6f2b8cc8bfc6dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00ec56fbf232492ec12c954e27d03c6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00ec56fbf232492ec12c954e27d03c6c">ADC_SQR1_L_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga00ec56fbf232492ec12c954e27d03c6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52708c6570da08c295603e5b52461ecd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52708c6570da08c295603e5b52461ecd">ADC_SQR1_L_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga52708c6570da08c295603e5b52461ecd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b914eeb128157c4acf6f6b9a4be5558"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b914eeb128157c4acf6f6b9a4be5558">ADC_SQR1_L_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga8b914eeb128157c4acf6f6b9a4be5558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffdd34daa55da53d18055417ae895c47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffdd34daa55da53d18055417ae895c47">ADC_SQR1_L_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gaffdd34daa55da53d18055417ae895c47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa9f66f702fc124040956117f20ef8df4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa9f66f702fc124040956117f20ef8df4">ADC_SQR2_SQ7</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:gaa9f66f702fc124040956117f20ef8df4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12bbc822c10582a80f7e20a11038ce96"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12bbc822c10582a80f7e20a11038ce96">ADC_SQR2_SQ7_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga12bbc822c10582a80f7e20a11038ce96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3d0d7daf3b6db6ff4fa382495f6127c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3d0d7daf3b6db6ff4fa382495f6127c6">ADC_SQR2_SQ7_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga3d0d7daf3b6db6ff4fa382495f6127c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74bda24f18a95261661a944cecf45a52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74bda24f18a95261661a944cecf45a52">ADC_SQR2_SQ7_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga74bda24f18a95261661a944cecf45a52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2697675d008dda4e6a4905fc0f8d22af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2697675d008dda4e6a4905fc0f8d22af">ADC_SQR2_SQ7_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2697675d008dda4e6a4905fc0f8d22af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c46dd0f30ef85094ca0cde2e8c00dac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c46dd0f30ef85094ca0cde2e8c00dac">ADC_SQR2_SQ7_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga2c46dd0f30ef85094ca0cde2e8c00dac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga308ec58a8d20dcb3a348c30c332a0a8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga308ec58a8d20dcb3a348c30c332a0a8e">ADC_SQR2_SQ8</a>   ((uint32_t)0x000003E0)</td></tr>
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||
<tr class="separator:ga308ec58a8d20dcb3a348c30c332a0a8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga858717a28d6c26612ad4ced46863ba13"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga858717a28d6c26612ad4ced46863ba13">ADC_SQR2_SQ8_0</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga858717a28d6c26612ad4ced46863ba13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d06168a43b4845409f2fb9193ee474a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d06168a43b4845409f2fb9193ee474a">ADC_SQR2_SQ8_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga2d06168a43b4845409f2fb9193ee474a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa5eaea65d6719a8199639ec30bb8a07b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa5eaea65d6719a8199639ec30bb8a07b">ADC_SQR2_SQ8_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaa5eaea65d6719a8199639ec30bb8a07b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23e22da18926dd107adc69282a445412"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23e22da18926dd107adc69282a445412">ADC_SQR2_SQ8_3</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga23e22da18926dd107adc69282a445412"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacadd092f31f37bb129065be175673c63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacadd092f31f37bb129065be175673c63">ADC_SQR2_SQ8_4</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="memitem:gaf5d91ecfc3d40cc6b1960544e526eb91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5d91ecfc3d40cc6b1960544e526eb91">ADC_SQR2_SQ9</a>   ((uint32_t)0x00007C00)</td></tr>
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<tr class="separator:gaf5d91ecfc3d40cc6b1960544e526eb91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace032949b436d9af8a20ea10a349d55b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace032949b436d9af8a20ea10a349d55b">ADC_SQR2_SQ9_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gace032949b436d9af8a20ea10a349d55b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5cf43f1c5de0e73d6159fabc3681b891"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5cf43f1c5de0e73d6159fabc3681b891">ADC_SQR2_SQ9_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga5cf43f1c5de0e73d6159fabc3681b891"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3389c07a9de242151ffa434908fee39d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3389c07a9de242151ffa434908fee39d">ADC_SQR2_SQ9_2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga3389c07a9de242151ffa434908fee39d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13f30540b9f2d33640ea7d9652dc3c71"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13f30540b9f2d33640ea7d9652dc3c71">ADC_SQR2_SQ9_3</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga13f30540b9f2d33640ea7d9652dc3c71"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga910e5bda9852d49117b76b0d9f420ef2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga910e5bda9852d49117b76b0d9f420ef2">ADC_SQR2_SQ9_4</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga910e5bda9852d49117b76b0d9f420ef2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22e474b65f217ac21137b1d3f3cbb6bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22e474b65f217ac21137b1d3f3cbb6bb">ADC_SQR2_SQ10</a>   ((uint32_t)0x000F8000)</td></tr>
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<tr class="separator:ga22e474b65f217ac21137b1d3f3cbb6bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5a36056dbfce703d22387432ac12262"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5a36056dbfce703d22387432ac12262">ADC_SQR2_SQ10_0</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gab5a36056dbfce703d22387432ac12262"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09a1de734fe67156af26edf3b8a61044"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09a1de734fe67156af26edf3b8a61044">ADC_SQR2_SQ10_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga09a1de734fe67156af26edf3b8a61044"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b1d6ad0a40e7171d40a964b361d1eb9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b1d6ad0a40e7171d40a964b361d1eb9">ADC_SQR2_SQ10_2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga3b1d6ad0a40e7171d40a964b361d1eb9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga24d63e60eabad897aa9b19dbe56da71e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga24d63e60eabad897aa9b19dbe56da71e">ADC_SQR2_SQ10_3</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga24d63e60eabad897aa9b19dbe56da71e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7df899f74116e6cb3205af2767840cfb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7df899f74116e6cb3205af2767840cfb">ADC_SQR2_SQ10_4</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga7df899f74116e6cb3205af2767840cfb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7bf491b9c1542fb0d0b83fc96166362e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7bf491b9c1542fb0d0b83fc96166362e">ADC_SQR2_SQ11</a>   ((uint32_t)0x01F00000)</td></tr>
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<tr class="separator:ga7bf491b9c1542fb0d0b83fc96166362e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5bc91fec2ef468c5d39d19beda9ecd3e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5bc91fec2ef468c5d39d19beda9ecd3e">ADC_SQR2_SQ11_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga5bc91fec2ef468c5d39d19beda9ecd3e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e142789d2bd0584480e923754544ff5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e142789d2bd0584480e923754544ff5">ADC_SQR2_SQ11_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga3e142789d2bd0584480e923754544ff5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad6b844fe698c16437e91c9e05a367a4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad6b844fe698c16437e91c9e05a367a4c">ADC_SQR2_SQ11_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gad6b844fe698c16437e91c9e05a367a4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a8127191e3c48f4e0952bdb5e196225"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a8127191e3c48f4e0952bdb5e196225">ADC_SQR2_SQ11_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga1a8127191e3c48f4e0952bdb5e196225"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e8a39f645505ef84cb94bbc8d21b8e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e8a39f645505ef84cb94bbc8d21b8e0">ADC_SQR2_SQ11_4</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga5e8a39f645505ef84cb94bbc8d21b8e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8731660b1710e63d5423cd31c11be184"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8731660b1710e63d5423cd31c11be184">ADC_SQR2_SQ12</a>   ((uint32_t)0x3E000000)</td></tr>
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<tr class="separator:ga8731660b1710e63d5423cd31c11be184"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b2da909e54f8f6f61bf2bd2cd3e93e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b2da909e54f8f6f61bf2bd2cd3e93e0">ADC_SQR2_SQ12_0</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga5b2da909e54f8f6f61bf2bd2cd3e93e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5930c4a07d594aa23bc868526b42601"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5930c4a07d594aa23bc868526b42601">ADC_SQR2_SQ12_1</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gab5930c4a07d594aa23bc868526b42601"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga377805a21e7da2a66a3913a77bcc1e66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga377805a21e7da2a66a3913a77bcc1e66">ADC_SQR2_SQ12_2</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga377805a21e7da2a66a3913a77bcc1e66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2e3b45cac9aeb68d33b31a0914692857"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2e3b45cac9aeb68d33b31a0914692857">ADC_SQR2_SQ12_3</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga2e3b45cac9aeb68d33b31a0914692857"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6043d31a6cb9bd7c1542c3d41eb296c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6043d31a6cb9bd7c1542c3d41eb296c7">ADC_SQR2_SQ12_4</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga6043d31a6cb9bd7c1542c3d41eb296c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52491114e8394648559004f3bae718d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52491114e8394648559004f3bae718d9">ADC_SQR3_SQ1</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:ga52491114e8394648559004f3bae718d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53d3bb1c8bb48c7bcb0f7409db69f7b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53d3bb1c8bb48c7bcb0f7409db69f7b4">ADC_SQR3_SQ1_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga53d3bb1c8bb48c7bcb0f7409db69f7b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddb9af3a3b23a103fbc34c4f422fd2af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaddb9af3a3b23a103fbc34c4f422fd2af">ADC_SQR3_SQ1_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaddb9af3a3b23a103fbc34c4f422fd2af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf591f43a15c0c2c5afae2598b8f2afc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf591f43a15c0c2c5afae2598b8f2afc">ADC_SQR3_SQ1_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gadf591f43a15c0c2c5afae2598b8f2afc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05cfde0ef0e6a8dd6311f5cd7a806556"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05cfde0ef0e6a8dd6311f5cd7a806556">ADC_SQR3_SQ1_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga05cfde0ef0e6a8dd6311f5cd7a806556"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9981512f99a6c41ce107a9428d9cfdd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9981512f99a6c41ce107a9428d9cfdd0">ADC_SQR3_SQ1_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga9981512f99a6c41ce107a9428d9cfdd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60637fb25c099f8da72a8a36211f7a8c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60637fb25c099f8da72a8a36211f7a8c">ADC_SQR3_SQ2</a>   ((uint32_t)0x000003E0)</td></tr>
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<tr class="separator:ga60637fb25c099f8da72a8a36211f7a8c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaede0302eb64f023913c7a9e588d77937"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaede0302eb64f023913c7a9e588d77937">ADC_SQR3_SQ2_0</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaede0302eb64f023913c7a9e588d77937"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga158ab7429a864634a46c81fdb51d7508"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga158ab7429a864634a46c81fdb51d7508">ADC_SQR3_SQ2_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga158ab7429a864634a46c81fdb51d7508"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae729e21d590271c59c0d653300d5581c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae729e21d590271c59c0d653300d5581c">ADC_SQR3_SQ2_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gae729e21d590271c59c0d653300d5581c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf65c33275178a8777fa8fed8a01f7389"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf65c33275178a8777fa8fed8a01f7389">ADC_SQR3_SQ2_3</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaf65c33275178a8777fa8fed8a01f7389"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga990aeb689b7cc8f0bebb3dd6af7b27a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga990aeb689b7cc8f0bebb3dd6af7b27a6">ADC_SQR3_SQ2_4</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga990aeb689b7cc8f0bebb3dd6af7b27a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga601f21b7c1e571fb8c5ff310aca021e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga601f21b7c1e571fb8c5ff310aca021e1">ADC_SQR3_SQ3</a>   ((uint32_t)0x00007C00)</td></tr>
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||
<tr class="separator:ga601f21b7c1e571fb8c5ff310aca021e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7fd2c154b5852cb08ce60b4adfa36313"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7fd2c154b5852cb08ce60b4adfa36313">ADC_SQR3_SQ3_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga7fd2c154b5852cb08ce60b4adfa36313"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga214580377dd3a424ad819f14f6b025d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga214580377dd3a424ad819f14f6b025d4">ADC_SQR3_SQ3_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga214580377dd3a424ad819f14f6b025d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabae2353b109c9cda2a176ea1f44db4fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabae2353b109c9cda2a176ea1f44db4fe">ADC_SQR3_SQ3_2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gabae2353b109c9cda2a176ea1f44db4fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d2f00d3372bd1d64bf4eb2271277ab0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d2f00d3372bd1d64bf4eb2271277ab0">ADC_SQR3_SQ3_3</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga7d2f00d3372bd1d64bf4eb2271277ab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5279e505b1a59b223f30e5be139d5042"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5279e505b1a59b223f30e5be139d5042">ADC_SQR3_SQ3_4</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="memitem:ga3fc43f70bb3c67c639678b91d852390b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3fc43f70bb3c67c639678b91d852390b">ADC_SQR3_SQ4</a>   ((uint32_t)0x000F8000)</td></tr>
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<tr class="separator:ga3fc43f70bb3c67c639678b91d852390b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2a501b20cf758a7353efcb3f95a3a93"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2a501b20cf758a7353efcb3f95a3a93">ADC_SQR3_SQ4_0</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gab2a501b20cf758a7353efcb3f95a3a93"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffafa27fd561e4c7d419e3f665d80f2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffafa27fd561e4c7d419e3f665d80f2c">ADC_SQR3_SQ4_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaffafa27fd561e4c7d419e3f665d80f2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0251fa70e400ee74f442d8fba2b1afb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad0251fa70e400ee74f442d8fba2b1afb">ADC_SQR3_SQ4_2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gad0251fa70e400ee74f442d8fba2b1afb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3dc48c3c6b304517261486d8a63637ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3dc48c3c6b304517261486d8a63637ae">ADC_SQR3_SQ4_3</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga3dc48c3c6b304517261486d8a63637ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe23b9e640df96ca84eab4b6b4f44083"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe23b9e640df96ca84eab4b6b4f44083">ADC_SQR3_SQ4_4</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gafe23b9e640df96ca84eab4b6b4f44083"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae841d68049442e4568b86322ed4be6f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae841d68049442e4568b86322ed4be6f">ADC_SQR3_SQ5</a>   ((uint32_t)0x01F00000)</td></tr>
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<tr class="separator:gaae841d68049442e4568b86322ed4be6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1de9fc24755b715c700c6442f4a396b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1de9fc24755b715c700c6442f4a396b">ADC_SQR3_SQ5_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaa1de9fc24755b715c700c6442f4a396b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f704feb58eecb39bc7f199577064172"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f704feb58eecb39bc7f199577064172">ADC_SQR3_SQ5_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga3f704feb58eecb39bc7f199577064172"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88a7994f637a75d105cc5975b154c373"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88a7994f637a75d105cc5975b154c373">ADC_SQR3_SQ5_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga88a7994f637a75d105cc5975b154c373"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31c6fce8f01e75c68124124061f67f0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31c6fce8f01e75c68124124061f67f0e">ADC_SQR3_SQ5_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga31c6fce8f01e75c68124124061f67f0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b0cad694c068ea8874b6504bd6ae885"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b0cad694c068ea8874b6504bd6ae885">ADC_SQR3_SQ5_4</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga6b0cad694c068ea8874b6504bd6ae885"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga723792274b16b342d16d6a02fce74ba6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga723792274b16b342d16d6a02fce74ba6">ADC_SQR3_SQ6</a>   ((uint32_t)0x3E000000)</td></tr>
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<tr class="separator:ga723792274b16b342d16d6a02fce74ba6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91b8b5293abd0601c543c13a0b53b335"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91b8b5293abd0601c543c13a0b53b335">ADC_SQR3_SQ6_0</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga91b8b5293abd0601c543c13a0b53b335"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab29847362a613b43eeeda6db758d781e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab29847362a613b43eeeda6db758d781e">ADC_SQR3_SQ6_1</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gab29847362a613b43eeeda6db758d781e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa92c8ea1bfb42ed80622770ae2dc41ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa92c8ea1bfb42ed80622770ae2dc41ab">ADC_SQR3_SQ6_2</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gaa92c8ea1bfb42ed80622770ae2dc41ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaed2d7edb11fb84b02c175acff305a922"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaed2d7edb11fb84b02c175acff305a922">ADC_SQR3_SQ6_3</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gaed2d7edb11fb84b02c175acff305a922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78f9e51811549a6797ecfe1468def4ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78f9e51811549a6797ecfe1468def4ff">ADC_SQR3_SQ6_4</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga78f9e51811549a6797ecfe1468def4ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7fa15dfe51b084b36cb5df2fbf44bb2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7fa15dfe51b084b36cb5df2fbf44bb2">ADC_JSQR_JSQ1</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:gad7fa15dfe51b084b36cb5df2fbf44bb2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3ea38b080462c4571524b5fcbfed292"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3ea38b080462c4571524b5fcbfed292">ADC_JSQR_JSQ1_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaf3ea38b080462c4571524b5fcbfed292"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabae36d7655fb1dce11e60ffa8e57b509"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabae36d7655fb1dce11e60ffa8e57b509">ADC_JSQR_JSQ1_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gabae36d7655fb1dce11e60ffa8e57b509"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3e7a96d33f640444b40b70e9ee28671"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3e7a96d33f640444b40b70e9ee28671">ADC_JSQR_JSQ1_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gad3e7a96d33f640444b40b70e9ee28671"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6066a6aef47f317a5df0c9bbf59121fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6066a6aef47f317a5df0c9bbf59121fb">ADC_JSQR_JSQ1_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga6066a6aef47f317a5df0c9bbf59121fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2c4baf98380a477cebb01be3e8f0594"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2c4baf98380a477cebb01be3e8f0594">ADC_JSQR_JSQ1_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaf2c4baf98380a477cebb01be3e8f0594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e8446a5857e5379cff8cadf822e15d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e8446a5857e5379cff8cadf822e15d4">ADC_JSQR_JSQ2</a>   ((uint32_t)0x000003E0)</td></tr>
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<tr class="separator:ga3e8446a5857e5379cff8cadf822e15d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabf0889d056b56e4a113142b3694166d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaabf0889d056b56e4a113142b3694166d">ADC_JSQR_JSQ2_0</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaabf0889d056b56e4a113142b3694166d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga048f97e9e332adb21eca27b647af1378"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga048f97e9e332adb21eca27b647af1378">ADC_JSQR_JSQ2_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga048f97e9e332adb21eca27b647af1378"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga18bee187ed94e73b16eeea7501394581"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga18bee187ed94e73b16eeea7501394581">ADC_JSQR_JSQ2_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga18bee187ed94e73b16eeea7501394581"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78b031d11b56e49b2c28c1a79136b48a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78b031d11b56e49b2c28c1a79136b48a">ADC_JSQR_JSQ2_3</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga78b031d11b56e49b2c28c1a79136b48a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga064d6ccde30a22430c658b8efc431e59"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga064d6ccde30a22430c658b8efc431e59">ADC_JSQR_JSQ2_4</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga064d6ccde30a22430c658b8efc431e59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2fbdc1b854a54c4288402c2d3a7fca9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2fbdc1b854a54c4288402c2d3a7fca9">ADC_JSQR_JSQ3</a>   ((uint32_t)0x00007C00)</td></tr>
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<tr class="separator:gae2fbdc1b854a54c4288402c2d3a7fca9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12fbc27c3543f23125f632dfa60fdc98"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12fbc27c3543f23125f632dfa60fdc98">ADC_JSQR_JSQ3_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga12fbc27c3543f23125f632dfa60fdc98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga169ec7d371e3ee897b73c3ad84b6ed32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga169ec7d371e3ee897b73c3ad84b6ed32">ADC_JSQR_JSQ3_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga169ec7d371e3ee897b73c3ad84b6ed32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga693542d5a536304f364476589ba0bec9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga693542d5a536304f364476589ba0bec9">ADC_JSQR_JSQ3_2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga693542d5a536304f364476589ba0bec9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga139ddd01c0faf219dca844477453149e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga139ddd01c0faf219dca844477453149e">ADC_JSQR_JSQ3_3</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga139ddd01c0faf219dca844477453149e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1452b8cf4acc90fb522d90751043aac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1452b8cf4acc90fb522d90751043aac">ADC_JSQR_JSQ3_4</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gac1452b8cf4acc90fb522d90751043aac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39a279051ef198ee34cad73743b996f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39a279051ef198ee34cad73743b996f4">ADC_JSQR_JSQ4</a>   ((uint32_t)0x000F8000)</td></tr>
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<tr class="separator:ga39a279051ef198ee34cad73743b996f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13e250d329673c02f7a0d24d25e83649"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13e250d329673c02f7a0d24d25e83649">ADC_JSQR_JSQ4_0</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga13e250d329673c02f7a0d24d25e83649"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30dad81d708c35136e2da4e96cfe07b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30dad81d708c35136e2da4e96cfe07b7">ADC_JSQR_JSQ4_1</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga30dad81d708c35136e2da4e96cfe07b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ceab97acb95b31cb7448c9da38fc11a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ceab97acb95b31cb7448c9da38fc11a">ADC_JSQR_JSQ4_2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga6ceab97acb95b31cb7448c9da38fc11a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52f6571e7efed6a0f72df19c66d3c917"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52f6571e7efed6a0f72df19c66d3c917">ADC_JSQR_JSQ4_3</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga52f6571e7efed6a0f72df19c66d3c917"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaede3a17ef541039943d9dcd85df223ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaede3a17ef541039943d9dcd85df223ca">ADC_JSQR_JSQ4_4</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="memitem:gaa624d1fe34014b88873e2dfa91f79232"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa624d1fe34014b88873e2dfa91f79232">ADC_JSQR_JL</a>   ((uint32_t)0x00300000)</td></tr>
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<tr class="separator:gaa624d1fe34014b88873e2dfa91f79232"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga117a6719241f20dbd765bc34f9ffcd58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga117a6719241f20dbd765bc34f9ffcd58">ADC_JSQR_JL_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="memitem:ga1f82ef3b6e6350b9e52e622daeaa3e6e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f82ef3b6e6350b9e52e622daeaa3e6e">ADC_JSQR_JL_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga1f82ef3b6e6350b9e52e622daeaa3e6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad02fcd8fd97b2f7d70a5a04fed60b558"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad02fcd8fd97b2f7d70a5a04fed60b558">ADC_JDR1_JDATA</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gad02fcd8fd97b2f7d70a5a04fed60b558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fbd8801b9c60269ca477062985a08e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fbd8801b9c60269ca477062985a08e8">ADC_JDR2_JDATA</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga9fbd8801b9c60269ca477062985a08e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae84e9e5928bb9ed1aef6c83089fb5ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae84e9e5928bb9ed1aef6c83089fb5ef">ADC_JDR3_JDATA</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gaae84e9e5928bb9ed1aef6c83089fb5ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga48d8fafdad1fb1bb0f761fd833e7b0c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga48d8fafdad1fb1bb0f761fd833e7b0c1">ADC_JDR4_JDATA</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga48d8fafdad1fb1bb0f761fd833e7b0c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada596183c4087696c486546e88176038"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada596183c4087696c486546e88176038">ADC_DR_DATA</a>   ((uint32_t)0x0000FFFF)</td></tr>
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<tr class="separator:gada596183c4087696c486546e88176038"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga67c396288ac97bfab2d37017bd536b98"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga67c396288ac97bfab2d37017bd536b98">ADC_DR_ADC2DATA</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:ga67c396288ac97bfab2d37017bd536b98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e640f7443f14d01a37e29cff004223f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e640f7443f14d01a37e29cff004223f">ADC_CSR_AWD1</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga3e640f7443f14d01a37e29cff004223f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga715bcb019d713187aacd46f4482fa5f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga715bcb019d713187aacd46f4482fa5f9">ADC_CSR_EOC1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga715bcb019d713187aacd46f4482fa5f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a8a134d8b946f3549390294ef94b8d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a8a134d8b946f3549390294ef94b8d6">ADC_CSR_JEOC1</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga1a8a134d8b946f3549390294ef94b8d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f1e6578b14d71c6d972c6d6f6d48eaa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f1e6578b14d71c6d972c6d6f6d48eaa">ADC_CSR_JSTRT1</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga3f1e6578b14d71c6d972c6d6f6d48eaa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78ff468cfaa299ef62ab7b8b9910e142"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78ff468cfaa299ef62ab7b8b9910e142">ADC_CSR_STRT1</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga78ff468cfaa299ef62ab7b8b9910e142"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga321ed2ccdf98d3a3307947056a8c401a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga321ed2ccdf98d3a3307947056a8c401a">ADC_CSR_DOVR1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga321ed2ccdf98d3a3307947056a8c401a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80d8090a99ec65807ed831fea0d5524c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80d8090a99ec65807ed831fea0d5524c">ADC_CSR_AWD2</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga80d8090a99ec65807ed831fea0d5524c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga411d79254769bbb4eeb14964abad497a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga411d79254769bbb4eeb14964abad497a">ADC_CSR_EOC2</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga411d79254769bbb4eeb14964abad497a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf24dbb77fadc6f928b8e38199a08abc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf24dbb77fadc6f928b8e38199a08abc7">ADC_CSR_JEOC2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf24dbb77fadc6f928b8e38199a08abc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ca65d6d580299518fb7491e1cebac1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca65d6d580299518fb7491e1cebac1d">ADC_CSR_JSTRT2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga0ca65d6d580299518fb7491e1cebac1d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac9e79005049b17d08c28aeca86677655"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9e79005049b17d08c28aeca86677655">ADC_CSR_STRT2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gac9e79005049b17d08c28aeca86677655"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00e2a30df5568b5663e9f016743b3a35"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00e2a30df5568b5663e9f016743b3a35">ADC_CSR_DOVR2</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga00e2a30df5568b5663e9f016743b3a35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8883de33c5a7b30c611db11340fec6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8883de33c5a7b30c611db11340fec6d">ADC_CSR_AWD3</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gad8883de33c5a7b30c611db11340fec6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a94c410343ba459146b2bb17833a795"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a94c410343ba459146b2bb17833a795">ADC_CSR_EOC3</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga4a94c410343ba459146b2bb17833a795"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7d3c36f449ef1ee9ee20c5686b4e974"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7d3c36f449ef1ee9ee20c5686b4e974">ADC_CSR_JEOC3</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gae7d3c36f449ef1ee9ee20c5686b4e974"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga94140d21b4c83d9f401cc459a7ec6060"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga94140d21b4c83d9f401cc459a7ec6060">ADC_CSR_JSTRT3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga94140d21b4c83d9f401cc459a7ec6060"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13ca665cc575b64588475723f5289d4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13ca665cc575b64588475723f5289d4a">ADC_CSR_STRT3</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga13ca665cc575b64588475723f5289d4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga396513974cf26f2a4aa0f36e755e227c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga396513974cf26f2a4aa0f36e755e227c">ADC_CSR_DOVR3</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga396513974cf26f2a4aa0f36e755e227c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf70ab04667c7c7da0f29c0e5a6c48e68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf70ab04667c7c7da0f29c0e5a6c48e68">ADC_CCR_MULTI</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:gaf70ab04667c7c7da0f29c0e5a6c48e68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae4e7104ce01e3a79b8f6138d87dc3684"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae4e7104ce01e3a79b8f6138d87dc3684">ADC_CCR_MULTI_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gae4e7104ce01e3a79b8f6138d87dc3684"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8781dec7f076b475b85f8470aee94d06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8781dec7f076b475b85f8470aee94d06">ADC_CCR_MULTI_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga8781dec7f076b475b85f8470aee94d06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae6a5be6cff1227431b8d54dffcc1ce88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae6a5be6cff1227431b8d54dffcc1ce88">ADC_CCR_MULTI_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae6a5be6cff1227431b8d54dffcc1ce88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae55be7b911b4c0272543f98a0dba5f20"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae55be7b911b4c0272543f98a0dba5f20">ADC_CCR_MULTI_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gae55be7b911b4c0272543f98a0dba5f20"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5087b3cb0d4570b80b3138c277bcbf6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5087b3cb0d4570b80b3138c277bcbf6c">ADC_CCR_MULTI_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga5087b3cb0d4570b80b3138c277bcbf6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c13aa04949ed520cf92613d3a619198"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c13aa04949ed520cf92613d3a619198">ADC_CCR_DELAY</a>   ((uint32_t)0x00000F00)</td></tr>
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<tr class="separator:ga9c13aa04949ed520cf92613d3a619198"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22b71e9df8b1fca93802ad602341eb0b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22b71e9df8b1fca93802ad602341eb0b">ADC_CCR_DELAY_0</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga22b71e9df8b1fca93802ad602341eb0b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d0d5785cb6c75e700517e88af188573"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d0d5785cb6c75e700517e88af188573">ADC_CCR_DELAY_1</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga6d0d5785cb6c75e700517e88af188573"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17f85cbda5dcf9a392a29befb73c6ceb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17f85cbda5dcf9a392a29befb73c6ceb">ADC_CCR_DELAY_2</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga17f85cbda5dcf9a392a29befb73c6ceb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0216de7d6fcfa507c9aa1400972d862"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0216de7d6fcfa507c9aa1400972d862">ADC_CCR_DELAY_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gae0216de7d6fcfa507c9aa1400972d862"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7e745513bbc2e5e5a76ae999d5d535af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e745513bbc2e5e5a76ae999d5d535af">ADC_CCR_DDS</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga7e745513bbc2e5e5a76ae999d5d535af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e346b21afcaeced784e6c80b3aa1fb4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e346b21afcaeced784e6c80b3aa1fb4">ADC_CCR_DMA</a>   ((uint32_t)0x0000C000)</td></tr>
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||
<tr class="separator:ga9e346b21afcaeced784e6c80b3aa1fb4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a42ee6ec5115244aef8f60d35abcc47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a42ee6ec5115244aef8f60d35abcc47">ADC_CCR_DMA_0</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga3a42ee6ec5115244aef8f60d35abcc47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacdc9d29cafdd54e5c0dd752c358e1bc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacdc9d29cafdd54e5c0dd752c358e1bc8">ADC_CCR_DMA_1</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gacdc9d29cafdd54e5c0dd752c358e1bc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a2ee019aef4c64fffc72141f7aaab2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a2ee019aef4c64fffc72141f7aaab2c">ADC_CCR_ADCPRE</a>   ((uint32_t)0x00030000)</td></tr>
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<tr class="separator:ga3a2ee019aef4c64fffc72141f7aaab2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3108cc8fb81f6efd1e93fa5f82ac313"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3108cc8fb81f6efd1e93fa5f82ac313">ADC_CCR_ADCPRE_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaf3108cc8fb81f6efd1e93fa5f82ac313"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa090830d2d359db04f365d46c6644d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa090830d2d359db04f365d46c6644d5">ADC_CCR_ADCPRE_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gafa090830d2d359db04f365d46c6644d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga519645e42dcf6b19af9c05dc40300abb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga519645e42dcf6b19af9c05dc40300abb">ADC_CCR_VBATE</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga519645e42dcf6b19af9c05dc40300abb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc020d85a8740491ce3f218a0706f1dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc020d85a8740491ce3f218a0706f1dc">ADC_CCR_TSVREFE</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gafc020d85a8740491ce3f218a0706f1dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d7a0a18c77816c45c5682c3884e3d56"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d7a0a18c77816c45c5682c3884e3d56">ADC_CDR_DATA1</a>   ((uint32_t)0x0000FFFF)</td></tr>
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<tr class="separator:ga6d7a0a18c77816c45c5682c3884e3d56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga55f0776b9bf2612c194c1ab478d8a371"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga55f0776b9bf2612c194c1ab478d8a371">ADC_CDR_DATA2</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:ga55f0776b9bf2612c194c1ab478d8a371"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0cf12be5661908dbe38aa14cd4c3a356"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0cf12be5661908dbe38aa14cd4c3a356">CAN_MCR_INRQ</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga0cf12be5661908dbe38aa14cd4c3a356"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf9602dfb2f95b481b6e642b95991176"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf9602dfb2f95b481b6e642b95991176">CAN_MCR_SLEEP</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gadf9602dfb2f95b481b6e642b95991176"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35e7e66f9cd8cb6efa6a80367d2294a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga35e7e66f9cd8cb6efa6a80367d2294a9">CAN_MCR_TXFP</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga35e7e66f9cd8cb6efa6a80367d2294a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga501125ff257a7d02c35a0d6dcbaa2ba8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga501125ff257a7d02c35a0d6dcbaa2ba8">CAN_MCR_RFLM</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga501125ff257a7d02c35a0d6dcbaa2ba8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2774f04e286942d36a5b6135c8028049"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2774f04e286942d36a5b6135c8028049">CAN_MCR_NART</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga2774f04e286942d36a5b6135c8028049"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa2745f1a565c3f2ec5b16612d1fd66e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa2745f1a565c3f2ec5b16612d1fd66e0">CAN_MCR_AWUM</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gaa2745f1a565c3f2ec5b16612d1fd66e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7aff5c0a3ead7f937849ab66eba7490"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7aff5c0a3ead7f937849ab66eba7490">CAN_MCR_ABOM</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gad7aff5c0a3ead7f937849ab66eba7490"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga32b2eda9cad8a969c5d2349bd1d853bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga32b2eda9cad8a969c5d2349bd1d853bb">CAN_MCR_TTCM</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga32b2eda9cad8a969c5d2349bd1d853bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga410fdbad37a9dbda508b8c437277e79f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga410fdbad37a9dbda508b8c437277e79f">CAN_MCR_RESET</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga410fdbad37a9dbda508b8c437277e79f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2871cee90ebecb760bab16e9c039b682"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2871cee90ebecb760bab16e9c039b682">CAN_MSR_INAK</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga2871cee90ebecb760bab16e9c039b682"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1611badb362f0fd9047af965509f074"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1611badb362f0fd9047af965509f074">CAN_MSR_SLAK</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaf1611badb362f0fd9047af965509f074"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c424768e9e963402f37cb95ae87a1ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c424768e9e963402f37cb95ae87a1ae">CAN_MSR_ERRI</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga9c424768e9e963402f37cb95ae87a1ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f4c753b96d21c5001b39ad5b08519fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f4c753b96d21c5001b39ad5b08519fc">CAN_MSR_WKUI</a>   ((uint16_t)0x0008)</td></tr>
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||
<tr class="separator:ga0f4c753b96d21c5001b39ad5b08519fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47ab62ae123c791de27ad05dde5bee91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47ab62ae123c791de27ad05dde5bee91">CAN_MSR_SLAKI</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga47ab62ae123c791de27ad05dde5bee91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga651580d35b658e90ea831cb13b8a8988"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga651580d35b658e90ea831cb13b8a8988">CAN_MSR_TXM</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga651580d35b658e90ea831cb13b8a8988"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga67f8e1140b0304930d5b4f2a041a7884"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga67f8e1140b0304930d5b4f2a041a7884">CAN_MSR_RXM</a>   ((uint16_t)0x0200)</td></tr>
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||
<tr class="separator:ga67f8e1140b0304930d5b4f2a041a7884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf68038824bb78c4a5c4dee1730848f69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf68038824bb78c4a5c4dee1730848f69">CAN_MSR_SAMP</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:gaf68038824bb78c4a5c4dee1730848f69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6564a1d2f23f246053188a454264eb4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6564a1d2f23f246053188a454264eb4b">CAN_MSR_RX</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga6564a1d2f23f246053188a454264eb4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a4809b8908618df57e6393cc7fe0f52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a4809b8908618df57e6393cc7fe0f52">CAN_TSR_RQCP0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga4a4809b8908618df57e6393cc7fe0f52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacedb237b31d29aef7f38475e9a6b297"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacedb237b31d29aef7f38475e9a6b297">CAN_TSR_TXOK0</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaacedb237b31d29aef7f38475e9a6b297"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b94ea5001d70a26ec32d9dc6ff76e47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b94ea5001d70a26ec32d9dc6ff76e47">CAN_TSR_ALST0</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga9b94ea5001d70a26ec32d9dc6ff76e47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga805d2dab5b1d4618492b1cf2a3f5e1e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga805d2dab5b1d4618492b1cf2a3f5e1e0">CAN_TSR_TERR0</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga805d2dab5b1d4618492b1cf2a3f5e1e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdac6b87a303b0d0ec9b0d94a54ae31f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdac6b87a303b0d0ec9b0d94a54ae31f">CAN_TSR_ABRQ0</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gafdac6b87a303b0d0ec9b0d94a54ae31f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd3118dec59c3a45d2f262b090699538"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd3118dec59c3a45d2f262b090699538">CAN_TSR_RQCP1</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gabd3118dec59c3a45d2f262b090699538"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea918e510c5471b1ac797350b7950151"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea918e510c5471b1ac797350b7950151">CAN_TSR_TXOK1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaea918e510c5471b1ac797350b7950151"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a34d996177f23148c9b4cd6b0a80529"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a34d996177f23148c9b4cd6b0a80529">CAN_TSR_ALST1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga7a34d996177f23148c9b4cd6b0a80529"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b01eca562bdb60e5416840fca47fff6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b01eca562bdb60e5416840fca47fff6">CAN_TSR_TERR1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga9b01eca562bdb60e5416840fca47fff6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c44a4e585b3ab1c37a6c2c28c90d6cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c44a4e585b3ab1c37a6c2c28c90d6cd">CAN_TSR_ABRQ1</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga4c44a4e585b3ab1c37a6c2c28c90d6cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3cf9e83cec96164f1dadf4e43411ebf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3cf9e83cec96164f1dadf4e43411ebf0">CAN_TSR_RQCP2</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga3cf9e83cec96164f1dadf4e43411ebf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga782c591bb204d751b470dd53a37d240e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga782c591bb204d751b470dd53a37d240e">CAN_TSR_TXOK2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga782c591bb204d751b470dd53a37d240e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75db1172038ebd72db1ed2fedc6108ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75db1172038ebd72db1ed2fedc6108ff">CAN_TSR_ALST2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga75db1172038ebd72db1ed2fedc6108ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26a85626eb26bf99413ba80c676d0af8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26a85626eb26bf99413ba80c676d0af8">CAN_TSR_TERR2</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga26a85626eb26bf99413ba80c676d0af8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a3b7e4be7cebb35ad66cb85b82901bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a3b7e4be7cebb35ad66cb85b82901bb">CAN_TSR_ABRQ2</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga2a3b7e4be7cebb35ad66cb85b82901bb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac00145ea43822f362f3d473bba62fa13"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac00145ea43822f362f3d473bba62fa13">CAN_TSR_CODE</a>   ((uint32_t)0x03000000)</td></tr>
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||
<tr class="separator:gac00145ea43822f362f3d473bba62fa13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga61ab11e97b42c5210109516e30af9b05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga61ab11e97b42c5210109516e30af9b05">CAN_TSR_TME</a>   ((uint32_t)0x1C000000)</td></tr>
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||
<tr class="separator:ga61ab11e97b42c5210109516e30af9b05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7500e491fe82e67ed5d40759e8a50f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7500e491fe82e67ed5d40759e8a50f0">CAN_TSR_TME0</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:gad7500e491fe82e67ed5d40759e8a50f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ba2b51def4b1683fd050e43045306ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ba2b51def4b1683fd050e43045306ea">CAN_TSR_TME1</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga5ba2b51def4b1683fd050e43045306ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6523fac51d3aed2e36de4c2f07c2a21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6523fac51d3aed2e36de4c2f07c2a21">CAN_TSR_TME2</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gaf6523fac51d3aed2e36de4c2f07c2a21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga96c6453caa447cc4a9961d6ee5dea74e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96c6453caa447cc4a9961d6ee5dea74e">CAN_TSR_LOW</a>   ((uint32_t)0xE0000000)</td></tr>
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<tr class="separator:ga96c6453caa447cc4a9961d6ee5dea74e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79ff582efea1d7be2d1de7a1fd1a2b65"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79ff582efea1d7be2d1de7a1fd1a2b65">CAN_TSR_LOW0</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga79ff582efea1d7be2d1de7a1fd1a2b65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1e550c2e6a5f8425322f9943fd7c7ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1e550c2e6a5f8425322f9943fd7c7ed">CAN_TSR_LOW1</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gac1e550c2e6a5f8425322f9943fd7c7ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd1db2c2ce76b732fdb71df65fb8124f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd1db2c2ce76b732fdb71df65fb8124f">CAN_TSR_LOW2</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:gadd1db2c2ce76b732fdb71df65fb8124f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e23f3d7947e58531524d77b5c4741cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e23f3d7947e58531524d77b5c4741cc">CAN_RF0R_FMP0</a>   ((uint8_t)0x03)</td></tr>
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<tr class="separator:ga9e23f3d7947e58531524d77b5c4741cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae934674f6e22a758e430f32cfc386d70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae934674f6e22a758e430f32cfc386d70">CAN_RF0R_FULL0</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:gae934674f6e22a758e430f32cfc386d70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a3d15b3abab8199c16e26a3dffdc8b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a3d15b3abab8199c16e26a3dffdc8b8">CAN_RF0R_FOVR0</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:ga2a3d15b3abab8199c16e26a3dffdc8b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74d2db4b9b7d52712e47557dcc61964d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74d2db4b9b7d52712e47557dcc61964d">CAN_RF0R_RFOM0</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:ga74d2db4b9b7d52712e47557dcc61964d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f9254d05043df6f21bf96234a03f72f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f9254d05043df6f21bf96234a03f72f">CAN_RF1R_FMP1</a>   ((uint8_t)0x03)</td></tr>
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<tr class="separator:ga8f9254d05043df6f21bf96234a03f72f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabdaa12fe4d14254cc4a6a4de749a7d0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabdaa12fe4d14254cc4a6a4de749a7d0a">CAN_RF1R_FULL1</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:gabdaa12fe4d14254cc4a6a4de749a7d0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5eeaabd4db3825bc53d860aca8d7590"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5eeaabd4db3825bc53d860aca8d7590">CAN_RF1R_FOVR1</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:gab5eeaabd4db3825bc53d860aca8d7590"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6930f860de4a90e3344e63fbc209b9ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6930f860de4a90e3344e63fbc209b9ab">CAN_RF1R_RFOM1</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:ga6930f860de4a90e3344e63fbc209b9ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe027af7acd051f5a52db78608a36e26"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe027af7acd051f5a52db78608a36e26">CAN_IER_TMEIE</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gafe027af7acd051f5a52db78608a36e26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59eecd1bb7d1d0e17422a26ae89cf39d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59eecd1bb7d1d0e17422a26ae89cf39d">CAN_IER_FMPIE0</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga59eecd1bb7d1d0e17422a26ae89cf39d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf926ae29d98a8b72ef48f001fda07fc3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf926ae29d98a8b72ef48f001fda07fc3">CAN_IER_FFIE0</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:gaf926ae29d98a8b72ef48f001fda07fc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0c423699fdcd2ddddb3046a368505679"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0c423699fdcd2ddddb3046a368505679">CAN_IER_FOVIE0</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga0c423699fdcd2ddddb3046a368505679"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b8492d1b8ce13fead7869a0e4ef39ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b8492d1b8ce13fead7869a0e4ef39ed">CAN_IER_FMPIE1</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga4b8492d1b8ce13fead7869a0e4ef39ed"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf5a7e9d13e8d96bef2ac1972520b1c4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5a7e9d13e8d96bef2ac1972520b1c4f">CAN_IER_FFIE1</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gaf5a7e9d13e8d96bef2ac1972520b1c4f"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga3734d9bf5cd08ff219b2d8c2f8300dbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3734d9bf5cd08ff219b2d8c2f8300dbf">CAN_IER_FOVIE1</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga3734d9bf5cd08ff219b2d8c2f8300dbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa80103eca53d74a2b047f761336918e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa80103eca53d74a2b047f761336918e3">CAN_IER_EWGIE</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:gaa80103eca53d74a2b047f761336918e3"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9e3307992cabee858287305a64e5031b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e3307992cabee858287305a64e5031b">CAN_IER_EPVIE</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga9e3307992cabee858287305a64e5031b"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga7d953fd5b625af04f95f5414259769ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d953fd5b625af04f95f5414259769ef">CAN_IER_BOFIE</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga7d953fd5b625af04f95f5414259769ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81514ecf1b6596e9930906779c4bdf39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81514ecf1b6596e9930906779c4bdf39">CAN_IER_LECIE</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga81514ecf1b6596e9930906779c4bdf39"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga962968c3ee1f70c714a5b12442369d9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga962968c3ee1f70c714a5b12442369d9a">CAN_IER_ERRIE</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga962968c3ee1f70c714a5b12442369d9a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga37f3438e80288c1791de27042df9838e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37f3438e80288c1791de27042df9838e">CAN_IER_WKUIE</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga37f3438e80288c1791de27042df9838e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga82389b79f21410f5d5f6bef38d192812"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga82389b79f21410f5d5f6bef38d192812">CAN_IER_SLKIE</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga82389b79f21410f5d5f6bef38d192812"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2c0c02829fb41ac2a1b1852c19931de8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c0c02829fb41ac2a1b1852c19931de8">CAN_ESR_EWGF</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga2c0c02829fb41ac2a1b1852c19931de8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga633c961d528cbf8093b0e05e92225ff0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga633c961d528cbf8093b0e05e92225ff0">CAN_ESR_EPVF</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga633c961d528cbf8093b0e05e92225ff0"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga619d49f67f1835a7efc457205fea1225"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga619d49f67f1835a7efc457205fea1225">CAN_ESR_BOFF</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga619d49f67f1835a7efc457205fea1225"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9f86741dd89034900e300499ae2272e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9f86741dd89034900e300499ae2272e">CAN_ESR_LEC</a>   ((uint32_t)0x00000070)</td></tr>
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||
<tr class="separator:gab9f86741dd89034900e300499ae2272e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga054ebb41578d890d4d9dffb4828f02e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga054ebb41578d890d4d9dffb4828f02e7">CAN_ESR_LEC_0</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga054ebb41578d890d4d9dffb4828f02e7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae570e9ba39dbe11808db929392250cf4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae570e9ba39dbe11808db929392250cf4">CAN_ESR_LEC_1</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gae570e9ba39dbe11808db929392250cf4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4998e7bfd002999413c68107911c6e8c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4998e7bfd002999413c68107911c6e8c">CAN_ESR_LEC_2</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga4998e7bfd002999413c68107911c6e8c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae3de2080f48cc851c20d920acfd1737d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae3de2080f48cc851c20d920acfd1737d">CAN_ESR_TEC</a>   ((uint32_t)0x00FF0000)</td></tr>
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||
<tr class="separator:gae3de2080f48cc851c20d920acfd1737d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0df5b2ea3f419182e9bd885f55ee5dc9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0df5b2ea3f419182e9bd885f55ee5dc9">CAN_ESR_REC</a>   ((uint32_t)0xFF000000)</td></tr>
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||
<tr class="separator:ga0df5b2ea3f419182e9bd885f55ee5dc9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96a5522b4c06551856f7185bdd448b02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96a5522b4c06551856f7185bdd448b02">CAN_BTR_BRP</a>   ((uint32_t)0x000003FF)</td></tr>
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||
<tr class="separator:ga96a5522b4c06551856f7185bdd448b02"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4d7ae8f06f8fbbf5dcfbbbb887057be9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d7ae8f06f8fbbf5dcfbbbb887057be9">CAN_BTR_TS1</a>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:ga4d7ae8f06f8fbbf5dcfbbbb887057be9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac006aa2ab26c50227ccaa18e0a79bff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac006aa2ab26c50227ccaa18e0a79bff3">CAN_BTR_TS2</a>   ((uint32_t)0x00700000)</td></tr>
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||
<tr class="separator:gac006aa2ab26c50227ccaa18e0a79bff3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04c8b91ddacdcbb779bae42398c94cf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga04c8b91ddacdcbb779bae42398c94cf2">CAN_BTR_SJW</a>   ((uint32_t)0x03000000)</td></tr>
|
||
<tr class="separator:ga04c8b91ddacdcbb779bae42398c94cf2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac6c0a81d8dcde61a1f2772232f5343b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac6c0a81d8dcde61a1f2772232f5343b8">CAN_BTR_LBKM</a>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:gac6c0a81d8dcde61a1f2772232f5343b8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa36bc23e833190cbee9b8cf5cf49159d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa36bc23e833190cbee9b8cf5cf49159d">CAN_BTR_SILM</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="memitem:ga7b79cbb7ebb7f3419aa6ac04bd76899a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b79cbb7ebb7f3419aa6ac04bd76899a">CAN_TI0R_TXRQ</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga7b79cbb7ebb7f3419aa6ac04bd76899a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5556f2ceb5b71b8afa76a18a31cbb6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5556f2ceb5b71b8afa76a18a31cbb6a">CAN_TI0R_RTR</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gad5556f2ceb5b71b8afa76a18a31cbb6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga06f761a877f8ad39f878284f69119c0b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga06f761a877f8ad39f878284f69119c0b">CAN_TI0R_IDE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga06f761a877f8ad39f878284f69119c0b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga894df6ad0d2976fe643dcb77052672f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga894df6ad0d2976fe643dcb77052672f5">CAN_TI0R_EXID</a>   ((uint32_t)0x001FFFF8)</td></tr>
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<tr class="separator:ga894df6ad0d2976fe643dcb77052672f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d3b5882e1f9f76f5cfebffb5bc2f717"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d3b5882e1f9f76f5cfebffb5bc2f717">CAN_TI0R_STID</a>   ((uint32_t)0xFFE00000)</td></tr>
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<tr class="separator:ga4d3b5882e1f9f76f5cfebffb5bc2f717"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf812eaee11f12863773b3f8e95ae6e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf812eaee11f12863773b3f8e95ae6e2">CAN_TDT0R_DLC</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gacf812eaee11f12863773b3f8e95ae6e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad2d329960b527a62fab099a084bfa906"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad2d329960b527a62fab099a084bfa906">CAN_TDT0R_TGT</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gad2d329960b527a62fab099a084bfa906"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga104ba91151bf88edd44593b1690b879a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga104ba91151bf88edd44593b1690b879a">CAN_TDT0R_TIME</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:ga104ba91151bf88edd44593b1690b879a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadec3350607b41410ddb6e00a71a4384e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadec3350607b41410ddb6e00a71a4384e">CAN_TDL0R_DATA0</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gadec3350607b41410ddb6e00a71a4384e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1cd20d218027e7432178c67414475830"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1cd20d218027e7432178c67414475830">CAN_TDL0R_DATA1</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga1cd20d218027e7432178c67414475830"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa04384f0a7c5026c91a33a005c755d68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa04384f0a7c5026c91a33a005c755d68">CAN_TDL0R_DATA2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gaa04384f0a7c5026c91a33a005c755d68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga283a1bfa52851ea4ee45f45817985752"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga283a1bfa52851ea4ee45f45817985752">CAN_TDL0R_DATA3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga283a1bfa52851ea4ee45f45817985752"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0114ae75b33f978ca7825f7bcd836982"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0114ae75b33f978ca7825f7bcd836982">CAN_TDH0R_DATA4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga0114ae75b33f978ca7825f7bcd836982"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5b6a0742ac1bcd5ef0408cb0f92ef75"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5b6a0742ac1bcd5ef0408cb0f92ef75">CAN_TDH0R_DATA5</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gaf5b6a0742ac1bcd5ef0408cb0f92ef75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8ea7090da55c7cc9993235efa1c4a02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8ea7090da55c7cc9993235efa1c4a02">CAN_TDH0R_DATA6</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gac8ea7090da55c7cc9993235efa1c4a02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6021a4045fbfd71817bf9aec6cbc731c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6021a4045fbfd71817bf9aec6cbc731c">CAN_TDH0R_DATA7</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga6021a4045fbfd71817bf9aec6cbc731c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0adf4a08415673753fafedf463f93bee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0adf4a08415673753fafedf463f93bee">CAN_TI1R_TXRQ</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga0adf4a08415673753fafedf463f93bee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga476cde56b1a2a13cde8477d5178ba34b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga476cde56b1a2a13cde8477d5178ba34b">CAN_TI1R_RTR</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga476cde56b1a2a13cde8477d5178ba34b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f338f3e295b7b512ed865b3f9a8d6de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f338f3e295b7b512ed865b3f9a8d6de">CAN_TI1R_IDE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga8f338f3e295b7b512ed865b3f9a8d6de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c660943fa3c70c4974c2dacd3e4ca2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c660943fa3c70c4974c2dacd3e4ca2e">CAN_TI1R_EXID</a>   ((uint32_t)0x001FFFF8)</td></tr>
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<tr class="separator:ga6c660943fa3c70c4974c2dacd3e4ca2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga842071768c2f8f5eae11a764a77dd0dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga842071768c2f8f5eae11a764a77dd0dd">CAN_TI1R_STID</a>   ((uint32_t)0xFFE00000)</td></tr>
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<tr class="separator:ga842071768c2f8f5eae11a764a77dd0dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68ef8b6cb43a80d29c5fc318a67acd3b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68ef8b6cb43a80d29c5fc318a67acd3b">CAN_TDT1R_DLC</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga68ef8b6cb43a80d29c5fc318a67acd3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35757787e6481553885fdf4fd2738c4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga35757787e6481553885fdf4fd2738c4b">CAN_TDT1R_TGT</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga35757787e6481553885fdf4fd2738c4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad28ac334a59a6679c362611d65666910"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad28ac334a59a6679c362611d65666910">CAN_TDT1R_TIME</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gad28ac334a59a6679c362611d65666910"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga21abc05257bcdfa47fc824b4d806a105"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga21abc05257bcdfa47fc824b4d806a105">CAN_TDL1R_DATA0</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga21abc05257bcdfa47fc824b4d806a105"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bf459dee1be706b38141722be67e4ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bf459dee1be706b38141722be67e4ab">CAN_TDL1R_DATA1</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga0bf459dee1be706b38141722be67e4ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeb92a65c225432fab0daa30808d5065c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeb92a65c225432fab0daa30808d5065c">CAN_TDL1R_DATA2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gaeb92a65c225432fab0daa30808d5065c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga482506faa59360c6a48aa9bc55a024c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga482506faa59360c6a48aa9bc55a024c4">CAN_TDL1R_DATA3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga482506faa59360c6a48aa9bc55a024c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41c3f19eea0d63211f643833da984c90"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41c3f19eea0d63211f643833da984c90">CAN_TDH1R_DATA4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga41c3f19eea0d63211f643833da984c90"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35cbe73d2ce87b6aaf19510818610d16"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga35cbe73d2ce87b6aaf19510818610d16">CAN_TDH1R_DATA5</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga35cbe73d2ce87b6aaf19510818610d16"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1b731ca095cbad8e56ba4147c14d7128"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b731ca095cbad8e56ba4147c14d7128">CAN_TDH1R_DATA6</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga1b731ca095cbad8e56ba4147c14d7128"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec56ce4aba46e836d44e2c034a9ed817"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec56ce4aba46e836d44e2c034a9ed817">CAN_TDH1R_DATA7</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:gaec56ce4aba46e836d44e2c034a9ed817"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4edd8438a684e353c497f80cb37365f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab4edd8438a684e353c497f80cb37365f">CAN_TI2R_TXRQ</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gab4edd8438a684e353c497f80cb37365f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga980cfab3daebb05da35b6166a051385d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga980cfab3daebb05da35b6166a051385d">CAN_TI2R_RTR</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga980cfab3daebb05da35b6166a051385d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1d888a2225c77452f73bf66fb0e1b78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1d888a2225c77452f73bf66fb0e1b78">CAN_TI2R_IDE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gac1d888a2225c77452f73bf66fb0e1b78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae62678bd1dc39aae5a153e9c9b3c3f3b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae62678bd1dc39aae5a153e9c9b3c3f3b">CAN_TI2R_EXID</a>   ((uint32_t)0x001FFFF8)</td></tr>
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<tr class="separator:gae62678bd1dc39aae5a153e9c9b3c3f3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41c8bd734dd29caa40d34ced3981443a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41c8bd734dd29caa40d34ced3981443a">CAN_TI2R_STID</a>   ((uint32_t)0xFFE00000)</td></tr>
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<tr class="separator:ga41c8bd734dd29caa40d34ced3981443a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52898eb9fa3bcf0b8086220971af49f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52898eb9fa3bcf0b8086220971af49f5">CAN_TDT2R_DLC</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga52898eb9fa3bcf0b8086220971af49f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c51b43d309b56e8a64724ef1517033e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c51b43d309b56e8a64724ef1517033e">CAN_TDT2R_TGT</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga4c51b43d309b56e8a64724ef1517033e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga508aea584f7c81700b485916a13431fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga508aea584f7c81700b485916a13431fa">CAN_TDT2R_TIME</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:ga508aea584f7c81700b485916a13431fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a9852d0f6058c19f0e678228ea14a21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a9852d0f6058c19f0e678228ea14a21">CAN_TDL2R_DATA0</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga7a9852d0f6058c19f0e678228ea14a21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5be1bcda68f562be669184b30727be1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5be1bcda68f562be669184b30727be1">CAN_TDL2R_DATA1</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gad5be1bcda68f562be669184b30727be1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga62cd5e7f3e98fe5b247998d39ebdd6fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62cd5e7f3e98fe5b247998d39ebdd6fb">CAN_TDL2R_DATA2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga62cd5e7f3e98fe5b247998d39ebdd6fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3d76ed3982f13fb34a54d62f0caa3fa2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3d76ed3982f13fb34a54d62f0caa3fa2">CAN_TDL2R_DATA3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga3d76ed3982f13fb34a54d62f0caa3fa2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23a93a13da2f302ecd2f0c462065428d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23a93a13da2f302ecd2f0c462065428d">CAN_TDH2R_DATA4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga23a93a13da2f302ecd2f0c462065428d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9f372328c8d1e4fe2503d45aed50fb6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9f372328c8d1e4fe2503d45aed50fb6">CAN_TDH2R_DATA5</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gab9f372328c8d1e4fe2503d45aed50fb6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae96248bcf102a3c6f39f72cdcf8e4fe5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae96248bcf102a3c6f39f72cdcf8e4fe5">CAN_TDH2R_DATA6</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gae96248bcf102a3c6f39f72cdcf8e4fe5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga895341b943e4b01938857b84a0b0dbda"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga895341b943e4b01938857b84a0b0dbda">CAN_TDH2R_DATA7</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga895341b943e4b01938857b84a0b0dbda"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41f4780b822a42834bf1927eb92b4fba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41f4780b822a42834bf1927eb92b4fba">CAN_RI0R_RTR</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga41f4780b822a42834bf1927eb92b4fba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga688074182caafff289c921548bc9afca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga688074182caafff289c921548bc9afca">CAN_RI0R_IDE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga688074182caafff289c921548bc9afca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d81487e8b340810e3193cd8f1386240"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d81487e8b340810e3193cd8f1386240">CAN_RI0R_EXID</a>   ((uint32_t)0x001FFFF8)</td></tr>
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<tr class="separator:ga4d81487e8b340810e3193cd8f1386240"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga101aa355c83b8c7d068f02b7dcc5b98f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga101aa355c83b8c7d068f02b7dcc5b98f">CAN_RI0R_STID</a>   ((uint32_t)0xFFE00000)</td></tr>
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<tr class="separator:ga101aa355c83b8c7d068f02b7dcc5b98f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17ca0af4afd89e6a1c43ffd1430359b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17ca0af4afd89e6a1c43ffd1430359b7">CAN_RDT0R_DLC</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga17ca0af4afd89e6a1c43ffd1430359b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5081739b6e21e033b95e68af9331a6d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5081739b6e21e033b95e68af9331a6d1">CAN_RDT0R_FMI</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga5081739b6e21e033b95e68af9331a6d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae20b7a72690033591eeda7a511ac4a2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae20b7a72690033591eeda7a511ac4a2e">CAN_RDT0R_TIME</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gae20b7a72690033591eeda7a511ac4a2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44313106efc3a5a65633168a2ad1928d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44313106efc3a5a65633168a2ad1928d">CAN_RDL0R_DATA0</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga44313106efc3a5a65633168a2ad1928d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga73d4025ce501af78db93761e8b8c3b9e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga73d4025ce501af78db93761e8b8c3b9e">CAN_RDL0R_DATA1</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga73d4025ce501af78db93761e8b8c3b9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52b3c31ad72881e11a4d3cae073a0df8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52b3c31ad72881e11a4d3cae073a0df8">CAN_RDL0R_DATA2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga52b3c31ad72881e11a4d3cae073a0df8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad637a53ae780998f95f2bb570d5cd05a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad637a53ae780998f95f2bb570d5cd05a">CAN_RDL0R_DATA3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:gad637a53ae780998f95f2bb570d5cd05a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4dc7309c31cda93d05bb1fe1c923646c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4dc7309c31cda93d05bb1fe1c923646c">CAN_RDH0R_DATA4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga4dc7309c31cda93d05bb1fe1c923646c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga577eba5ab3a66283f5c0837e91f1776a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga577eba5ab3a66283f5c0837e91f1776a">CAN_RDH0R_DATA5</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga577eba5ab3a66283f5c0837e91f1776a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27a0bd49dc24e59b776ad5a00aabb97b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27a0bd49dc24e59b776ad5a00aabb97b">CAN_RDH0R_DATA6</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga27a0bd49dc24e59b776ad5a00aabb97b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga243b8a3632812b2f8c7b447ed635ce5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga243b8a3632812b2f8c7b447ed635ce5f">CAN_RDH0R_DATA7</a>   ((uint32_t)0xFF000000)</td></tr>
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||
<tr class="separator:ga243b8a3632812b2f8c7b447ed635ce5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafbd0ecd9579a339bffb95ea3b7c9f1e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafbd0ecd9579a339bffb95ea3b7c9f1e8">CAN_RI1R_RTR</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gafbd0ecd9579a339bffb95ea3b7c9f1e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8dcedeb4250767a66a4d60c67e367cf8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8dcedeb4250767a66a4d60c67e367cf8">CAN_RI1R_IDE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga8dcedeb4250767a66a4d60c67e367cf8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2ca45b282f2582c91450d4e1204121cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ca45b282f2582c91450d4e1204121cf">CAN_RI1R_EXID</a>   ((uint32_t)0x001FFFF8)</td></tr>
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<tr class="separator:ga2ca45b282f2582c91450d4e1204121cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f3c3aab0f24533821188d14901b3980"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f3c3aab0f24533821188d14901b3980">CAN_RI1R_STID</a>   ((uint32_t)0xFFE00000)</td></tr>
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<tr class="separator:ga7f3c3aab0f24533821188d14901b3980"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga964b0fa7c70a24a74165c57b3486aae8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga964b0fa7c70a24a74165c57b3486aae8">CAN_RDT1R_DLC</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga964b0fa7c70a24a74165c57b3486aae8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7f72aec91130a20e3a855e78eabb48b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7f72aec91130a20e3a855e78eabb48b">CAN_RDT1R_FMI</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gaf7f72aec91130a20e3a855e78eabb48b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac112cba5a4cd0b541c1150263132c68a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac112cba5a4cd0b541c1150263132c68a">CAN_RDT1R_TIME</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gac112cba5a4cd0b541c1150263132c68a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e399fed282a5aac0b25b059fcf04020"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e399fed282a5aac0b25b059fcf04020">CAN_RDL1R_DATA0</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga1e399fed282a5aac0b25b059fcf04020"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27ec34e08f87e8836f32bbfed52e860a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27ec34e08f87e8836f32bbfed52e860a">CAN_RDL1R_DATA1</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga27ec34e08f87e8836f32bbfed52e860a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea34eded40932d364743969643a598c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea34eded40932d364743969643a598c4">CAN_RDL1R_DATA2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gaea34eded40932d364743969643a598c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80bfe3e724b28e8d2a5b7ac4393212cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80bfe3e724b28e8d2a5b7ac4393212cf">CAN_RDL1R_DATA3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga80bfe3e724b28e8d2a5b7ac4393212cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc2a55c1b5195cf043ef33e79d736255"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc2a55c1b5195cf043ef33e79d736255">CAN_RDH1R_DATA4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gafc2a55c1b5195cf043ef33e79d736255"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81d25a1ea5ad28e7db4a2adbb8a651ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81d25a1ea5ad28e7db4a2adbb8a651ad">CAN_RDH1R_DATA5</a>   ((uint32_t)0x0000FF00)</td></tr>
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||
<tr class="separator:ga81d25a1ea5ad28e7db4a2adbb8a651ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39212ea40388510bde1931f7b3a064ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39212ea40388510bde1931f7b3a064ae">CAN_RDH1R_DATA6</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga39212ea40388510bde1931f7b3a064ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdfbb90b5ef2ac1e7f23a5f15c0287eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdfbb90b5ef2ac1e7f23a5f15c0287eb">CAN_RDH1R_DATA7</a>   ((uint32_t)0xFF000000)</td></tr>
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||
<tr class="separator:gafdfbb90b5ef2ac1e7f23a5f15c0287eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5eb5b835ee11a78bd391b9d1049f2549"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5eb5b835ee11a78bd391b9d1049f2549">CAN_FMR_FINIT</a>   ((uint8_t)0x01)</td></tr>
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||
<tr class="separator:ga5eb5b835ee11a78bd391b9d1049f2549"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga481099e17a895e92cfbcfca617d52860"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga481099e17a895e92cfbcfca617d52860">CAN_FM1R_FBM</a>   ((uint16_t)0x3FFF)</td></tr>
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||
<tr class="separator:ga481099e17a895e92cfbcfca617d52860"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d95ff05ed6ef9a38e9af9c0d3db3687"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d95ff05ed6ef9a38e9af9c0d3db3687">CAN_FM1R_FBM0</a>   ((uint16_t)0x0001)</td></tr>
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||
<tr class="separator:ga2d95ff05ed6ef9a38e9af9c0d3db3687"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac2839d73344a7601aa22b5ed3fc0e5d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac2839d73344a7601aa22b5ed3fc0e5d1">CAN_FM1R_FBM1</a>   ((uint16_t)0x0002)</td></tr>
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||
<tr class="separator:gac2839d73344a7601aa22b5ed3fc0e5d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ba7963ac4eb5b936c444258c13f8940"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ba7963ac4eb5b936c444258c13f8940">CAN_FM1R_FBM2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga7ba7963ac4eb5b936c444258c13f8940"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d129b27c2af41ae39e606e802a53386"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d129b27c2af41ae39e606e802a53386">CAN_FM1R_FBM3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga2d129b27c2af41ae39e606e802a53386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0c94e5f4dcceea510fc72b86128aff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0c94e5f4dcceea510fc72b86128aff3">CAN_FM1R_FBM4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga2d7fb7c366544a1ef7a85481d3e6325d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d7fb7c366544a1ef7a85481d3e6325d">CAN_FM1R_FBM5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="memitem:ga3ff70e74447679a0d1cde1aa69ea2db1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ff70e74447679a0d1cde1aa69ea2db1">CAN_FM1R_FBM6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="memitem:ga657fc12fd334bc626b2eb53fb03457b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga657fc12fd334bc626b2eb53fb03457b0">CAN_FM1R_FBM7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga657fc12fd334bc626b2eb53fb03457b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab6bc390ed9a658014fd09fd1073e3037"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab6bc390ed9a658014fd09fd1073e3037">CAN_FM1R_FBM8</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="memitem:ga375758246b99234dda725b7c64daff32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga375758246b99234dda725b7c64daff32">CAN_FM1R_FBM9</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="memitem:ga0a98c6bde07c570463b6c0e32c0f6805"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a98c6bde07c570463b6c0e32c0f6805">CAN_FM1R_FBM10</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga0a98c6bde07c570463b6c0e32c0f6805"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab88796333c19954176ef77208cae4964"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab88796333c19954176ef77208cae4964">CAN_FM1R_FBM11</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gab88796333c19954176ef77208cae4964"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga858eaac0a8e23c03e13e5c1736bf9842"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga858eaac0a8e23c03e13e5c1736bf9842">CAN_FM1R_FBM12</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga858eaac0a8e23c03e13e5c1736bf9842"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf03b553802edd3ae23b70e97228b6dcc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf03b553802edd3ae23b70e97228b6dcc">CAN_FM1R_FBM13</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gaf03b553802edd3ae23b70e97228b6dcc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab41471f35878bcdff72d9cd05acf4714"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab41471f35878bcdff72d9cd05acf4714">CAN_FS1R_FSC</a>   ((uint16_t)0x3FFF)</td></tr>
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<tr class="separator:gab41471f35878bcdff72d9cd05acf4714"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab5ea9e0ed17df35894fff7828c89cad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab5ea9e0ed17df35894fff7828c89cad">CAN_FS1R_FSC0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gaab5ea9e0ed17df35894fff7828c89cad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83304e93d2e75c1cd8bfe7c2ec30c1c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83304e93d2e75c1cd8bfe7c2ec30c1c8">CAN_FS1R_FSC1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga83304e93d2e75c1cd8bfe7c2ec30c1c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ba1fa61fcf851188a6f16323dda1358"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ba1fa61fcf851188a6f16323dda1358">CAN_FS1R_FSC2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga0ba1fa61fcf851188a6f16323dda1358"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2175f52f4308c088458f9e54a1f1354"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2175f52f4308c088458f9e54a1f1354">CAN_FS1R_FSC3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gaf2175f52f4308c088458f9e54a1f1354"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga791ac090d6a8f2c79cd72f9072aef30f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga791ac090d6a8f2c79cd72f9072aef30f">CAN_FS1R_FSC4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga791ac090d6a8f2c79cd72f9072aef30f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb4ef2030ec70a4635ca4ac38cca76cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb4ef2030ec70a4635ca4ac38cca76cb">CAN_FS1R_FSC5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gadb4ef2030ec70a4635ca4ac38cca76cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf015be41f803007b9d0b2f3371e3621b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf015be41f803007b9d0b2f3371e3621b">CAN_FS1R_FSC6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaf015be41f803007b9d0b2f3371e3621b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga206d175417e2c787b44b0734708a5c9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga206d175417e2c787b44b0734708a5c9a">CAN_FS1R_FSC7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga206d175417e2c787b44b0734708a5c9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7209f008874dadf147cb5357ee46c226"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7209f008874dadf147cb5357ee46c226">CAN_FS1R_FSC8</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga7209f008874dadf147cb5357ee46c226"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58b4d8fa56d898ad6bf66ba8a4e098eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga58b4d8fa56d898ad6bf66ba8a4e098eb">CAN_FS1R_FSC9</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga58b4d8fa56d898ad6bf66ba8a4e098eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93162a66091ffd4829ed8265f53fe977"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93162a66091ffd4829ed8265f53fe977">CAN_FS1R_FSC10</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga93162a66091ffd4829ed8265f53fe977"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2e0bf399ea9175123c95c7010ef527d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2e0bf399ea9175123c95c7010ef527d">CAN_FS1R_FSC11</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gaf2e0bf399ea9175123c95c7010ef527d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89ea9e9c914052e2aecab16d57f2569d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89ea9e9c914052e2aecab16d57f2569d">CAN_FS1R_FSC12</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga89ea9e9c914052e2aecab16d57f2569d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2df1f2a554fc014529da34620739bc4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2df1f2a554fc014529da34620739bc4">CAN_FS1R_FSC13</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gaf2df1f2a554fc014529da34620739bc4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16fa4bf13579d29b57f7602489d043fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16fa4bf13579d29b57f7602489d043fe">CAN_FFA1R_FFA</a>   ((uint16_t)0x3FFF)</td></tr>
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<tr class="separator:ga16fa4bf13579d29b57f7602489d043fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b1a0f95bac4fed1a801da0cdbf2a833"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1a0f95bac4fed1a801da0cdbf2a833">CAN_FFA1R_FFA0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga4b1a0f95bac4fed1a801da0cdbf2a833"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba35e135e17431de861e57b550421386"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaba35e135e17431de861e57b550421386">CAN_FFA1R_FFA1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaba35e135e17431de861e57b550421386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b64393197f5cd0bd6e4853828a98065"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b64393197f5cd0bd6e4853828a98065">CAN_FFA1R_FFA2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga5b64393197f5cd0bd6e4853828a98065"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga111ce1e4500e2c0f543128dddbe941e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga111ce1e4500e2c0f543128dddbe941e9">CAN_FFA1R_FFA3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga111ce1e4500e2c0f543128dddbe941e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a824c777e7fea25f580bc313ed2ece6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a824c777e7fea25f580bc313ed2ece6">CAN_FFA1R_FFA4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga8a824c777e7fea25f580bc313ed2ece6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd571c9c746225e9b856ce3a46c3bb2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd571c9c746225e9b856ce3a46c3bb2f">CAN_FFA1R_FFA5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gabd571c9c746225e9b856ce3a46c3bb2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2afec157fe9684f1fa4b4401500f035"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2afec157fe9684f1fa4b4401500f035">CAN_FFA1R_FFA6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gab2afec157fe9684f1fa4b4401500f035"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d70e150cfd4866ea6b0a264ad45f51b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d70e150cfd4866ea6b0a264ad45f51b">CAN_FFA1R_FFA7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga2d70e150cfd4866ea6b0a264ad45f51b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa802583aa70aadeb46366ff98eccaf1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa802583aa70aadeb46366ff98eccaf1">CAN_FFA1R_FFA8</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gafa802583aa70aadeb46366ff98eccaf1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ee7da4c7e42fa7576d965c4bf94c089"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ee7da4c7e42fa7576d965c4bf94c089">CAN_FFA1R_FFA9</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga6ee7da4c7e42fa7576d965c4bf94c089"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8ac0384eab9b0cfdb491a960279fc438"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8ac0384eab9b0cfdb491a960279fc438">CAN_FFA1R_FFA10</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga8ac0384eab9b0cfdb491a960279fc438"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacd7e79ab503ec5143b5848edac71817"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacd7e79ab503ec5143b5848edac71817">CAN_FFA1R_FFA11</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gaacd7e79ab503ec5143b5848edac71817"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7873f1526050f5e666c22fb6a7e68b65"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7873f1526050f5e666c22fb6a7e68b65">CAN_FFA1R_FFA12</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga7873f1526050f5e666c22fb6a7e68b65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac74339b69a2e6f67df9b6e136089c0ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac74339b69a2e6f67df9b6e136089c0ee">CAN_FFA1R_FFA13</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gac74339b69a2e6f67df9b6e136089c0ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa571445875b08a9514e1d1b410a93ebd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa571445875b08a9514e1d1b410a93ebd">CAN_FA1R_FACT</a>   ((uint16_t)0x3FFF)</td></tr>
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<tr class="separator:gaa571445875b08a9514e1d1b410a93ebd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3ec1e2f9b9ccf2b4869cdf7c7328e60"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3ec1e2f9b9ccf2b4869cdf7c7328e60">CAN_FA1R_FACT0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gab3ec1e2f9b9ccf2b4869cdf7c7328e60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2457026460aecb52dba7ea17237b4dbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2457026460aecb52dba7ea17237b4dbe">CAN_FA1R_FACT1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:ga66354c26d0252cc86729365b315a69ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66354c26d0252cc86729365b315a69ee">CAN_FA1R_FACT2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:ga087dc5f2bdfe084eb98d2a0d06a29f1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga087dc5f2bdfe084eb98d2a0d06a29f1d">CAN_FA1R_FACT3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="memitem:ga6c46367b7e5ea831e34ba4cf824a63da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c46367b7e5ea831e34ba4cf824a63da">CAN_FA1R_FACT4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga548238c7babf34116fdb44b4575e2664"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga548238c7babf34116fdb44b4575e2664">CAN_FA1R_FACT5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga548238c7babf34116fdb44b4575e2664"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae403370a70f9ea2b6f9b449cafa6a91c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae403370a70f9ea2b6f9b449cafa6a91c">CAN_FA1R_FACT6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gae403370a70f9ea2b6f9b449cafa6a91c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga33e9f4334cf3bf9e7e30d5edf278a02b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga33e9f4334cf3bf9e7e30d5edf278a02b">CAN_FA1R_FACT7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga33e9f4334cf3bf9e7e30d5edf278a02b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ccbdd2932828bfa1d68777cb595f12e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ccbdd2932828bfa1d68777cb595f12e">CAN_FA1R_FACT8</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga0ccbdd2932828bfa1d68777cb595f12e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf8e4011791e551feeae33c47ef2b6a6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf8e4011791e551feeae33c47ef2b6a6a">CAN_FA1R_FACT9</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gaf8e4011791e551feeae33c47ef2b6a6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19696d8b702b33eafe7f18aa0c6c1955"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19696d8b702b33eafe7f18aa0c6c1955">CAN_FA1R_FACT10</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga19696d8b702b33eafe7f18aa0c6c1955"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89e5e3ccd4250ad2360b91ef51248a66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89e5e3ccd4250ad2360b91ef51248a66">CAN_FA1R_FACT11</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga89e5e3ccd4250ad2360b91ef51248a66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae78ec392640f05b20a7c6877983588ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae78ec392640f05b20a7c6877983588ae">CAN_FA1R_FACT12</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gae78ec392640f05b20a7c6877983588ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa722eeef87f8a3f58ebfcb531645cc05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa722eeef87f8a3f58ebfcb531645cc05">CAN_FA1R_FACT13</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gaa722eeef87f8a3f58ebfcb531645cc05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga38014ea45b62975627f8e222390f6819"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga38014ea45b62975627f8e222390f6819">CAN_F0R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga38014ea45b62975627f8e222390f6819"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e01c05df79304035c7aab1c7295bf3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e01c05df79304035c7aab1c7295bf3f">CAN_F0R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga9e01c05df79304035c7aab1c7295bf3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga083282146d4db7f757fef86cf302eded"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga083282146d4db7f757fef86cf302eded">CAN_F0R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga083282146d4db7f757fef86cf302eded"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae4a1adc2e4e550a38649a2bfd3662680"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae4a1adc2e4e550a38649a2bfd3662680">CAN_F0R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gae4a1adc2e4e550a38649a2bfd3662680"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0bfa15bf30fefb21f351228cde87981"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0bfa15bf30fefb21f351228cde87981">CAN_F0R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaa0bfa15bf30fefb21f351228cde87981"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5381c154ba89611bf4381657305ecb85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5381c154ba89611bf4381657305ecb85">CAN_F0R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga5381c154ba89611bf4381657305ecb85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae224160853946732608f00ad008a6b1a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae224160853946732608f00ad008a6b1a">CAN_F0R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gae224160853946732608f00ad008a6b1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0c44034b5f42fa8250dbb8e46bc83eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0c44034b5f42fa8250dbb8e46bc83eb">CAN_F0R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaa0c44034b5f42fa8250dbb8e46bc83eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga465e092af3e73882f9eaffad13f36dea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga465e092af3e73882f9eaffad13f36dea">CAN_F0R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga465e092af3e73882f9eaffad13f36dea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad1cb7ff6d513fec365eb5a830c3746f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad1cb7ff6d513fec365eb5a830c3746f0">CAN_F0R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gad1cb7ff6d513fec365eb5a830c3746f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b8a688856ca6b53417948f79932534d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b8a688856ca6b53417948f79932534d">CAN_F0R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga6b8a688856ca6b53417948f79932534d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga72b81011a2d626ac398a387c89055935"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga72b81011a2d626ac398a387c89055935">CAN_F0R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga72b81011a2d626ac398a387c89055935"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac178a6710aeb6c58f725dd7f00af5d5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac178a6710aeb6c58f725dd7f00af5d5a">CAN_F0R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gac178a6710aeb6c58f725dd7f00af5d5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8aee1182bef65da056242c4ed49dd0ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8aee1182bef65da056242c4ed49dd0ef">CAN_F0R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga8aee1182bef65da056242c4ed49dd0ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe16c95f454da44949977e4225590658"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe16c95f454da44949977e4225590658">CAN_F0R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gafe16c95f454da44949977e4225590658"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb07dca9fddf64a3476f25f227e33e1f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb07dca9fddf64a3476f25f227e33e1f">CAN_F0R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gabb07dca9fddf64a3476f25f227e33e1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf019423a4b07e564dfe917b859e68e80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf019423a4b07e564dfe917b859e68e80">CAN_F0R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaf019423a4b07e564dfe917b859e68e80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ee508d40637a9d558d2ab85753395bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ee508d40637a9d558d2ab85753395bd">CAN_F0R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga6ee508d40637a9d558d2ab85753395bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga827a459cd51a193d571a16e1d38fac22"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga827a459cd51a193d571a16e1d38fac22">CAN_F0R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga827a459cd51a193d571a16e1d38fac22"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ecfbfd6f5e129d690f1cb62ee344d78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ecfbfd6f5e129d690f1cb62ee344d78">CAN_F0R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga1ecfbfd6f5e129d690f1cb62ee344d78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a0568e276f245e1f167e673a1f5b92e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a0568e276f245e1f167e673a1f5b92e">CAN_F0R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga3a0568e276f245e1f167e673a1f5b92e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb71599bae1e35e750524708ac5824f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb71599bae1e35e750524708ac5824f1">CAN_F0R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gabb71599bae1e35e750524708ac5824f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7589f9a62f9f5406934266820a265f3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7589f9a62f9f5406934266820a265f3a">CAN_F0R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga7589f9a62f9f5406934266820a265f3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a0db2ff3fcf3ecd929d61e548905685"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a0db2ff3fcf3ecd929d61e548905685">CAN_F0R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga7a0db2ff3fcf3ecd929d61e548905685"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2161321c3b0857a9ca07bc45ac9cd1be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2161321c3b0857a9ca07bc45ac9cd1be">CAN_F0R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga2161321c3b0857a9ca07bc45ac9cd1be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa85c1d5ccfd6241059822a3aadc1053d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa85c1d5ccfd6241059822a3aadc1053d">CAN_F0R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:gaa85c1d5ccfd6241059822a3aadc1053d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d82ba565f065b4dec733d002c02498b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d82ba565f065b4dec733d002c02498b">CAN_F0R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga2d82ba565f065b4dec733d002c02498b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga199d63d7155cb5212982d4902e31e70c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga199d63d7155cb5212982d4902e31e70c">CAN_F0R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga199d63d7155cb5212982d4902e31e70c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac82d92ad6fb51b340e8a52da903e1009"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac82d92ad6fb51b340e8a52da903e1009">CAN_F0R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gac82d92ad6fb51b340e8a52da903e1009"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa0a651933135336bc14baa3e0a56ab1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa0a651933135336bc14baa3e0a56ab1">CAN_F0R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaaa0a651933135336bc14baa3e0a56ab1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad2a1d8bb83dfcd9f13d25e8ed098b54"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad2a1d8bb83dfcd9f13d25e8ed098b54">CAN_F0R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gaad2a1d8bb83dfcd9f13d25e8ed098b54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c9745bc78a65538cbe0fb0d09911554"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c9745bc78a65538cbe0fb0d09911554">CAN_F0R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga6c9745bc78a65538cbe0fb0d09911554"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf74bbd84aff2eb3891f6f6d0c418793c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf74bbd84aff2eb3891f6f6d0c418793c">CAN_F1R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaf74bbd84aff2eb3891f6f6d0c418793c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa2cb33663f4220e5a0d416cbddcec193"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa2cb33663f4220e5a0d416cbddcec193">CAN_F1R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaa2cb33663f4220e5a0d416cbddcec193"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86d75200e9ead1afbe88add086ac4bb4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga86d75200e9ead1afbe88add086ac4bb4">CAN_F1R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga86d75200e9ead1afbe88add086ac4bb4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4dbe3b567fca94f5d5e4c877e0383d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa4dbe3b567fca94f5d5e4c877e0383d4">CAN_F1R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gaa4dbe3b567fca94f5d5e4c877e0383d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab74c1e5fba0af06b783289d56a8d743a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab74c1e5fba0af06b783289d56a8d743a">CAN_F1R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gab74c1e5fba0af06b783289d56a8d743a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga163dda15630c6f057bac420a8cb393d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga163dda15630c6f057bac420a8cb393d8">CAN_F1R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga163dda15630c6f057bac420a8cb393d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd27041e24d500c940abed9aaa53910d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd27041e24d500c940abed9aaa53910d">CAN_F1R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gadd27041e24d500c940abed9aaa53910d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaadfffc15f309b85cc3abd7439ea4b8c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaadfffc15f309b85cc3abd7439ea4b8c6">CAN_F1R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaadfffc15f309b85cc3abd7439ea4b8c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf2588b13464de27f12768d33a75d2ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf2588b13464de27f12768d33a75d2ba">CAN_F1R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gadf2588b13464de27f12768d33a75d2ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga979839e5c63f94eb294a09b74f5c09bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga979839e5c63f94eb294a09b74f5c09bf">CAN_F1R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga979839e5c63f94eb294a09b74f5c09bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f049fa606d557a8a468747c6d285357"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f049fa606d557a8a468747c6d285357">CAN_F1R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga7f049fa606d557a8a468747c6d285357"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43409866ee9e6ea1712f50679a4bb212"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43409866ee9e6ea1712f50679a4bb212">CAN_F1R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga43409866ee9e6ea1712f50679a4bb212"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f86fb2f2080f513d8392d389cdaa1fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f86fb2f2080f513d8392d389cdaa1fd">CAN_F1R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga3f86fb2f2080f513d8392d389cdaa1fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c1b7aeeb196a6564b2b3f049590520e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c1b7aeeb196a6564b2b3f049590520e">CAN_F1R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga2c1b7aeeb196a6564b2b3f049590520e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45bad406315318f9cecb0c783ac7218d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45bad406315318f9cecb0c783ac7218d">CAN_F1R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga45bad406315318f9cecb0c783ac7218d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b105deaf668c0e04950be0de975bcde"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b105deaf668c0e04950be0de975bcde">CAN_F1R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga9b105deaf668c0e04950be0de975bcde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga84fabcf9736d7ef78587ff63cb6b1373"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga84fabcf9736d7ef78587ff63cb6b1373">CAN_F1R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga84fabcf9736d7ef78587ff63cb6b1373"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga966d41aca2269fd8cb6830dbbd176140"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga966d41aca2269fd8cb6830dbbd176140">CAN_F1R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga966d41aca2269fd8cb6830dbbd176140"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a53cd0cf8722dc63b8ff26d4b0fa0f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a53cd0cf8722dc63b8ff26d4b0fa0f7">CAN_F1R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga9a53cd0cf8722dc63b8ff26d4b0fa0f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3fb64b2b59f73045b3ead12ab1211b4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3fb64b2b59f73045b3ead12ab1211b4b">CAN_F1R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga3fb64b2b59f73045b3ead12ab1211b4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad558faeeeaf748bdface31d4bd3ed5b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad558faeeeaf748bdface31d4bd3ed5b6">CAN_F1R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gad558faeeeaf748bdface31d4bd3ed5b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab16bc53f206b1f318e5fe8c248294fec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab16bc53f206b1f318e5fe8c248294fec">CAN_F1R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gab16bc53f206b1f318e5fe8c248294fec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42841c82744146dc70e8e679b5904e02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42841c82744146dc70e8e679b5904e02">CAN_F1R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga42841c82744146dc70e8e679b5904e02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad1f961b642e42faaaf495c9ec099c128"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad1f961b642e42faaaf495c9ec099c128">CAN_F1R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gad1f961b642e42faaaf495c9ec099c128"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga96670686c71a15631ec2f772973dd7d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96670686c71a15631ec2f772973dd7d5">CAN_F1R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga96670686c71a15631ec2f772973dd7d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa2d8b1a30c3a6ae1f75369abc445ab7d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa2d8b1a30c3a6ae1f75369abc445ab7d">CAN_F1R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaa2d8b1a30c3a6ae1f75369abc445ab7d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf027c958889ab93acfb1b86988269874"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf027c958889ab93acfb1b86988269874">CAN_F1R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaf027c958889ab93acfb1b86988269874"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga32400e283bc0037da21f0c913bb860b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga32400e283bc0037da21f0c913bb860b6">CAN_F1R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga32400e283bc0037da21f0c913bb860b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb0467d664f27b3ca8ef4ad220593c46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb0467d664f27b3ca8ef4ad220593c46">CAN_F1R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gadb0467d664f27b3ca8ef4ad220593c46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c3e3090ab67a54830be208a628efd8f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c3e3090ab67a54830be208a628efd8f">CAN_F1R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga1c3e3090ab67a54830be208a628efd8f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga85034e026be1af5e45e5d15537449e6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga85034e026be1af5e45e5d15537449e6d">CAN_F1R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga85034e026be1af5e45e5d15537449e6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ddfc083d58a190057fb67e4eb31136b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ddfc083d58a190057fb67e4eb31136b">CAN_F1R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga6ddfc083d58a190057fb67e4eb31136b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf17f4c3e553020ee893415796bd29d84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf17f4c3e553020ee893415796bd29d84">CAN_F2R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaf17f4c3e553020ee893415796bd29d84"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae97de172023462e5f40d4b420209809b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae97de172023462e5f40d4b420209809b">CAN_F2R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gae97de172023462e5f40d4b420209809b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23008ac61893eb6a65ab9041c53a84ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23008ac61893eb6a65ab9041c53a84ee">CAN_F2R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga23008ac61893eb6a65ab9041c53a84ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad559580b386d0c621a6bf7292c706e36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad559580b386d0c621a6bf7292c706e36">CAN_F2R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gad559580b386d0c621a6bf7292c706e36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e52ca421788d68f3edb9a52434374dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e52ca421788d68f3edb9a52434374dd">CAN_F2R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga0e52ca421788d68f3edb9a52434374dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga96a97a9711a0a53a7ee18907e95d8887"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96a97a9711a0a53a7ee18907e95d8887">CAN_F2R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga96a97a9711a0a53a7ee18907e95d8887"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f73f1bd0d3246f27d7a91a620fb3cc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f73f1bd0d3246f27d7a91a620fb3cc7">CAN_F2R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga6f73f1bd0d3246f27d7a91a620fb3cc7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga72bf4a6050af614eb1ac85c76feb95cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga72bf4a6050af614eb1ac85c76feb95cc">CAN_F2R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga72bf4a6050af614eb1ac85c76feb95cc"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad484c083bc2023deda5840facc549908"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad484c083bc2023deda5840facc549908">CAN_F2R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="memitem:ga0d0e05e4824f05e2cf12b3d0a0b7f319"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d0e05e4824f05e2cf12b3d0a0b7f319">CAN_F2R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga0d0e05e4824f05e2cf12b3d0a0b7f319"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga022da7a86e8174aff1054eb1aef2c73c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga022da7a86e8174aff1054eb1aef2c73c">CAN_F2R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga022da7a86e8174aff1054eb1aef2c73c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaedf715fa1ef43c8461408944e4aecec7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaedf715fa1ef43c8461408944e4aecec7">CAN_F2R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gaedf715fa1ef43c8461408944e4aecec7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47960a79c582cbc9bfef85c411a2be94"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47960a79c582cbc9bfef85c411a2be94">CAN_F2R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga47960a79c582cbc9bfef85c411a2be94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8c6e3cf3a4d1e9d722e820a3a0c1b6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8c6e3cf3a4d1e9d722e820a3a0c1b6a">CAN_F2R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gae8c6e3cf3a4d1e9d722e820a3a0c1b6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga421a366074fb422686461a92abd1259e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga421a366074fb422686461a92abd1259e">CAN_F2R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga421a366074fb422686461a92abd1259e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga178a0308db954b97818401be1f28a990"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga178a0308db954b97818401be1f28a990">CAN_F2R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga178a0308db954b97818401be1f28a990"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab60aef7e45f8d12777032321a33cdb38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab60aef7e45f8d12777032321a33cdb38">CAN_F2R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gab60aef7e45f8d12777032321a33cdb38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0483dac5b6986246a3ba106fbeb8e3bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0483dac5b6986246a3ba106fbeb8e3bd">CAN_F2R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga0483dac5b6986246a3ba106fbeb8e3bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga259b472c9c9f158e1701c8b8d5a940b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga259b472c9c9f158e1701c8b8d5a940b9">CAN_F2R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga259b472c9c9f158e1701c8b8d5a940b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23db612c79422bee815e437d6aaf5a6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23db612c79422bee815e437d6aaf5a6c">CAN_F2R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga23db612c79422bee815e437d6aaf5a6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef9a469e877bfa29f4edb66730c43d43"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef9a469e877bfa29f4edb66730c43d43">CAN_F2R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaef9a469e877bfa29f4edb66730c43d43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4edc4a54cc13f63afe8dbe3aa37776a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4edc4a54cc13f63afe8dbe3aa37776a5">CAN_F2R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga4edc4a54cc13f63afe8dbe3aa37776a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga169f5fb3dd35ae2b048c8c05c3e202d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga169f5fb3dd35ae2b048c8c05c3e202d7">CAN_F2R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga169f5fb3dd35ae2b048c8c05c3e202d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0073b206235b3c33a9b831e5027e3bf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0073b206235b3c33a9b831e5027e3bf0">CAN_F2R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga0073b206235b3c33a9b831e5027e3bf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga459caea38417d17c042e52ba38eb3c1b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga459caea38417d17c042e52ba38eb3c1b">CAN_F2R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga459caea38417d17c042e52ba38eb3c1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0da8cd8657f6e67f1d86fc9f695bb4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0da8cd8657f6e67f1d86fc9f695bb4e">CAN_F2R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gae0da8cd8657f6e67f1d86fc9f695bb4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80c9ae7f2eca3db813737c49d49f2b08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80c9ae7f2eca3db813737c49d49f2b08">CAN_F2R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga80c9ae7f2eca3db813737c49d49f2b08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d6b6c109e359e3d2a07e6626c2b4aff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d6b6c109e359e3d2a07e6626c2b4aff">CAN_F2R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga1d6b6c109e359e3d2a07e6626c2b4aff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3c4d05997d8930291c8ab2bb19545714"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c4d05997d8930291c8ab2bb19545714">CAN_F2R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga3c4d05997d8930291c8ab2bb19545714"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5431f98aafd2a7f8158a335d65ebea1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5431f98aafd2a7f8158a335d65ebea1">CAN_F2R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:gad5431f98aafd2a7f8158a335d65ebea1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad79345a758898023543bd5384be09758"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad79345a758898023543bd5384be09758">CAN_F2R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:gad79345a758898023543bd5384be09758"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaada8442f47c1fffb00c13e404d036122"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaada8442f47c1fffb00c13e404d036122">CAN_F2R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:gaada8442f47c1fffb00c13e404d036122"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6bc065319a9862c1f5ca7326b790ef53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6bc065319a9862c1f5ca7326b790ef53">CAN_F3R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga6bc065319a9862c1f5ca7326b790ef53"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42e636521c72a20aa8380fe4fe150b91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42e636521c72a20aa8380fe4fe150b91">CAN_F3R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga42e636521c72a20aa8380fe4fe150b91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga217f5b77e4fefb2d1135187ee2b5bbf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga217f5b77e4fefb2d1135187ee2b5bbf2">CAN_F3R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga217f5b77e4fefb2d1135187ee2b5bbf2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7693dcf6c0011bbeb19e0413a5ce1f56"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7693dcf6c0011bbeb19e0413a5ce1f56">CAN_F3R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga7693dcf6c0011bbeb19e0413a5ce1f56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bffde5d3e1e2e75f4facc98903620f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bffde5d3e1e2e75f4facc98903620f7">CAN_F3R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga0bffde5d3e1e2e75f4facc98903620f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30ccdfd3676f314e749cc205ffcfe1cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30ccdfd3676f314e749cc205ffcfe1cf">CAN_F3R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga30ccdfd3676f314e749cc205ffcfe1cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b2aa80397b4961a33b41303aa348ea1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b2aa80397b4961a33b41303aa348ea1">CAN_F3R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga2b2aa80397b4961a33b41303aa348ea1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b7072c9b829c7df660eb2dea05ee8d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b7072c9b829c7df660eb2dea05ee8d8">CAN_F3R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga7b7072c9b829c7df660eb2dea05ee8d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad016208d1aa9008aaba9a887a1e8b6fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad016208d1aa9008aaba9a887a1e8b6fa">CAN_F3R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:gad016208d1aa9008aaba9a887a1e8b6fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad4f4f0d2b56860e36f7777ab397e8609"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad4f4f0d2b56860e36f7777ab397e8609">CAN_F3R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gad4f4f0d2b56860e36f7777ab397e8609"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadcfc2559b456c3af3804a22e0fb5c50d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadcfc2559b456c3af3804a22e0fb5c50d">CAN_F3R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gadcfc2559b456c3af3804a22e0fb5c50d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7df8031e3a2f661b45fdbde58a26c6b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7df8031e3a2f661b45fdbde58a26c6b6">CAN_F3R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga7df8031e3a2f661b45fdbde58a26c6b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c6baa9ac6a1cdd55c2d51ee40cf8f2d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c6baa9ac6a1cdd55c2d51ee40cf8f2d">CAN_F3R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga6c6baa9ac6a1cdd55c2d51ee40cf8f2d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga95fc8c778ffa6deac5a202985fdd98ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95fc8c778ffa6deac5a202985fdd98ae">CAN_F3R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga95fc8c778ffa6deac5a202985fdd98ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0c4a4998f2ddc12771da116b1c20d765"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0c4a4998f2ddc12771da116b1c20d765">CAN_F3R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga0c4a4998f2ddc12771da116b1c20d765"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5fb6157fc48147e6c74ed348d156bfa1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fb6157fc48147e6c74ed348d156bfa1">CAN_F3R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga5fb6157fc48147e6c74ed348d156bfa1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaadcf2a14e752519bf8a90129fb9d42b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaadcf2a14e752519bf8a90129fb9d42b1">CAN_F3R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:gaadcf2a14e752519bf8a90129fb9d42b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47c5296c991b481548302478df85e477"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47c5296c991b481548302478df85e477">CAN_F3R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga47c5296c991b481548302478df85e477"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga657b8cda94fd736a4831ab4086ae746f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga657b8cda94fd736a4831ab4086ae746f">CAN_F3R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga657b8cda94fd736a4831ab4086ae746f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga435edc4b2055ac2d1c3ce616a9c1b236"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga435edc4b2055ac2d1c3ce616a9c1b236">CAN_F3R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga435edc4b2055ac2d1c3ce616a9c1b236"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa508de7087eb832ecaf353a4b6821ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa508de7087eb832ecaf353a4b6821ef">CAN_F3R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaaa508de7087eb832ecaf353a4b6821ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga643ceb9293665b8307e63ae0e1700d91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga643ceb9293665b8307e63ae0e1700d91">CAN_F3R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga643ceb9293665b8307e63ae0e1700d91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91f5887e884fcf423d680798f4e372bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91f5887e884fcf423d680798f4e372bb">CAN_F3R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga91f5887e884fcf423d680798f4e372bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6adc9c7706f39f7c33760fe6b8c5d17e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6adc9c7706f39f7c33760fe6b8c5d17e">CAN_F3R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga6adc9c7706f39f7c33760fe6b8c5d17e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7581186f0241f6db9f63a0a0db22919"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7581186f0241f6db9f63a0a0db22919">CAN_F3R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gad7581186f0241f6db9f63a0a0db22919"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43b4c084e802398ad265ceb69cfd7519"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43b4c084e802398ad265ceb69cfd7519">CAN_F3R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga43b4c084e802398ad265ceb69cfd7519"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade732503a8d41e3f1bb338a2a8103bd2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade732503a8d41e3f1bb338a2a8103bd2">CAN_F3R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gade732503a8d41e3f1bb338a2a8103bd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7539a7f651425a757a549205544e508c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7539a7f651425a757a549205544e508c">CAN_F3R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga7539a7f651425a757a549205544e508c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ec25e4ba3ebaf53780e2b8da63e4a3b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ec25e4ba3ebaf53780e2b8da63e4a3b">CAN_F3R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga1ec25e4ba3ebaf53780e2b8da63e4a3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8268be8b5477f813c165e851acd41a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8268be8b5477f813c165e851acd41a2">CAN_F3R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gae8268be8b5477f813c165e851acd41a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga494ad7f35d8552b8494379916a987074"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga494ad7f35d8552b8494379916a987074">CAN_F3R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga494ad7f35d8552b8494379916a987074"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15bbe0d2d24dc95e10156c2541feb4c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15bbe0d2d24dc95e10156c2541feb4c4">CAN_F3R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga15bbe0d2d24dc95e10156c2541feb4c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0eb0d4d21c082c8381271ab146431993"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0eb0d4d21c082c8381271ab146431993">CAN_F4R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga0eb0d4d21c082c8381271ab146431993"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91922c78bf92f051b8e8abbf9cc1f6e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91922c78bf92f051b8e8abbf9cc1f6e9">CAN_F4R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga91922c78bf92f051b8e8abbf9cc1f6e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae56f77f869114e69525353f96004f955"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae56f77f869114e69525353f96004f955">CAN_F4R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae56f77f869114e69525353f96004f955"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga951a8213e55b01ecedcef870c85841e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga951a8213e55b01ecedcef870c85841e7">CAN_F4R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga951a8213e55b01ecedcef870c85841e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga453f90cdd0b520b7d65e19af3868d4ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga453f90cdd0b520b7d65e19af3868d4ec">CAN_F4R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga453f90cdd0b520b7d65e19af3868d4ec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace348ba56c1f9676e5b605a6fe0cd52e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace348ba56c1f9676e5b605a6fe0cd52e">CAN_F4R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gace348ba56c1f9676e5b605a6fe0cd52e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae99d36b50a16c38b2006fdba4683ddd9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae99d36b50a16c38b2006fdba4683ddd9">CAN_F4R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gae99d36b50a16c38b2006fdba4683ddd9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d61ae4af9acc61476493b640cfb4745"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d61ae4af9acc61476493b640cfb4745">CAN_F4R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga5d61ae4af9acc61476493b640cfb4745"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89ded00ec0b6c0918b019457d6cf43f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89ded00ec0b6c0918b019457d6cf43f5">CAN_F4R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga89ded00ec0b6c0918b019457d6cf43f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac658a1ced873fd9dff54833d8c413536"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac658a1ced873fd9dff54833d8c413536">CAN_F4R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gac658a1ced873fd9dff54833d8c413536"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad06bc748776a78f008895be9e0cc7a1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad06bc748776a78f008895be9e0cc7a1d">CAN_F4R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gad06bc748776a78f008895be9e0cc7a1d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf612f239dcf45bd933136a5c8c5909f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf612f239dcf45bd933136a5c8c5909f9">CAN_F4R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:gaf612f239dcf45bd933136a5c8c5909f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6dc611a52acf6dfa1df7ebf867bc7e2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6dc611a52acf6dfa1df7ebf867bc7e2f">CAN_F4R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga6dc611a52acf6dfa1df7ebf867bc7e2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1736bc2808a37aa82358fe1c36c963a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1736bc2808a37aa82358fe1c36c963a6">CAN_F4R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga1736bc2808a37aa82358fe1c36c963a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d7ec466bbf196a41f6da2a7b506675d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d7ec466bbf196a41f6da2a7b506675d">CAN_F4R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga7d7ec466bbf196a41f6da2a7b506675d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad30ff7e7b0c0f7e56821ecbcd6fcc23c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad30ff7e7b0c0f7e56821ecbcd6fcc23c">CAN_F4R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gad30ff7e7b0c0f7e56821ecbcd6fcc23c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga199bd29b6f3ff56150a9dcd71c8ea13f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga199bd29b6f3ff56150a9dcd71c8ea13f">CAN_F4R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga199bd29b6f3ff56150a9dcd71c8ea13f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga893837534cbc7a043fa995de4619e2da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga893837534cbc7a043fa995de4619e2da">CAN_F4R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga893837534cbc7a043fa995de4619e2da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga551e80c41958417cbcf1d0c53e4947a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga551e80c41958417cbcf1d0c53e4947a3">CAN_F4R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga551e80c41958417cbcf1d0c53e4947a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80d9a946bd39dae4b0a862cf21f262ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80d9a946bd39dae4b0a862cf21f262ed">CAN_F4R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga80d9a946bd39dae4b0a862cf21f262ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5646609987ce174cf3b94bb4538172f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5646609987ce174cf3b94bb4538172f4">CAN_F4R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga5646609987ce174cf3b94bb4538172f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga356faa77de97c61e9b5f6b763173a987"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga356faa77de97c61e9b5f6b763173a987">CAN_F4R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:ga356faa77de97c61e9b5f6b763173a987"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac6b246b3df35cc1db06e8c809137562f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac6b246b3df35cc1db06e8c809137562f">CAN_F4R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gac6b246b3df35cc1db06e8c809137562f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4882da3ee5be3aed3d5eb46923859674"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4882da3ee5be3aed3d5eb46923859674">CAN_F4R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga4882da3ee5be3aed3d5eb46923859674"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e178aa8c6f98a866aaae511b9da86c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e178aa8c6f98a866aaae511b9da86c8">CAN_F4R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga1e178aa8c6f98a866aaae511b9da86c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a5ca327060530761d71362d39b2d364"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a5ca327060530761d71362d39b2d364">CAN_F4R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga9a5ca327060530761d71362d39b2d364"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeabe4836aed74af4adba72b2c7684a6e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeabe4836aed74af4adba72b2c7684a6e">CAN_F4R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:gaeabe4836aed74af4adba72b2c7684a6e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaaa8e7d74919e74723f7df71357cc994a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa8e7d74919e74723f7df71357cc994a">CAN_F4R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:gaaa8e7d74919e74723f7df71357cc994a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6e2b2b9bd5b397e58d57fb379546110b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e2b2b9bd5b397e58d57fb379546110b">CAN_F4R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga6e2b2b9bd5b397e58d57fb379546110b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeb165ede225dc35a825647e5efcab437"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeb165ede225dc35a825647e5efcab437">CAN_F4R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaeb165ede225dc35a825647e5efcab437"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7898b1f422424fd7fc0896b908748e7c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7898b1f422424fd7fc0896b908748e7c">CAN_F4R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga7898b1f422424fd7fc0896b908748e7c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga92d7e6a44e87911e9cc14f6bff854fa2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga92d7e6a44e87911e9cc14f6bff854fa2">CAN_F4R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga92d7e6a44e87911e9cc14f6bff854fa2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5cdf98e317662e286ad2a3344ee516df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5cdf98e317662e286ad2a3344ee516df">CAN_F5R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga5cdf98e317662e286ad2a3344ee516df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac814c424ed2ccc11645da6e62f3fb81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac814c424ed2ccc11645da6e62f3fb81">CAN_F5R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaac814c424ed2ccc11645da6e62f3fb81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b0af1936dd43bd319614e3298fd28d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b0af1936dd43bd319614e3298fd28d1">CAN_F5R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga4b0af1936dd43bd319614e3298fd28d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga013f84e3f3f0e148d3a9a071ccbf6738"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga013f84e3f3f0e148d3a9a071ccbf6738">CAN_F5R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga013f84e3f3f0e148d3a9a071ccbf6738"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7cfc330921811d76ed6476d6935e84e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7cfc330921811d76ed6476d6935e84e7">CAN_F5R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga7cfc330921811d76ed6476d6935e84e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf9aebaa8e61198240c1564ce73acb1d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf9aebaa8e61198240c1564ce73acb1d2">CAN_F5R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaf9aebaa8e61198240c1564ce73acb1d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadea331fb6273fda80a8f5a3dc8eaf6f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadea331fb6273fda80a8f5a3dc8eaf6f4">CAN_F5R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gadea331fb6273fda80a8f5a3dc8eaf6f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc7dfaacfba6a42a17b16281f690f952"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc7dfaacfba6a42a17b16281f690f952">CAN_F5R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gafc7dfaacfba6a42a17b16281f690f952"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba0938e0f55773406fd59c2a0bd7c46e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaba0938e0f55773406fd59c2a0bd7c46e">CAN_F5R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaba0938e0f55773406fd59c2a0bd7c46e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9715c4445159d0068172309092e574e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9715c4445159d0068172309092e574e3">CAN_F5R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga9715c4445159d0068172309092e574e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7de15e73395473569a447023dae53c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7de15e73395473569a447023dae53c4">CAN_F5R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gae7de15e73395473569a447023dae53c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39b60e0befdf681694bc4123b4b7f7bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39b60e0befdf681694bc4123b4b7f7bd">CAN_F5R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga39b60e0befdf681694bc4123b4b7f7bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bc4598d0d603c802b7140f967d84e5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bc4598d0d603c802b7140f967d84e5c">CAN_F5R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga0bc4598d0d603c802b7140f967d84e5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8b4439ac4bc79ff74d21060ff533b12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8b4439ac4bc79ff74d21060ff533b12">CAN_F5R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gac8b4439ac4bc79ff74d21060ff533b12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d117ee64d9c1673f22f12f24bd481a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d117ee64d9c1673f22f12f24bd481a4">CAN_F5R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga0d117ee64d9c1673f22f12f24bd481a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf761c448bf29c4d93f4c2a75981fa049"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf761c448bf29c4d93f4c2a75981fa049">CAN_F5R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:gaf761c448bf29c4d93f4c2a75981fa049"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga87543e5b7c48580ca9925402ab6ca5a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga87543e5b7c48580ca9925402ab6ca5a7">CAN_F5R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga87543e5b7c48580ca9925402ab6ca5a7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b9c39ec4649cd68a540c88c3c64d506"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b9c39ec4649cd68a540c88c3c64d506">CAN_F5R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga9b9c39ec4649cd68a540c88c3c64d506"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4992301536d388de215273769708b843"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4992301536d388de215273769708b843">CAN_F5R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga4992301536d388de215273769708b843"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab21c0b793d7aff03497a95d5c6528ab2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab21c0b793d7aff03497a95d5c6528ab2">CAN_F5R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gab21c0b793d7aff03497a95d5c6528ab2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf1c4c5d06a9da5f853aaede3470b07f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1c4c5d06a9da5f853aaede3470b07f4">CAN_F5R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:gaf1c4c5d06a9da5f853aaede3470b07f4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga91214f1f7dbb4b75b0c425624640fd76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91214f1f7dbb4b75b0c425624640fd76">CAN_F5R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga91214f1f7dbb4b75b0c425624640fd76"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1b24151a68c59fe0f3aa15e498fdc739"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b24151a68c59fe0f3aa15e498fdc739">CAN_F5R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga1b24151a68c59fe0f3aa15e498fdc739"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadea89ef2e5c3dafae174b671c8e083d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadea89ef2e5c3dafae174b671c8e083d2">CAN_F5R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gadea89ef2e5c3dafae174b671c8e083d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2acccf9ab5708116cd888f2d65da54cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2acccf9ab5708116cd888f2d65da54cc">CAN_F5R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga2acccf9ab5708116cd888f2d65da54cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3c0b9425117a2409b61032a9c746c2b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c0b9425117a2409b61032a9c746c2b5">CAN_F5R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga3c0b9425117a2409b61032a9c746c2b5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0a0d31d96e75ea32299e78845f584632"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a0d31d96e75ea32299e78845f584632">CAN_F5R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga0a0d31d96e75ea32299e78845f584632"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade5db4ad8b19580b895356fff66bb6be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade5db4ad8b19580b895356fff66bb6be">CAN_F5R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:gade5db4ad8b19580b895356fff66bb6be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4acec834c3eaf55af5e745d6988ddc1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4acec834c3eaf55af5e745d6988ddc1e">CAN_F5R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga4acec834c3eaf55af5e745d6988ddc1e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga923a0086ada8e09a9202338b588f27d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga923a0086ada8e09a9202338b588f27d1">CAN_F5R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga923a0086ada8e09a9202338b588f27d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga840d2b3f751753e9d21b2e23506e6995"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga840d2b3f751753e9d21b2e23506e6995">CAN_F5R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:ga840d2b3f751753e9d21b2e23506e6995"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac8d28066798958e5730a95353690bcd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8d28066798958e5730a95353690bcd0">CAN_F5R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:gac8d28066798958e5730a95353690bcd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb57fe42259bd37deffe11eded640c76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb57fe42259bd37deffe11eded640c76">CAN_F6R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:gacb57fe42259bd37deffe11eded640c76"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1de288e28d5547106645ecc5b0c47f2a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1de288e28d5547106645ecc5b0c47f2a">CAN_F6R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga1de288e28d5547106645ecc5b0c47f2a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa8662caaa28aee37b2689f55400b75c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa8662caaa28aee37b2689f55400b75c">CAN_F6R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:gaaa8662caaa28aee37b2689f55400b75c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae4ccedde67989fcbaa84cae9cae4b1eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae4ccedde67989fcbaa84cae9cae4b1eb">CAN_F6R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gae4ccedde67989fcbaa84cae9cae4b1eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga45b063b3c14fd27bd63c03f878ac6cfc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45b063b3c14fd27bd63c03f878ac6cfc">CAN_F6R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga45b063b3c14fd27bd63c03f878ac6cfc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga32f8566fab72dec6d52ad7262e67cbcc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga32f8566fab72dec6d52ad7262e67cbcc">CAN_F6R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga32f8566fab72dec6d52ad7262e67cbcc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8636ecdacc3ca05d69e66737b7f2e7cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8636ecdacc3ca05d69e66737b7f2e7cf">CAN_F6R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga8636ecdacc3ca05d69e66737b7f2e7cf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb555ddab4853625c9b48b24e88d0dd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb555ddab4853625c9b48b24e88d0dd8">CAN_F6R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="memitem:gaa1e7ca2d014d77152ff0e6bbb8d5fb63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1e7ca2d014d77152ff0e6bbb8d5fb63">CAN_F6R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaa1e7ca2d014d77152ff0e6bbb8d5fb63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe4dc5e57c209eb4d3c5ed94b3a2e897"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe4dc5e57c209eb4d3c5ed94b3a2e897">CAN_F6R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gafe4dc5e57c209eb4d3c5ed94b3a2e897"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa63ca9ec114f553d68e0b0d38ae57ff0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa63ca9ec114f553d68e0b0d38ae57ff0">CAN_F6R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaa63ca9ec114f553d68e0b0d38ae57ff0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf3394a2675a7cb30556a40cc5b77c08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf3394a2675a7cb30556a40cc5b77c08">CAN_F6R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gadf3394a2675a7cb30556a40cc5b77c08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9c9c04edb492e48619de926196ab695"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9c9c04edb492e48619de926196ab695">CAN_F6R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gae9c9c04edb492e48619de926196ab695"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga070e91897e07ae11a9d2f60ff31e196a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga070e91897e07ae11a9d2f60ff31e196a">CAN_F6R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga070e91897e07ae11a9d2f60ff31e196a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3479321a85f1f55e24a1b56d13226a22"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3479321a85f1f55e24a1b56d13226a22">CAN_F6R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga3479321a85f1f55e24a1b56d13226a22"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a998a2b37fde5207b286a58c115a9e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a998a2b37fde5207b286a58c115a9e8">CAN_F6R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga9a998a2b37fde5207b286a58c115a9e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga891ad3d341cee397d49fc982c509f7d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga891ad3d341cee397d49fc982c509f7d5">CAN_F6R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga891ad3d341cee397d49fc982c509f7d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4a70606f1b07a6bbb5ae4fe8ad374e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4a70606f1b07a6bbb5ae4fe8ad374e5">CAN_F6R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gac4a70606f1b07a6bbb5ae4fe8ad374e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1542ea54030e3052c8991b249cd0e504"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1542ea54030e3052c8991b249cd0e504">CAN_F6R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga1542ea54030e3052c8991b249cd0e504"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e1a7c680bcfc57c6cc521cbaa0749d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e1a7c680bcfc57c6cc521cbaa0749d6">CAN_F6R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga1e1a7c680bcfc57c6cc521cbaa0749d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6fba31d938ab3492c8855c26bebfbef2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fba31d938ab3492c8855c26bebfbef2">CAN_F6R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga6fba31d938ab3492c8855c26bebfbef2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga556f3b08cee839e038109e604e5bba4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga556f3b08cee839e038109e604e5bba4c">CAN_F6R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga556f3b08cee839e038109e604e5bba4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdc41162219ed6f5be1b5ae7ba328754"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdc41162219ed6f5be1b5ae7ba328754">CAN_F6R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gafdc41162219ed6f5be1b5ae7ba328754"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89f4fd5c28d2fd7475081b39b2b358c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89f4fd5c28d2fd7475081b39b2b358c6">CAN_F6R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga89f4fd5c28d2fd7475081b39b2b358c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac5eb9d0f3cad0eeea398f2ba5fd83cf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac5eb9d0f3cad0eeea398f2ba5fd83cf2">CAN_F6R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gac5eb9d0f3cad0eeea398f2ba5fd83cf2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa3fa46e9d1fafcb3eb1189d6d43692cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa3fa46e9d1fafcb3eb1189d6d43692cd">CAN_F6R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaa3fa46e9d1fafcb3eb1189d6d43692cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9168b4d12ddb654b397ce3ffb66af4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9168b4d12ddb654b397ce3ffb66af4c">CAN_F6R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gab9168b4d12ddb654b397ce3ffb66af4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga610fdf301fb1cff5af38f83b4e0c81b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga610fdf301fb1cff5af38f83b4e0c81b1">CAN_F6R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga610fdf301fb1cff5af38f83b4e0c81b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a3e033aae51ff31b75fb801599232f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a3e033aae51ff31b75fb801599232f5">CAN_F6R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga8a3e033aae51ff31b75fb801599232f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga868ae6fc3bbe273b44d250791a80df58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga868ae6fc3bbe273b44d250791a80df58">CAN_F6R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga868ae6fc3bbe273b44d250791a80df58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe08696e215f9e8f1605e60e4817dd8b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe08696e215f9e8f1605e60e4817dd8b">CAN_F6R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gafe08696e215f9e8f1605e60e4817dd8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga69b2dffd9969ff8658b45a7a2bb1c5ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga69b2dffd9969ff8658b45a7a2bb1c5ee">CAN_F6R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga69b2dffd9969ff8658b45a7a2bb1c5ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2217bcc5b82de25751d3984884b0e0c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2217bcc5b82de25751d3984884b0e0c1">CAN_F7R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga2217bcc5b82de25751d3984884b0e0c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf71cbdd5cbe109fde119adb86d64f0a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf71cbdd5cbe109fde119adb86d64f0a7">CAN_F7R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaf71cbdd5cbe109fde119adb86d64f0a7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0a7a004058a6b10b5cb3374eb82dd1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0a7a004058a6b10b5cb3374eb82dd1d">CAN_F7R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaa0a7a004058a6b10b5cb3374eb82dd1d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2224329373b490c8dd4f0c148ef58997"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2224329373b490c8dd4f0c148ef58997">CAN_F7R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2224329373b490c8dd4f0c148ef58997"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3574ea4882319ac08e0df065bdd3566"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3574ea4882319ac08e0df065bdd3566">CAN_F7R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gad3574ea4882319ac08e0df065bdd3566"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76f63e712a9a57dacab2874dd695254d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76f63e712a9a57dacab2874dd695254d">CAN_F7R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga76f63e712a9a57dacab2874dd695254d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22d969f17f8a25a63cb056ee2cb622d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22d969f17f8a25a63cb056ee2cb622d3">CAN_F7R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga22d969f17f8a25a63cb056ee2cb622d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae89ec51b51c83c108880e361caf17ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae89ec51b51c83c108880e361caf17ac">CAN_F7R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaae89ec51b51c83c108880e361caf17ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga67fca99c67cab6713605e14d96a9df62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga67fca99c67cab6713605e14d96a9df62">CAN_F7R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga67fca99c67cab6713605e14d96a9df62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacd1ef8f0870bc5a5422a6bedbb61d40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacd1ef8f0870bc5a5422a6bedbb61d40">CAN_F7R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaacd1ef8f0870bc5a5422a6bedbb61d40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf56408d9914f566396d64609830e2d4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf56408d9914f566396d64609830e2d4f">CAN_F7R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gaf56408d9914f566396d64609830e2d4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65947100832111c7fb427d1982f801eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65947100832111c7fb427d1982f801eb">CAN_F7R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga65947100832111c7fb427d1982f801eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga175ed9cdbbf756ec76b9c6fb1f69adff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga175ed9cdbbf756ec76b9c6fb1f69adff">CAN_F7R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga175ed9cdbbf756ec76b9c6fb1f69adff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91af48b8cd11f119d257311dcf2cc291"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91af48b8cd11f119d257311dcf2cc291">CAN_F7R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga91af48b8cd11f119d257311dcf2cc291"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7108bc449a6e328748dd8d2209b83753"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7108bc449a6e328748dd8d2209b83753">CAN_F7R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga7108bc449a6e328748dd8d2209b83753"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc47acac1bb59603f58d9aef661d9334"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc47acac1bb59603f58d9aef661d9334">CAN_F7R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:gacc47acac1bb59603f58d9aef661d9334"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b07b4ebfaac9e60d6042b1bff98ec33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b07b4ebfaac9e60d6042b1bff98ec33">CAN_F7R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga7b07b4ebfaac9e60d6042b1bff98ec33"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3328e95d8ae911adc0e5dd4128f8161"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3328e95d8ae911adc0e5dd4128f8161">CAN_F7R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gad3328e95d8ae911adc0e5dd4128f8161"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga473e4917f35772cd08b06e166d6e475e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga473e4917f35772cd08b06e166d6e475e">CAN_F7R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga473e4917f35772cd08b06e166d6e475e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf40a4dd0979fb7ffba4b4192fe6dde5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf40a4dd0979fb7ffba4b4192fe6dde5f">CAN_F7R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaf40a4dd0979fb7ffba4b4192fe6dde5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5854aa102655334a6242e43c0b25aede"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5854aa102655334a6242e43c0b25aede">CAN_F7R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga5854aa102655334a6242e43c0b25aede"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga505dbdeaf89d103795046fb689b81664"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga505dbdeaf89d103795046fb689b81664">CAN_F7R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga505dbdeaf89d103795046fb689b81664"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga692f7a0bbc73be14e9d554394dceb176"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga692f7a0bbc73be14e9d554394dceb176">CAN_F7R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga692f7a0bbc73be14e9d554394dceb176"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a93f243e7acf3f749f2b6ec8ae7bc5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a93f243e7acf3f749f2b6ec8ae7bc5f">CAN_F7R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga5a93f243e7acf3f749f2b6ec8ae7bc5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68815c969c231268a63c8809a55bc866"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68815c969c231268a63c8809a55bc866">CAN_F7R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga68815c969c231268a63c8809a55bc866"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7055881b4a6d9fe51e8dcfb99a546139"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7055881b4a6d9fe51e8dcfb99a546139">CAN_F7R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga7055881b4a6d9fe51e8dcfb99a546139"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19ab918d9499635e8199a143833c6fdb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19ab918d9499635e8199a143833c6fdb">CAN_F7R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga19ab918d9499635e8199a143833c6fdb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8360f2a2ba21a1b2f361d4330026edfd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8360f2a2ba21a1b2f361d4330026edfd">CAN_F7R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga8360f2a2ba21a1b2f361d4330026edfd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga681e922052442801310265bab7356fc4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga681e922052442801310265bab7356fc4">CAN_F7R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga681e922052442801310265bab7356fc4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab12aa3a716a85bf96a1496ecaeae0cec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab12aa3a716a85bf96a1496ecaeae0cec">CAN_F7R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gab12aa3a716a85bf96a1496ecaeae0cec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6774583920f7cd42976daa4cf389eff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6774583920f7cd42976daa4cf389eff3">CAN_F7R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga6774583920f7cd42976daa4cf389eff3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9990b9fd20bbe0ff114acace0cb47ad7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9990b9fd20bbe0ff114acace0cb47ad7">CAN_F7R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga9990b9fd20bbe0ff114acace0cb47ad7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13cd870005a4712c3a8b9675a962c642"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13cd870005a4712c3a8b9675a962c642">CAN_F8R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga13cd870005a4712c3a8b9675a962c642"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49082d55960382ded8b2f7235dd3b33d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49082d55960382ded8b2f7235dd3b33d">CAN_F8R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga49082d55960382ded8b2f7235dd3b33d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdb99f376b40d3933ce6a28ad31f496a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdb99f376b40d3933ce6a28ad31f496a">CAN_F8R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:gafdb99f376b40d3933ce6a28ad31f496a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2cd97fc37fa6ffadbb7af4f9ddf1d014"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2cd97fc37fa6ffadbb7af4f9ddf1d014">CAN_F8R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga2cd97fc37fa6ffadbb7af4f9ddf1d014"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5842614b55172086992fc085955168d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5842614b55172086992fc085955168d7">CAN_F8R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga5842614b55172086992fc085955168d7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga373c77cab88912e816a6e12195bd3205"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga373c77cab88912e816a6e12195bd3205">CAN_F8R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga373c77cab88912e816a6e12195bd3205"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5937607627dd44c4fb79f9063534e2b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5937607627dd44c4fb79f9063534e2b1">CAN_F8R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga5937607627dd44c4fb79f9063534e2b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b6765194a47f1a6d7dfbf78e0b4139c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b6765194a47f1a6d7dfbf78e0b4139c">CAN_F8R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga5b6765194a47f1a6d7dfbf78e0b4139c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa79159b413994d12b593cc4f1b23d1fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa79159b413994d12b593cc4f1b23d1fa">CAN_F8R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:gaa79159b413994d12b593cc4f1b23d1fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b959e903cdac33f5da71aa5c7477a0d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b959e903cdac33f5da71aa5c7477a0d">CAN_F8R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga2b959e903cdac33f5da71aa5c7477a0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5de7f304ca7bfcb9e78c9c2d346d300"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5de7f304ca7bfcb9e78c9c2d346d300">CAN_F8R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gab5de7f304ca7bfcb9e78c9c2d346d300"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d5a19fa7032ef2b68e2feebd0db15e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d5a19fa7032ef2b68e2feebd0db15e6">CAN_F8R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga0d5a19fa7032ef2b68e2feebd0db15e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga943a685663474ed7aa509eaccbda2ffb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga943a685663474ed7aa509eaccbda2ffb">CAN_F8R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga943a685663474ed7aa509eaccbda2ffb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga668cb8a75c4166b5287a09ba98c8ec70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga668cb8a75c4166b5287a09ba98c8ec70">CAN_F8R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga668cb8a75c4166b5287a09ba98c8ec70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga84727d6a0fdcb2870529d7a371a0b660"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga84727d6a0fdcb2870529d7a371a0b660">CAN_F8R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga84727d6a0fdcb2870529d7a371a0b660"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9eb9c851eb03c49bc02f686aee490a28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9eb9c851eb03c49bc02f686aee490a28">CAN_F8R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga9eb9c851eb03c49bc02f686aee490a28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ccc46770c70da8546bbbcf492bcdd95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4ccc46770c70da8546bbbcf492bcdd95">CAN_F8R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga4ccc46770c70da8546bbbcf492bcdd95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf24b0628e89b2c27cb9e13b0492876eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf24b0628e89b2c27cb9e13b0492876eb">CAN_F8R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:gaf24b0628e89b2c27cb9e13b0492876eb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga36b946c123c3c3f1cdbd1272db24c58b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36b946c123c3c3f1cdbd1272db24c58b">CAN_F8R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga36b946c123c3c3f1cdbd1272db24c58b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab91129b8b7746111a31a968c1f1a8b19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab91129b8b7746111a31a968c1f1a8b19">CAN_F8R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gab91129b8b7746111a31a968c1f1a8b19"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga19663b29868ae926896961451768d748"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19663b29868ae926896961451768d748">CAN_F8R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga19663b29868ae926896961451768d748"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19d8c89621a78de5177481d217bb5033"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19d8c89621a78de5177481d217bb5033">CAN_F8R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:ga19d8c89621a78de5177481d217bb5033"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gab265fadfeb8674b869264ad25bedcac4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab265fadfeb8674b869264ad25bedcac4">CAN_F8R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gab265fadfeb8674b869264ad25bedcac4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga102fdb92fecd6aa86e5dbd2fea2b2e79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga102fdb92fecd6aa86e5dbd2fea2b2e79">CAN_F8R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga102fdb92fecd6aa86e5dbd2fea2b2e79"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0b73f4ab4941e6d920e75f7197ed025b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b73f4ab4941e6d920e75f7197ed025b">CAN_F8R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga0b73f4ab4941e6d920e75f7197ed025b"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9d72a1b4728fa13d4a2a3f7478f8398b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9d72a1b4728fa13d4a2a3f7478f8398b">CAN_F8R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga9d72a1b4728fa13d4a2a3f7478f8398b"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5826d272442cf9b69336172a039bc439"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5826d272442cf9b69336172a039bc439">CAN_F8R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga5826d272442cf9b69336172a039bc439"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gacdb656881f89c0da122383403a816ce1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacdb656881f89c0da122383403a816ce1">CAN_F8R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:gacdb656881f89c0da122383403a816ce1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d8c536aab73553ff1913ba806be351c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d8c536aab73553ff1913ba806be351c">CAN_F8R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="memitem:ga8fb8328cdbf23c9982b769bd39a24113"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8fb8328cdbf23c9982b769bd39a24113">CAN_F8R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="memitem:ga78861665c78657330f9fcfc17283529f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78861665c78657330f9fcfc17283529f">CAN_F8R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga78861665c78657330f9fcfc17283529f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b2fa38175302b2d91f2b45ae16c5db7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b2fa38175302b2d91f2b45ae16c5db7">CAN_F8R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga6b2fa38175302b2d91f2b45ae16c5db7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga930a17d830cb9a95a79531dac2220785"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga930a17d830cb9a95a79531dac2220785">CAN_F9R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:ga8671eac978ebea75e6345adbcdf78026"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8671eac978ebea75e6345adbcdf78026">CAN_F9R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga8671eac978ebea75e6345adbcdf78026"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee3585fb5ee4081dffeb2a2dda1ce72f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaee3585fb5ee4081dffeb2a2dda1ce72f">CAN_F9R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaee3585fb5ee4081dffeb2a2dda1ce72f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga807e831fafa69e9df65618de855ea186"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga807e831fafa69e9df65618de855ea186">CAN_F9R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga807e831fafa69e9df65618de855ea186"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddce646e28626a508b2f98c4f35148b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaddce646e28626a508b2f98c4f35148b3">CAN_F9R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaddce646e28626a508b2f98c4f35148b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ea72662e0243714ace5c0b48e7912f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ea72662e0243714ace5c0b48e7912f6">CAN_F9R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga9ea72662e0243714ace5c0b48e7912f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b08ddbc0bed91c6a1933e6485ded5e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b08ddbc0bed91c6a1933e6485ded5e2">CAN_F9R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga6b08ddbc0bed91c6a1933e6485ded5e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae21fd9c8c790d4bc229c7ccb6d99dd36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae21fd9c8c790d4bc229c7ccb6d99dd36">CAN_F9R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gae21fd9c8c790d4bc229c7ccb6d99dd36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf1a8f02576caccfddc12f2ead734762"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf1a8f02576caccfddc12f2ead734762">CAN_F9R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gadf1a8f02576caccfddc12f2ead734762"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80a2594aaa275fd88225927e7115085b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80a2594aaa275fd88225927e7115085b">CAN_F9R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga80a2594aaa275fd88225927e7115085b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3db445a3214057317d84269116c9a3de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3db445a3214057317d84269116c9a3de">CAN_F9R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga3db445a3214057317d84269116c9a3de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf09c1d038af593122315a878c15f608"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf09c1d038af593122315a878c15f608">CAN_F9R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gadf09c1d038af593122315a878c15f608"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12b2a29143ddf47eb1eddf76f9289cb9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12b2a29143ddf47eb1eddf76f9289cb9">CAN_F9R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga12b2a29143ddf47eb1eddf76f9289cb9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga691bc907b71c30dffdf246c95240ac9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga691bc907b71c30dffdf246c95240ac9b">CAN_F9R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga691bc907b71c30dffdf246c95240ac9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf8669ceaa46f5aecada88accedfb4dbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf8669ceaa46f5aecada88accedfb4dbb">CAN_F9R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gaf8669ceaa46f5aecada88accedfb4dbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35e8769a1e21c4cf3714667e07201804"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga35e8769a1e21c4cf3714667e07201804">CAN_F9R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga35e8769a1e21c4cf3714667e07201804"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7060a1863aa5b08ce8469001d46c630"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7060a1863aa5b08ce8469001d46c630">CAN_F9R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gad7060a1863aa5b08ce8469001d46c630"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf015fb7231bd315f82948019dcfc725"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf015fb7231bd315f82948019dcfc725">CAN_F9R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gacf015fb7231bd315f82948019dcfc725"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga02c06b01abb3414394747a7cf8eac888"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga02c06b01abb3414394747a7cf8eac888">CAN_F9R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga02c06b01abb3414394747a7cf8eac888"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99a1a20417252e33a4817c0530745239"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99a1a20417252e33a4817c0530745239">CAN_F9R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga99a1a20417252e33a4817c0530745239"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09c0f503e2ef85b3b6332ccbca7b0251"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09c0f503e2ef85b3b6332ccbca7b0251">CAN_F9R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga09c0f503e2ef85b3b6332ccbca7b0251"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacab12d06dee3d6dad5fd7c56c23c70d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacab12d06dee3d6dad5fd7c56c23c70d1">CAN_F9R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gacab12d06dee3d6dad5fd7c56c23c70d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c72a8d17db1de69086f19579b169c04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c72a8d17db1de69086f19579b169c04">CAN_F9R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga5c72a8d17db1de69086f19579b169c04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bb3ba674ec6c82ed108f6c0bfb2f854"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bb3ba674ec6c82ed108f6c0bfb2f854">CAN_F9R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga4bb3ba674ec6c82ed108f6c0bfb2f854"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba13bd7fa1e4c2eaef3de31d933cbc10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaba13bd7fa1e4c2eaef3de31d933cbc10">CAN_F9R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gaba13bd7fa1e4c2eaef3de31d933cbc10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa72247fe16d8f777c26726063fa43536"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa72247fe16d8f777c26726063fa43536">CAN_F9R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaa72247fe16d8f777c26726063fa43536"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga32d7c1678449ff8f4e4b6f548ba85be4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga32d7c1678449ff8f4e4b6f548ba85be4">CAN_F9R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga32d7c1678449ff8f4e4b6f548ba85be4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga678d4a0a39b379db5c2e0285782c686f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga678d4a0a39b379db5c2e0285782c686f">CAN_F9R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga678d4a0a39b379db5c2e0285782c686f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6033aa5f4d140dc48ddb4a777583163c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6033aa5f4d140dc48ddb4a777583163c">CAN_F9R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga6033aa5f4d140dc48ddb4a777583163c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fda159c684d7361094da1883473b544"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fda159c684d7361094da1883473b544">CAN_F9R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga9fda159c684d7361094da1883473b544"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83cf4080564c51a0123b97840576c0ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83cf4080564c51a0123b97840576c0ab">CAN_F9R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga83cf4080564c51a0123b97840576c0ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga127c155bc5c5236f04cfdcf96ff66cc5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga127c155bc5c5236f04cfdcf96ff66cc5">CAN_F9R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga127c155bc5c5236f04cfdcf96ff66cc5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d5b5b7bc147da430d9c8fbe03679ca3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d5b5b7bc147da430d9c8fbe03679ca3">CAN_F10R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga1d5b5b7bc147da430d9c8fbe03679ca3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3ed7be0180fd7096f10cfde27261ecc9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ed7be0180fd7096f10cfde27261ecc9">CAN_F10R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga3ed7be0180fd7096f10cfde27261ecc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad099442eb6b71912a81d1f6fccbaec0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad099442eb6b71912a81d1f6fccbaec0a">CAN_F10R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gad099442eb6b71912a81d1f6fccbaec0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4024c53b7b0cec550baed99ae92e3465"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4024c53b7b0cec550baed99ae92e3465">CAN_F10R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga4024c53b7b0cec550baed99ae92e3465"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1859eaac9ae1220c752218e5ad526179"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1859eaac9ae1220c752218e5ad526179">CAN_F10R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga1859eaac9ae1220c752218e5ad526179"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5683dc25f0aae9a802a5f57c88bec856"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5683dc25f0aae9a802a5f57c88bec856">CAN_F10R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga5683dc25f0aae9a802a5f57c88bec856"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae83dd9ce8a2c7917e278ce4755f8f43e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae83dd9ce8a2c7917e278ce4755f8f43e">CAN_F10R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gae83dd9ce8a2c7917e278ce4755f8f43e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93ad070c9f5abca3c9b9095e3a13db9c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93ad070c9f5abca3c9b9095e3a13db9c">CAN_F10R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga93ad070c9f5abca3c9b9095e3a13db9c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd32db3ffec3536cd842e17c34c210d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd32db3ffec3536cd842e17c34c210d9">CAN_F10R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gadd32db3ffec3536cd842e17c34c210d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga85673ce7a92ae8ca9a13ed2fb5574a76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga85673ce7a92ae8ca9a13ed2fb5574a76">CAN_F10R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga85673ce7a92ae8ca9a13ed2fb5574a76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d525825fe4bfc1d4ffccc21ab89a3fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d525825fe4bfc1d4ffccc21ab89a3fa">CAN_F10R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga6d525825fe4bfc1d4ffccc21ab89a3fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga33336e283eeee9b77f1f289d77f2304e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga33336e283eeee9b77f1f289d77f2304e">CAN_F10R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga33336e283eeee9b77f1f289d77f2304e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf74ee01e72b3de69d6e8fcc092f7461"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf74ee01e72b3de69d6e8fcc092f7461">CAN_F10R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gadf74ee01e72b3de69d6e8fcc092f7461"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8ee416ff22b47bb289bab34afbc74f19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8ee416ff22b47bb289bab34afbc74f19">CAN_F10R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga8ee416ff22b47bb289bab34afbc74f19"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga97a8d8586c64910b0f6c09fef44c4ea7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97a8d8586c64910b0f6c09fef44c4ea7">CAN_F10R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga97a8d8586c64910b0f6c09fef44c4ea7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9e8e43adc56ba1e593b97e062c79075"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9e8e43adc56ba1e593b97e062c79075">CAN_F10R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gab9e8e43adc56ba1e593b97e062c79075"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa64a0b16c073b51cb5e90b94c638fd95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa64a0b16c073b51cb5e90b94c638fd95">CAN_F10R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaa64a0b16c073b51cb5e90b94c638fd95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65f5cc396cfcf3bad71a71326e64f7d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65f5cc396cfcf3bad71a71326e64f7d9">CAN_F10R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga65f5cc396cfcf3bad71a71326e64f7d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga424940f535aa9a1520e25df53673d01f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga424940f535aa9a1520e25df53673d01f">CAN_F10R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga424940f535aa9a1520e25df53673d01f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga166a4035770c58147d583c3dc571d10a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga166a4035770c58147d583c3dc571d10a">CAN_F10R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga166a4035770c58147d583c3dc571d10a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga302214ece439e8913b47949bd07d118a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga302214ece439e8913b47949bd07d118a">CAN_F10R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga302214ece439e8913b47949bd07d118a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9abe6ae1dcb2bd140e7e28d37fd8abb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9abe6ae1dcb2bd140e7e28d37fd8abb">CAN_F10R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gad9abe6ae1dcb2bd140e7e28d37fd8abb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99063956b41c4dcf6c78cc29305b1cd1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99063956b41c4dcf6c78cc29305b1cd1">CAN_F10R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga99063956b41c4dcf6c78cc29305b1cd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81ae64786c3a83bdd21cf72c560c7c1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81ae64786c3a83bdd21cf72c560c7c1e">CAN_F10R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga81ae64786c3a83bdd21cf72c560c7c1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f9083faf8395701c892814694b45d2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f9083faf8395701c892814694b45d2c">CAN_F10R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga0f9083faf8395701c892814694b45d2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaeb6942affe306b407940fdf01534e4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaeb6942affe306b407940fdf01534e4a">CAN_F10R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:gaaeb6942affe306b407940fdf01534e4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e4ee946a9614316f666852bc266c1f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e4ee946a9614316f666852bc266c1f7">CAN_F10R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga1e4ee946a9614316f666852bc266c1f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99153cddc8fc7e846fcc44383936541f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99153cddc8fc7e846fcc44383936541f">CAN_F10R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga99153cddc8fc7e846fcc44383936541f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e2ba1740577246368e60d94fd3d7c69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e2ba1740577246368e60d94fd3d7c69">CAN_F10R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga0e2ba1740577246368e60d94fd3d7c69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaca062686821fba26a0e5e5b0a6c5b855"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca062686821fba26a0e5e5b0a6c5b855">CAN_F10R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:gaca062686821fba26a0e5e5b0a6c5b855"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8981f420ef4c8fe1976a09f27a9c13f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8981f420ef4c8fe1976a09f27a9c13f1">CAN_F10R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:ga8981f420ef4c8fe1976a09f27a9c13f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0424bf38917058b166a8bfd861d22b40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0424bf38917058b166a8bfd861d22b40">CAN_F10R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:ga0424bf38917058b166a8bfd861d22b40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad059cc9b2fe5634b9330b44c37dadf06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad059cc9b2fe5634b9330b44c37dadf06">CAN_F11R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gad059cc9b2fe5634b9330b44c37dadf06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad74b116cda63fcd1a662c4de835616e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad74b116cda63fcd1a662c4de835616e7">CAN_F11R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gad74b116cda63fcd1a662c4de835616e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e05bb0c2a5bdcebb974f7dd409724bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e05bb0c2a5bdcebb974f7dd409724bc">CAN_F11R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga4e05bb0c2a5bdcebb974f7dd409724bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa17242aed4365034dc660ef9e8b9f1bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa17242aed4365034dc660ef9e8b9f1bf">CAN_F11R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gaa17242aed4365034dc660ef9e8b9f1bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga450dbed19882423d70ed7606aada2453"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga450dbed19882423d70ed7606aada2453">CAN_F11R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga450dbed19882423d70ed7606aada2453"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7ace73f2d3db1e2a1e55257d210fa04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7ace73f2d3db1e2a1e55257d210fa04">CAN_F11R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gad7ace73f2d3db1e2a1e55257d210fa04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1459d395a3b08a948c3f5002e0914516"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1459d395a3b08a948c3f5002e0914516">CAN_F11R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga1459d395a3b08a948c3f5002e0914516"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30fc2236c2a18b7cb6e493fad36d8efe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30fc2236c2a18b7cb6e493fad36d8efe">CAN_F11R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga30fc2236c2a18b7cb6e493fad36d8efe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74ab4a6f6b5a751acda410e0c39b87af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74ab4a6f6b5a751acda410e0c39b87af">CAN_F11R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga74ab4a6f6b5a751acda410e0c39b87af"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4e69f7001534264fd027371fa188ac52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e69f7001534264fd027371fa188ac52">CAN_F11R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga4e69f7001534264fd027371fa188ac52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e858dd29f741910c8ed8c512cae81b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e858dd29f741910c8ed8c512cae81b1">CAN_F11R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga1e858dd29f741910c8ed8c512cae81b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6ba167c6cd5bc080065430e24c3a866"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6ba167c6cd5bc080065430e24c3a866">CAN_F11R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:gaf6ba167c6cd5bc080065430e24c3a866"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4629ab1e8632c82f3fb2648a574963b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4629ab1e8632c82f3fb2648a574963b1">CAN_F11R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga4629ab1e8632c82f3fb2648a574963b1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga833c408a165cc4ac87a242c08d4ba9b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga833c408a165cc4ac87a242c08d4ba9b9">CAN_F11R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga833c408a165cc4ac87a242c08d4ba9b9"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gabfecd6bbe1a15cd341942d1840b476cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabfecd6bbe1a15cd341942d1840b476cc">CAN_F11R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gabfecd6bbe1a15cd341942d1840b476cc"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf50e1747d1d9369b7b22c5d591ae82b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf50e1747d1d9369b7b22c5d591ae82b9">CAN_F11R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:gaf50e1747d1d9369b7b22c5d591ae82b9"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga603d63333a621594a15696cb03f59eeb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga603d63333a621594a15696cb03f59eeb">CAN_F11R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga603d63333a621594a15696cb03f59eeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb361a00177e6aa2ee19aa5a2d1781aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb361a00177e6aa2ee19aa5a2d1781aa">CAN_F11R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gadb361a00177e6aa2ee19aa5a2d1781aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf111110e0f5dbda31962f7732e3480c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf111110e0f5dbda31962f7732e3480c7">CAN_F11R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gaf111110e0f5dbda31962f7732e3480c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf2c4828b07b2b315d27b382818de285"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabf2c4828b07b2b315d27b382818de285">CAN_F11R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gabf2c4828b07b2b315d27b382818de285"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5afa52941bb68a03ec9804b817d5a90e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5afa52941bb68a03ec9804b817d5a90e">CAN_F11R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga5afa52941bb68a03ec9804b817d5a90e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac042471dbcb1a32ce161f38a144ac5aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac042471dbcb1a32ce161f38a144ac5aa">CAN_F11R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gac042471dbcb1a32ce161f38a144ac5aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac46f233c9692cb2a2e246daf6547a38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac46f233c9692cb2a2e246daf6547a38">CAN_F11R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaac46f233c9692cb2a2e246daf6547a38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab8b379e3832482f2b18f01713d3338d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8b379e3832482f2b18f01713d3338d5">CAN_F11R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gab8b379e3832482f2b18f01713d3338d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60eabd8db9ec6b439d60dbc2374ce84d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60eabd8db9ec6b439d60dbc2374ce84d">CAN_F11R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga60eabd8db9ec6b439d60dbc2374ce84d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga351a183cfab10d3daab415c85cc16203"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga351a183cfab10d3daab415c85cc16203">CAN_F11R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga351a183cfab10d3daab415c85cc16203"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb854a85c7a575a45cdade37efb4edee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb854a85c7a575a45cdade37efb4edee">CAN_F11R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gabb854a85c7a575a45cdade37efb4edee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga131776c359f81500d3d2a97535d7e718"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga131776c359f81500d3d2a97535d7e718">CAN_F11R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga131776c359f81500d3d2a97535d7e718"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga680d7e4c7ebc431a8c72c00e9f110563"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga680d7e4c7ebc431a8c72c00e9f110563">CAN_F11R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga680d7e4c7ebc431a8c72c00e9f110563"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c1fa00ee18804c169541d18995dc3c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c1fa00ee18804c169541d18995dc3c1">CAN_F11R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga9c1fa00ee18804c169541d18995dc3c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec35d8d1097816c5ef8e28ff61469669"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec35d8d1097816c5ef8e28ff61469669">CAN_F11R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gaec35d8d1097816c5ef8e28ff61469669"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga96180b8c64aabd33f016fb97ba152f07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96180b8c64aabd33f016fb97ba152f07">CAN_F11R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga96180b8c64aabd33f016fb97ba152f07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaccbe3637fb55f28496ca7f692a69f6ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaccbe3637fb55f28496ca7f692a69f6ca">CAN_F12R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaccbe3637fb55f28496ca7f692a69f6ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae625d21947ae82cc3509b06363ad0635"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae625d21947ae82cc3509b06363ad0635">CAN_F12R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gae625d21947ae82cc3509b06363ad0635"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9de7cc313f2b6b16a564b13b1bc30157"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9de7cc313f2b6b16a564b13b1bc30157">CAN_F12R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga9de7cc313f2b6b16a564b13b1bc30157"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac039cc1ce2281cf10be62cbc44748f5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac039cc1ce2281cf10be62cbc44748f5f">CAN_F12R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gac039cc1ce2281cf10be62cbc44748f5f"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gabc3a35b6f6b3a46c176398ec322fd6fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc3a35b6f6b3a46c176398ec322fd6fb">CAN_F12R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gabc3a35b6f6b3a46c176398ec322fd6fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d005c10fe75169336104c3155294000"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d005c10fe75169336104c3155294000">CAN_F12R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga4d005c10fe75169336104c3155294000"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51256bfed734a95da3e7880e279432bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51256bfed734a95da3e7880e279432bf">CAN_F12R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga51256bfed734a95da3e7880e279432bf"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2c967f124b03968372d801e1393fa209"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c967f124b03968372d801e1393fa209">CAN_F12R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga2c967f124b03968372d801e1393fa209"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga592f9953deeb56888144c72060d04e24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga592f9953deeb56888144c72060d04e24">CAN_F12R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga592f9953deeb56888144c72060d04e24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d1613eac2aaeafda711cf3308ccd44c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d1613eac2aaeafda711cf3308ccd44c">CAN_F12R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga4d1613eac2aaeafda711cf3308ccd44c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1b8594ab0c5d9124accd2d6ca85cf4bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b8594ab0c5d9124accd2d6ca85cf4bd">CAN_F12R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga1b8594ab0c5d9124accd2d6ca85cf4bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4025ed76892f23e5a63d0d8ac6a2be5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4025ed76892f23e5a63d0d8ac6a2be5f">CAN_F12R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga4025ed76892f23e5a63d0d8ac6a2be5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e2e318cc14828c118bd40d982922e14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e2e318cc14828c118bd40d982922e14">CAN_F12R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga6e2e318cc14828c118bd40d982922e14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e0ff698b5e9f3f99a421166611b041d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e0ff698b5e9f3f99a421166611b041d">CAN_F12R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga4e0ff698b5e9f3f99a421166611b041d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b0666538a7646ddc0fcd882a261f5d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b0666538a7646ddc0fcd882a261f5d9">CAN_F12R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga6b0666538a7646ddc0fcd882a261f5d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga846d84b3d53e305b093198379f442528"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga846d84b3d53e305b093198379f442528">CAN_F12R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga846d84b3d53e305b093198379f442528"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7940c0898c2ef1d9f829bf1b6b5fcf3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7940c0898c2ef1d9f829bf1b6b5fcf3">CAN_F12R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:gad7940c0898c2ef1d9f829bf1b6b5fcf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6bdc7bd4dbad1f8e3bb622343bd7c522"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6bdc7bd4dbad1f8e3bb622343bd7c522">CAN_F12R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga6bdc7bd4dbad1f8e3bb622343bd7c522"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c870a6fbae41b4f1c6d66ab690789d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c870a6fbae41b4f1c6d66ab690789d6">CAN_F12R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga7c870a6fbae41b4f1c6d66ab690789d6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga09e179b38460e47b81616c46a5f356f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09e179b38460e47b81616c46a5f356f8">CAN_F12R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga09e179b38460e47b81616c46a5f356f8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad42e298d4d97c98cc5149bc552a598fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad42e298d4d97c98cc5149bc552a598fa">CAN_F12R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:gad42e298d4d97c98cc5149bc552a598fa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga318e2a6ae62d5172dcdb45e011d5e0c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga318e2a6ae62d5172dcdb45e011d5e0c4">CAN_F12R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga318e2a6ae62d5172dcdb45e011d5e0c4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga90e95cb0020289335acd5d7f4b62a880"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga90e95cb0020289335acd5d7f4b62a880">CAN_F12R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga90e95cb0020289335acd5d7f4b62a880"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e2720e18fdff00c9fb75d5136e485dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2e2720e18fdff00c9fb75d5136e485dc">CAN_F12R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga2e2720e18fdff00c9fb75d5136e485dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae4a87123ae5ff76992162152fbb4c92a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae4a87123ae5ff76992162152fbb4c92a">CAN_F12R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gae4a87123ae5ff76992162152fbb4c92a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9582717e16455f97c7dff65f7beadd6e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9582717e16455f97c7dff65f7beadd6e">CAN_F12R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga9582717e16455f97c7dff65f7beadd6e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf15e362beb5a3b733c08c8c2ab81efcb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf15e362beb5a3b733c08c8c2ab81efcb">CAN_F12R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaf15e362beb5a3b733c08c8c2ab81efcb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3d600a7a39c7069c216db511d3a5d866"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3d600a7a39c7069c216db511d3a5d866">CAN_F12R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga3d600a7a39c7069c216db511d3a5d866"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9a6addc248c6db2118d1ce6e049d331"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9a6addc248c6db2118d1ce6e049d331">CAN_F12R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gab9a6addc248c6db2118d1ce6e049d331"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31d3a46845cd9ca6670472aae2aa2ebe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31d3a46845cd9ca6670472aae2aa2ebe">CAN_F12R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga31d3a46845cd9ca6670472aae2aa2ebe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa06596dcbb545fbeea2ec20f629d9555"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa06596dcbb545fbeea2ec20f629d9555">CAN_F12R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gaa06596dcbb545fbeea2ec20f629d9555"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac441b11b1be9b3608b9a09c2b8069722"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac441b11b1be9b3608b9a09c2b8069722">CAN_F12R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:gac441b11b1be9b3608b9a09c2b8069722"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa20d063950ad122a1965527a17d93c37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa20d063950ad122a1965527a17d93c37">CAN_F13R1_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaa20d063950ad122a1965527a17d93c37"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf60decd61c8a8dc9e4342de8ad67ea76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf60decd61c8a8dc9e4342de8ad67ea76">CAN_F13R1_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaf60decd61c8a8dc9e4342de8ad67ea76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7863b3af06385d0e9037c57a5d2091e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7863b3af06385d0e9037c57a5d2091e2">CAN_F13R1_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga7863b3af06385d0e9037c57a5d2091e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga043282b30813ce88dbdb320936ff6aca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga043282b30813ce88dbdb320936ff6aca">CAN_F13R1_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga043282b30813ce88dbdb320936ff6aca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3bbc9e9866f20d9d2f3cea1c6777c673"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3bbc9e9866f20d9d2f3cea1c6777c673">CAN_F13R1_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga3bbc9e9866f20d9d2f3cea1c6777c673"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga885b36e017b013ab6deedd91d9ac2c66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga885b36e017b013ab6deedd91d9ac2c66">CAN_F13R1_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga885b36e017b013ab6deedd91d9ac2c66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa389b53582e5cacf326fff4512626d68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa389b53582e5cacf326fff4512626d68">CAN_F13R1_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaa389b53582e5cacf326fff4512626d68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad09b75feeda08b16962db7da6a32dc9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad09b75feeda08b16962db7da6a32dc9b">CAN_F13R1_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gad09b75feeda08b16962db7da6a32dc9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaba75675c019979882ecd8c6ef82d7a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaba75675c019979882ecd8c6ef82d7a4">CAN_F13R1_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaaba75675c019979882ecd8c6ef82d7a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac579473f666edec0e0fcce278b642a9d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac579473f666edec0e0fcce278b642a9d">CAN_F13R1_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gac579473f666edec0e0fcce278b642a9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga14640c225c434428ef1870f462eb9bbd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14640c225c434428ef1870f462eb9bbd">CAN_F13R1_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga14640c225c434428ef1870f462eb9bbd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d8c9f5879cc4e31fe2e63f82febbc69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d8c9f5879cc4e31fe2e63f82febbc69">CAN_F13R1_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga7d8c9f5879cc4e31fe2e63f82febbc69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e0e3cfe033bb34f62312cfe47d1b84a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e0e3cfe033bb34f62312cfe47d1b84a">CAN_F13R1_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga8e0e3cfe033bb34f62312cfe47d1b84a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93d91a28c1ffca3f72f10e0b44040791"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93d91a28c1ffca3f72f10e0b44040791">CAN_F13R1_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga93d91a28c1ffca3f72f10e0b44040791"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga355b438a5abccec89e13bdd00206b36f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga355b438a5abccec89e13bdd00206b36f">CAN_F13R1_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga355b438a5abccec89e13bdd00206b36f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89b23d147d2c040eb2317633b3ef46da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89b23d147d2c040eb2317633b3ef46da">CAN_F13R1_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga89b23d147d2c040eb2317633b3ef46da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81d184cd46306fe24b46087a90e8f8f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81d184cd46306fe24b46087a90e8f8f2">CAN_F13R1_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga81d184cd46306fe24b46087a90e8f8f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga151a0e903046edc92bddcd0ef4a23449"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga151a0e903046edc92bddcd0ef4a23449">CAN_F13R1_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga151a0e903046edc92bddcd0ef4a23449"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e95e6d0d060fb2cfdf31e1b5fdfe3de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e95e6d0d060fb2cfdf31e1b5fdfe3de">CAN_F13R1_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga9e95e6d0d060fb2cfdf31e1b5fdfe3de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e0fb1cf032c57f954dd2679a05f8115"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e0fb1cf032c57f954dd2679a05f8115">CAN_F13R1_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga1e0fb1cf032c57f954dd2679a05f8115"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeb775bb1ded6a8f55f2a0849bec2eeac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeb775bb1ded6a8f55f2a0849bec2eeac">CAN_F13R1_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaeb775bb1ded6a8f55f2a0849bec2eeac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8743dfb60255d98911ea66605efd3b2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8743dfb60255d98911ea66605efd3b2f">CAN_F13R1_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga8743dfb60255d98911ea66605efd3b2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga54b067c38f3be3ad6041ea12fec15700"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga54b067c38f3be3ad6041ea12fec15700">CAN_F13R1_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga54b067c38f3be3ad6041ea12fec15700"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00fe1942d9a8767a76f139bd74eafea0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00fe1942d9a8767a76f139bd74eafea0">CAN_F13R1_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga00fe1942d9a8767a76f139bd74eafea0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05db1c0a2e6e051d616b59f386dc7b1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05db1c0a2e6e051d616b59f386dc7b1e">CAN_F13R1_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga05db1c0a2e6e051d616b59f386dc7b1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66dd0da9fd8ef27b30f1ad56a9982caf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66dd0da9fd8ef27b30f1ad56a9982caf">CAN_F13R1_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga66dd0da9fd8ef27b30f1ad56a9982caf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3b8381bc6ce5ab107cc1a92e565387a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3b8381bc6ce5ab107cc1a92e565387a">CAN_F13R1_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:gaf3b8381bc6ce5ab107cc1a92e565387a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91c99de5ae099ecdee50ebd62e552df5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91c99de5ae099ecdee50ebd62e552df5">CAN_F13R1_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga91c99de5ae099ecdee50ebd62e552df5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83713f9e2c3c90f001ab378d9ca1f488"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83713f9e2c3c90f001ab378d9ca1f488">CAN_F13R1_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga83713f9e2c3c90f001ab378d9ca1f488"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga050fb1e9555d0d24f81682e194677684"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga050fb1e9555d0d24f81682e194677684">CAN_F13R1_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga050fb1e9555d0d24f81682e194677684"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga761164856a25bc246396c7c82fdeb447"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga761164856a25bc246396c7c82fdeb447">CAN_F13R1_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga761164856a25bc246396c7c82fdeb447"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a750d71e94876d2f6e73a0e8b7217b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a750d71e94876d2f6e73a0e8b7217b2">CAN_F13R1_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:ga1a750d71e94876d2f6e73a0e8b7217b2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga34282ddec559ecea4b613f2430334237"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34282ddec559ecea4b613f2430334237">CAN_F0R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga34282ddec559ecea4b613f2430334237"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f23fc3814e0eb6af35c01e22c5dc6a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f23fc3814e0eb6af35c01e22c5dc6a7">CAN_F0R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga6f23fc3814e0eb6af35c01e22c5dc6a7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga82ee32b6ec44d763b4364fa032d3439c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga82ee32b6ec44d763b4364fa032d3439c">CAN_F0R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga82ee32b6ec44d763b4364fa032d3439c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7867b1d377088c63cdcc615932101997"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7867b1d377088c63cdcc615932101997">CAN_F0R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga7867b1d377088c63cdcc615932101997"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37fc5c9115eb669f1ac493b1c7296250"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37fc5c9115eb669f1ac493b1c7296250">CAN_F0R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga37fc5c9115eb669f1ac493b1c7296250"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae04b27aad09a3027f20a4eb48884c463"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae04b27aad09a3027f20a4eb48884c463">CAN_F0R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gae04b27aad09a3027f20a4eb48884c463"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae58d87c9513c11593041c3d43b955e8b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae58d87c9513c11593041c3d43b955e8b">CAN_F0R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gae58d87c9513c11593041c3d43b955e8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03a6328d408b8015bb472c76f96a4dd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03a6328d408b8015bb472c76f96a4dd8">CAN_F0R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga03a6328d408b8015bb472c76f96a4dd8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga92fd1acf48665f966b670a0457456deb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga92fd1acf48665f966b670a0457456deb">CAN_F0R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga92fd1acf48665f966b670a0457456deb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa853cff5493c4e857b7bb1ad28678ed4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa853cff5493c4e857b7bb1ad28678ed4">CAN_F0R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaa853cff5493c4e857b7bb1ad28678ed4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa43bba65dd777c71e07130fde3fa6216"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa43bba65dd777c71e07130fde3fa6216">CAN_F0R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaa43bba65dd777c71e07130fde3fa6216"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9077b9c35c6721d2a0e090a42af0eaaf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9077b9c35c6721d2a0e090a42af0eaaf">CAN_F0R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga9077b9c35c6721d2a0e090a42af0eaaf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23af8df7d4e843a6e196b1542421ef45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23af8df7d4e843a6e196b1542421ef45">CAN_F0R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga23af8df7d4e843a6e196b1542421ef45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0fe7776af3adce7d203aeb16d55d86d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0fe7776af3adce7d203aeb16d55d86d4">CAN_F0R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga0fe7776af3adce7d203aeb16d55d86d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81168efb90a776e44a96d1fe5e3b88c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81168efb90a776e44a96d1fe5e3b88c3">CAN_F0R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga81168efb90a776e44a96d1fe5e3b88c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9708e7cde70a19e8e8fa33291e1b9d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9708e7cde70a19e8e8fa33291e1b9d5">CAN_F0R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gae9708e7cde70a19e8e8fa33291e1b9d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2f2154c3030cebcfc3f1e4aed74fbf1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2f2154c3030cebcfc3f1e4aed74fbf1">CAN_F0R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gab2f2154c3030cebcfc3f1e4aed74fbf1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae87c14b75911aa0a9d0349d02d342711"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae87c14b75911aa0a9d0349d02d342711">CAN_F0R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gae87c14b75911aa0a9d0349d02d342711"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6fd7859cfc05300f68b175f520ddc31e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fd7859cfc05300f68b175f520ddc31e">CAN_F0R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga6fd7859cfc05300f68b175f520ddc31e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaea36db8fcada46357137efeea256457"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaea36db8fcada46357137efeea256457">CAN_F0R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaaea36db8fcada46357137efeea256457"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga57872dcfea1f8a56170640842edf9c1a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga57872dcfea1f8a56170640842edf9c1a">CAN_F0R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga57872dcfea1f8a56170640842edf9c1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc01e7f26d0e85da93ca78d0d71a4fed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc01e7f26d0e85da93ca78d0d71a4fed">CAN_F0R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gacc01e7f26d0e85da93ca78d0d71a4fed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07d8c3c8c3eb3c97b5979388c548e2fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07d8c3c8c3eb3c97b5979388c548e2fc">CAN_F0R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:ga07d8c3c8c3eb3c97b5979388c548e2fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade31bd75624afeaef9b5ab45a5057db9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade31bd75624afeaef9b5ab45a5057db9">CAN_F0R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gade31bd75624afeaef9b5ab45a5057db9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa78ff8fcfe0f14655aaf94ecc92d7532"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa78ff8fcfe0f14655aaf94ecc92d7532">CAN_F0R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gaa78ff8fcfe0f14655aaf94ecc92d7532"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad577ebd9a8cedd1b8b13d5a41d2fbab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad577ebd9a8cedd1b8b13d5a41d2fbab">CAN_F0R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:gaad577ebd9a8cedd1b8b13d5a41d2fbab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab814105bcd2a2c636c26197b21ead2b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab814105bcd2a2c636c26197b21ead2b0">CAN_F0R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:gab814105bcd2a2c636c26197b21ead2b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea82daeaa71ecddb187613df9517e51c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea82daeaa71ecddb187613df9517e51c">CAN_F0R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:gaea82daeaa71ecddb187613df9517e51c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef5036edf5bd310e5e06f3ea5cb818a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef5036edf5bd310e5e06f3ea5cb818a2">CAN_F0R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gaef5036edf5bd310e5e06f3ea5cb818a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0c2db96ddbcfa1b838c283e20ca554b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0c2db96ddbcfa1b838c283e20ca554b">CAN_F0R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaa0c2db96ddbcfa1b838c283e20ca554b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5afb46a2d4ccb3f28e8579b26e2b2e2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5afb46a2d4ccb3f28e8579b26e2b2e2e">CAN_F0R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:ga5afb46a2d4ccb3f28e8579b26e2b2e2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ace83e798931f35c123507e1ef59fbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ace83e798931f35c123507e1ef59fbb">CAN_F0R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga1ace83e798931f35c123507e1ef59fbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ea3c5d8ab8962d9cd0e2b067167d3d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ea3c5d8ab8962d9cd0e2b067167d3d4">CAN_F1R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga7ea3c5d8ab8962d9cd0e2b067167d3d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacfa5449488e7330d8f11f75fcf3e75cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacfa5449488e7330d8f11f75fcf3e75cd">CAN_F1R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gacfa5449488e7330d8f11f75fcf3e75cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe49a3e224459f1bd9b3279ebfa8803b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe49a3e224459f1bd9b3279ebfa8803b">CAN_F1R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gafe49a3e224459f1bd9b3279ebfa8803b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga77cf2217ec29e2043bada827249dedd5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga77cf2217ec29e2043bada827249dedd5">CAN_F1R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga77cf2217ec29e2043bada827249dedd5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf35643f0148ed0f93e3ba52e95a4cf6b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf35643f0148ed0f93e3ba52e95a4cf6b">CAN_F1R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaf35643f0148ed0f93e3ba52e95a4cf6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae08798adabd9cc0fb2b07eaff6444878"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae08798adabd9cc0fb2b07eaff6444878">CAN_F1R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gae08798adabd9cc0fb2b07eaff6444878"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga06659c9a418d7f4a8729d87bc397be23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga06659c9a418d7f4a8729d87bc397be23">CAN_F1R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga06659c9a418d7f4a8729d87bc397be23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga36bb9ca8dadd6714052f8d31cb01cb7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36bb9ca8dadd6714052f8d31cb01cb7b">CAN_F1R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga36bb9ca8dadd6714052f8d31cb01cb7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d400044261146be3deb722d9cf3d5c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d400044261146be3deb722d9cf3d5c1">CAN_F1R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga2d400044261146be3deb722d9cf3d5c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3e5769ea8faaed16c6cb2ce979d28a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3e5769ea8faaed16c6cb2ce979d28a9">CAN_F1R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gab3e5769ea8faaed16c6cb2ce979d28a9"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga915236a6b5081c2c30bd4d49144bc463"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga915236a6b5081c2c30bd4d49144bc463">CAN_F1R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga915236a6b5081c2c30bd4d49144bc463"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf1aa2e62d4eede199196f81795d309c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabf1aa2e62d4eede199196f81795d309c">CAN_F1R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:gabf1aa2e62d4eede199196f81795d309c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7db0ae3dcaab35e4c496c8a800b5c994"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7db0ae3dcaab35e4c496c8a800b5c994">CAN_F1R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga7db0ae3dcaab35e4c496c8a800b5c994"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga02cdb71c56a5d9994ecd2dee668c7184"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga02cdb71c56a5d9994ecd2dee668c7184">CAN_F1R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga02cdb71c56a5d9994ecd2dee668c7184"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac66691ca840db6c861460d311a942a87"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac66691ca840db6c861460d311a942a87">CAN_F1R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gac66691ca840db6c861460d311a942a87"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabcdd57022e26859db1f81f2df08c8725"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabcdd57022e26859db1f81f2df08c8725">CAN_F1R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gabcdd57022e26859db1f81f2df08c8725"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga211795b36769a0b87044f0d82a7a72b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga211795b36769a0b87044f0d82a7a72b1">CAN_F1R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga211795b36769a0b87044f0d82a7a72b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc8c427731f33c76fad0873bb29a4b4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc8c427731f33c76fad0873bb29a4b4c">CAN_F1R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gabc8c427731f33c76fad0873bb29a4b4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga10a3e6be9968b8007562e7afe6b3b342"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga10a3e6be9968b8007562e7afe6b3b342">CAN_F1R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga10a3e6be9968b8007562e7afe6b3b342"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4aac6ab4bd4cdeecbe621adf1d11b95a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4aac6ab4bd4cdeecbe621adf1d11b95a">CAN_F1R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga4aac6ab4bd4cdeecbe621adf1d11b95a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30140ced3da0d0a526c4f4f5881987c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30140ced3da0d0a526c4f4f5881987c1">CAN_F1R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga30140ced3da0d0a526c4f4f5881987c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49f36aec2e851ed18c5a382a0708bbcb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49f36aec2e851ed18c5a382a0708bbcb">CAN_F1R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga49f36aec2e851ed18c5a382a0708bbcb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99ccab06a8a97616a2fc3e026f36351d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99ccab06a8a97616a2fc3e026f36351d">CAN_F1R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga99ccab06a8a97616a2fc3e026f36351d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa408889ff6478d6558d4c53c9114bde"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa408889ff6478d6558d4c53c9114bde">CAN_F1R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gaaa408889ff6478d6558d4c53c9114bde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga032dd8dc11aa9013cc0e824e31932951"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga032dd8dc11aa9013cc0e824e31932951">CAN_F1R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga032dd8dc11aa9013cc0e824e31932951"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76f29020524ec6403a40de4e260a2ea8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76f29020524ec6403a40de4e260a2ea8">CAN_F1R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga76f29020524ec6403a40de4e260a2ea8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bb51cd27fea671be51a59ce7a83008e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bb51cd27fea671be51a59ce7a83008e">CAN_F1R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga0bb51cd27fea671be51a59ce7a83008e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga085c38b511aa4895b6c939a06070c916"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga085c38b511aa4895b6c939a06070c916">CAN_F1R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga085c38b511aa4895b6c939a06070c916"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe299378c771da8d7d8e72a6f6e41f7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe299378c771da8d7d8e72a6f6e41f7f">CAN_F1R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gabe299378c771da8d7d8e72a6f6e41f7f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabc8bef79b09bcfcb0df6ba467ed906b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaabc8bef79b09bcfcb0df6ba467ed906b">CAN_F1R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaabc8bef79b09bcfcb0df6ba467ed906b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc4aba2c95f27229987d9eb4cda9890c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc4aba2c95f27229987d9eb4cda9890c">CAN_F1R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:gabc4aba2c95f27229987d9eb4cda9890c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga21cbfc217d67062d265753964c871065"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga21cbfc217d67062d265753964c871065">CAN_F1R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga21cbfc217d67062d265753964c871065"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga36964e4bf6aa10467b3d95781da56814"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36964e4bf6aa10467b3d95781da56814">CAN_F2R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga36964e4bf6aa10467b3d95781da56814"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d0541eb1a4f8ae0afe429ac0757de6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d0541eb1a4f8ae0afe429ac0757de6a">CAN_F2R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga0d0541eb1a4f8ae0afe429ac0757de6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga14fd5aff8767df509b396190ddf7fa28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14fd5aff8767df509b396190ddf7fa28">CAN_F2R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga14fd5aff8767df509b396190ddf7fa28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7283e2a71983078144fa9a8e5ae563a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7283e2a71983078144fa9a8e5ae563a9">CAN_F2R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga7283e2a71983078144fa9a8e5ae563a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeba1324d32b084c477a0ece7b904a4cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeba1324d32b084c477a0ece7b904a4cd">CAN_F2R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gaeba1324d32b084c477a0ece7b904a4cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a367cf9f2f7e604e9f5e30b5ed30779"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a367cf9f2f7e604e9f5e30b5ed30779">CAN_F2R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga1a367cf9f2f7e604e9f5e30b5ed30779"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6b92ac9785e2f7c890130e9b7d792c79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b92ac9785e2f7c890130e9b7d792c79">CAN_F2R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga6b92ac9785e2f7c890130e9b7d792c79"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac969a33d20353d5cd7fb317f5fa71138"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac969a33d20353d5cd7fb317f5fa71138">CAN_F2R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gac969a33d20353d5cd7fb317f5fa71138"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafeaac84fa5eec0173c531e9940327f86"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafeaac84fa5eec0173c531e9940327f86">CAN_F2R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gafeaac84fa5eec0173c531e9940327f86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga532413ea309fa031e65397a5b31ac92c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga532413ea309fa031e65397a5b31ac92c">CAN_F2R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:ga532413ea309fa031e65397a5b31ac92c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga360e02860472400a9000ef2fc8ba7bb1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga360e02860472400a9000ef2fc8ba7bb1">CAN_F2R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga360e02860472400a9000ef2fc8ba7bb1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c917a5b5e1a010229caaa5b3a41d7a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c917a5b5e1a010229caaa5b3a41d7a6">CAN_F2R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga4c917a5b5e1a010229caaa5b3a41d7a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0956873246e63b41c0a640bc8d117319"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0956873246e63b41c0a640bc8d117319">CAN_F2R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga0956873246e63b41c0a640bc8d117319"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53202218de27d073d577c27427fe0cbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53202218de27d073d577c27427fe0cbe">CAN_F2R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga53202218de27d073d577c27427fe0cbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga960a1ffd4b153168494d91df69e30742"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga960a1ffd4b153168494d91df69e30742">CAN_F2R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga960a1ffd4b153168494d91df69e30742"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc81e9ab9ab926d1ca30c5b6060a126b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc81e9ab9ab926d1ca30c5b6060a126b">CAN_F2R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:gafc81e9ab9ab926d1ca30c5b6060a126b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa5f9a5279398454a3a2493b3e1783f52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa5f9a5279398454a3a2493b3e1783f52">CAN_F2R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:gaa5f9a5279398454a3a2493b3e1783f52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0275ec7527a223a33289118f9e0a2edd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0275ec7527a223a33289118f9e0a2edd">CAN_F2R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga0275ec7527a223a33289118f9e0a2edd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34028a240868ca7dd365ce98e31e84ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34028a240868ca7dd365ce98e31e84ca">CAN_F2R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga34028a240868ca7dd365ce98e31e84ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga807cfa122b6c74d85fdab233dd9ed502"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga807cfa122b6c74d85fdab233dd9ed502">CAN_F2R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga807cfa122b6c74d85fdab233dd9ed502"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1187f1ab7514c90af34b44eff80858fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1187f1ab7514c90af34b44eff80858fa">CAN_F2R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga1187f1ab7514c90af34b44eff80858fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacecb18e779a44989b724901f6c2af84f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacecb18e779a44989b724901f6c2af84f">CAN_F2R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:gacecb18e779a44989b724901f6c2af84f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f2a6017895d8d139dcbc3d0e6e69e69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f2a6017895d8d139dcbc3d0e6e69e69">CAN_F2R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:ga3f2a6017895d8d139dcbc3d0e6e69e69"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaceff2f283cbd4935ec5d45ceaa18efe0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaceff2f283cbd4935ec5d45ceaa18efe0">CAN_F2R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:gaceff2f283cbd4935ec5d45ceaa18efe0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3086667a209f91ed6d6b496b83111044"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3086667a209f91ed6d6b496b83111044">CAN_F2R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga3086667a209f91ed6d6b496b83111044"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5c8c7b240bb0dd2a3ec8b6c4c25af7ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c8c7b240bb0dd2a3ec8b6c4c25af7ba">CAN_F2R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga5c8c7b240bb0dd2a3ec8b6c4c25af7ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51498379a1e3b81a83bf8d164c4f7e5e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51498379a1e3b81a83bf8d164c4f7e5e">CAN_F2R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga51498379a1e3b81a83bf8d164c4f7e5e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1f78e7c530a3ef26d44b9353fa9ee36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1f78e7c530a3ef26d44b9353fa9ee36">CAN_F2R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gaa1f78e7c530a3ef26d44b9353fa9ee36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7e30d0e50fca346ca8cb427a6c85f9dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e30d0e50fca346ca8cb427a6c85f9dc">CAN_F2R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga7e30d0e50fca346ca8cb427a6c85f9dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga77586d252cad5a0a866b1d9deb6835ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga77586d252cad5a0a866b1d9deb6835ba">CAN_F2R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga77586d252cad5a0a866b1d9deb6835ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a10903e507b35b7425b3ae98a8c6800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a10903e507b35b7425b3ae98a8c6800">CAN_F2R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga6a10903e507b35b7425b3ae98a8c6800"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac34bca92730b6f7cd0de8af1a2d0014f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac34bca92730b6f7cd0de8af1a2d0014f">CAN_F2R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:gac34bca92730b6f7cd0de8af1a2d0014f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga46730b7e64aa771087b6c9d5deb273e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga46730b7e64aa771087b6c9d5deb273e1">CAN_F3R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga46730b7e64aa771087b6c9d5deb273e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeb12b61624912b90382a4ad95281e7f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeb12b61624912b90382a4ad95281e7f4">CAN_F3R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaeb12b61624912b90382a4ad95281e7f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6621759dddc575c01f5bbaab43d1f04e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6621759dddc575c01f5bbaab43d1f04e">CAN_F3R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga6621759dddc575c01f5bbaab43d1f04e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga29d052fc2597171767d8cf5d72388ad5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga29d052fc2597171767d8cf5d72388ad5">CAN_F3R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga29d052fc2597171767d8cf5d72388ad5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga731e9949d77054ba176340652083ad46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga731e9949d77054ba176340652083ad46">CAN_F3R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga731e9949d77054ba176340652083ad46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93c52f51fe9eefe7f0cf094522a592b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93c52f51fe9eefe7f0cf094522a592b6">CAN_F3R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga93c52f51fe9eefe7f0cf094522a592b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad675c2d3f72d8bc42e0f3088ddbcc3c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad675c2d3f72d8bc42e0f3088ddbcc3c9">CAN_F3R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gad675c2d3f72d8bc42e0f3088ddbcc3c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1734cf6a5a72d403cd043eb704246c85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1734cf6a5a72d403cd043eb704246c85">CAN_F3R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga1734cf6a5a72d403cd043eb704246c85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga97d82554ce38567e44cd87ed99175928"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97d82554ce38567e44cd87ed99175928">CAN_F3R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga97d82554ce38567e44cd87ed99175928"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga505f85fadba4397e6d9a241bbc9229bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga505f85fadba4397e6d9a241bbc9229bc">CAN_F3R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga505f85fadba4397e6d9a241bbc9229bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb635843951fb42ffeb776d8564d7e14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb635843951fb42ffeb776d8564d7e14">CAN_F3R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gabb635843951fb42ffeb776d8564d7e14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5db557239646008004286de15847ced4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5db557239646008004286de15847ced4">CAN_F3R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga5db557239646008004286de15847ced4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga118b2044dae4c93c66aaa4f28c5b695c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga118b2044dae4c93c66aaa4f28c5b695c">CAN_F3R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga118b2044dae4c93c66aaa4f28c5b695c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c041a2b8162a8055a1894d0a0b3d682"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8c041a2b8162a8055a1894d0a0b3d682">CAN_F3R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga8c041a2b8162a8055a1894d0a0b3d682"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gafb6e0947fcb7594d12dcbca38d60c9f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb6e0947fcb7594d12dcbca38d60c9f8">CAN_F3R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:gafb6e0947fcb7594d12dcbca38d60c9f8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1dae8addc6fa59e824e1a67fc8c91ddd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1dae8addc6fa59e824e1a67fc8c91ddd">CAN_F3R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga1dae8addc6fa59e824e1a67fc8c91ddd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga992795c5e0b3b8a8c5d4d6e9eceb7366"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga992795c5e0b3b8a8c5d4d6e9eceb7366">CAN_F3R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga992795c5e0b3b8a8c5d4d6e9eceb7366"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1637eff70416eb85d5d2a54e1f5d412e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1637eff70416eb85d5d2a54e1f5d412e">CAN_F3R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga1637eff70416eb85d5d2a54e1f5d412e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7bbfdfa29b84ea60e67d41f775c6ffc6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7bbfdfa29b84ea60e67d41f775c6ffc6">CAN_F3R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga7bbfdfa29b84ea60e67d41f775c6ffc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga827747e8cc66e4dcd22498c59e45c776"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga827747e8cc66e4dcd22498c59e45c776">CAN_F3R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga827747e8cc66e4dcd22498c59e45c776"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe0bb6919615ec6311e8c39f62bca618"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe0bb6919615ec6311e8c39f62bca618">CAN_F3R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:gabe0bb6919615ec6311e8c39f62bca618"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3c3e4716d3e52ec99451a942dceb59de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c3e4716d3e52ec99451a942dceb59de">CAN_F3R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:ga3c3e4716d3e52ec99451a942dceb59de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffefb44a948d36dcd94248f63aa68d2b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffefb44a948d36dcd94248f63aa68d2b">CAN_F3R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gaffefb44a948d36dcd94248f63aa68d2b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79ce25d44a38f520b4a93384d6f5ac40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79ce25d44a38f520b4a93384d6f5ac40">CAN_F3R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga79ce25d44a38f520b4a93384d6f5ac40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3fe1ced752dc811f9418181275c8c3fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3fe1ced752dc811f9418181275c8c3fe">CAN_F3R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga3fe1ced752dc811f9418181275c8c3fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fb2f469246193f6fc9e4ade42192d28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fb2f469246193f6fc9e4ade42192d28">CAN_F3R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga9fb2f469246193f6fc9e4ade42192d28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae85be7f7d7a9ddb8a60edb30d2a5727"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae85be7f7d7a9ddb8a60edb30d2a5727">CAN_F3R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:gaae85be7f7d7a9ddb8a60edb30d2a5727"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga850c21b26100c68b9cb57608c0249543"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga850c21b26100c68b9cb57608c0249543">CAN_F3R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga850c21b26100c68b9cb57608c0249543"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82ec6ad2ad1b6115496adcb3e66fae25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga82ec6ad2ad1b6115496adcb3e66fae25">CAN_F3R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga82ec6ad2ad1b6115496adcb3e66fae25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4fa34cc998edfdd1b3db93395ee6500"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf4fa34cc998edfdd1b3db93395ee6500">CAN_F3R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:gaf4fa34cc998edfdd1b3db93395ee6500"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f4fea5ecec28e7f47647067b75cb24e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f4fea5ecec28e7f47647067b75cb24e">CAN_F3R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga7f4fea5ecec28e7f47647067b75cb24e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga58a154f4d0cb787f23429b3f7cf70fd6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga58a154f4d0cb787f23429b3f7cf70fd6">CAN_F3R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga58a154f4d0cb787f23429b3f7cf70fd6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga97250d3eed2504846f39c50dce71c9d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97250d3eed2504846f39c50dce71c9d0">CAN_F4R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga97250d3eed2504846f39c50dce71c9d0"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga145e11678ee6062df5164894ad8f80b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga145e11678ee6062df5164894ad8f80b1">CAN_F4R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga145e11678ee6062df5164894ad8f80b1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9d19193baf5412ec2e38822d062196b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9d19193baf5412ec2e38822d062196b8">CAN_F4R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga9d19193baf5412ec2e38822d062196b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga94b8b1428b640932aced6446f8b41f83"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga94b8b1428b640932aced6446f8b41f83">CAN_F4R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga94b8b1428b640932aced6446f8b41f83"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93164ec00412eb5eed168e8a30557f25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93164ec00412eb5eed168e8a30557f25">CAN_F4R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="memitem:ga04e44c5a14e44c20f3b81044a915db13"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga04e44c5a14e44c20f3b81044a915db13">CAN_F4R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga04e44c5a14e44c20f3b81044a915db13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37e57dec99c33f462a2dbb6273df2f57"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37e57dec99c33f462a2dbb6273df2f57">CAN_F4R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga37e57dec99c33f462a2dbb6273df2f57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6c7d3ec0375e356192583142f7fccca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6c7d3ec0375e356192583142f7fccca">CAN_F4R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaf6c7d3ec0375e356192583142f7fccca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad33f7d788aea161826a86bc2c5567450"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad33f7d788aea161826a86bc2c5567450">CAN_F4R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gad33f7d788aea161826a86bc2c5567450"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab998448b0bd20ff6384c26ad9e6baaf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab998448b0bd20ff6384c26ad9e6baaf">CAN_F4R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaab998448b0bd20ff6384c26ad9e6baaf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8794112fcbb0dca0c7d0316ac8725e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8794112fcbb0dca0c7d0316ac8725e8">CAN_F4R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gad8794112fcbb0dca0c7d0316ac8725e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d22e782a9ca087f99ab9f53b2626aed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d22e782a9ca087f99ab9f53b2626aed">CAN_F4R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga0d22e782a9ca087f99ab9f53b2626aed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa8d5c2635a62bdfa6e3a5a12b127fc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa8d5c2635a62bdfa6e3a5a12b127fc8">CAN_F4R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gaaa8d5c2635a62bdfa6e3a5a12b127fc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad491689799985f0c8f17b270cd8873c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad491689799985f0c8f17b270cd8873c4">CAN_F4R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gad491689799985f0c8f17b270cd8873c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1b80d40d87204de4687735de852f47f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab1b80d40d87204de4687735de852f47f">CAN_F4R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gab1b80d40d87204de4687735de852f47f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0994b341ba8a73b950f01d83d012780d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0994b341ba8a73b950f01d83d012780d">CAN_F4R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga0994b341ba8a73b950f01d83d012780d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ae8b77d791ba7403618989a77e62922"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ae8b77d791ba7403618989a77e62922">CAN_F4R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga6ae8b77d791ba7403618989a77e62922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc116988117a7e7fabc722855351d257"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc116988117a7e7fabc722855351d257">CAN_F4R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gabc116988117a7e7fabc722855351d257"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07b1fc6ee0dc4cc892d69ed496b59007"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07b1fc6ee0dc4cc892d69ed496b59007">CAN_F4R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga07b1fc6ee0dc4cc892d69ed496b59007"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa58785812f0d3e73a657426b81f0b78b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa58785812f0d3e73a657426b81f0b78b">CAN_F4R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaa58785812f0d3e73a657426b81f0b78b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga363da353073d7ee6421cf171688ef52b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga363da353073d7ee6421cf171688ef52b">CAN_F4R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga363da353073d7ee6421cf171688ef52b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4f22695359aa9a1b07763aef44a9a1c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4f22695359aa9a1b07763aef44a9a1c4">CAN_F4R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga4f22695359aa9a1b07763aef44a9a1c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac0f8c1ef382225198407474f2b7fa073"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac0f8c1ef382225198407474f2b7fa073">CAN_F4R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gac0f8c1ef382225198407474f2b7fa073"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9476c54044db3182ee789e9df1d1aa19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9476c54044db3182ee789e9df1d1aa19">CAN_F4R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga9476c54044db3182ee789e9df1d1aa19"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga73158a3669d2ef96db84e4f196d040bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga73158a3669d2ef96db84e4f196d040bf">CAN_F4R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga73158a3669d2ef96db84e4f196d040bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17d36fcf8e08c76597a7b2c05e831f98"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17d36fcf8e08c76597a7b2c05e831f98">CAN_F4R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga17d36fcf8e08c76597a7b2c05e831f98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa683635426f418ead45032c25e0179ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa683635426f418ead45032c25e0179ee">CAN_F4R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaa683635426f418ead45032c25e0179ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23c77145ea84805a785b49c0a7f31774"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23c77145ea84805a785b49c0a7f31774">CAN_F4R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga23c77145ea84805a785b49c0a7f31774"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga18492e954ec07174a1b140104062f941"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga18492e954ec07174a1b140104062f941">CAN_F4R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga18492e954ec07174a1b140104062f941"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf94626a8450c20e241ad6298660ec23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf94626a8450c20e241ad6298660ec23">CAN_F4R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaaf94626a8450c20e241ad6298660ec23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d7da9aa234705aff3ddc9845b1589d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d7da9aa234705aff3ddc9845b1589d4">CAN_F4R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga4d7da9aa234705aff3ddc9845b1589d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70293ff8a71e353d84a3da134eb427d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga70293ff8a71e353d84a3da134eb427d9">CAN_F4R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga70293ff8a71e353d84a3da134eb427d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17b264aaa84a3c6ab5a35014eb5dfb09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17b264aaa84a3c6ab5a35014eb5dfb09">CAN_F5R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga17b264aaa84a3c6ab5a35014eb5dfb09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa871f5bc692996efc8c1bad1d08b43c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa871f5bc692996efc8c1bad1d08b43c5">CAN_F5R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaa871f5bc692996efc8c1bad1d08b43c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf44a72156023a5889a1c22d77e188e2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf44a72156023a5889a1c22d77e188e2e">CAN_F5R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaf44a72156023a5889a1c22d77e188e2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3d8828885a79299bc65c2011f71240e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3d8828885a79299bc65c2011f71240e2">CAN_F5R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga3d8828885a79299bc65c2011f71240e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadfa978108927c827e3021499a20d0372"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadfa978108927c827e3021499a20d0372">CAN_F5R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gadfa978108927c827e3021499a20d0372"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3b3c48011935170a9bd120b724030fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3b3c48011935170a9bd120b724030fe">CAN_F5R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaf3b3c48011935170a9bd120b724030fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56cf7f6d0bf48847f3d8f72777774e58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56cf7f6d0bf48847f3d8f72777774e58">CAN_F5R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga56cf7f6d0bf48847f3d8f72777774e58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2cb8a5551d90c8d79b09b4d82f3f59c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2cb8a5551d90c8d79b09b4d82f3f59c2">CAN_F5R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga2cb8a5551d90c8d79b09b4d82f3f59c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga423b7b77bfd5dd6791f1b1dd16e9807a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga423b7b77bfd5dd6791f1b1dd16e9807a">CAN_F5R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga423b7b77bfd5dd6791f1b1dd16e9807a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c50420a128a70341e63ad23b0bedba5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c50420a128a70341e63ad23b0bedba5">CAN_F5R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga9c50420a128a70341e63ad23b0bedba5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga392844657c800d2e16e7916ed5fb9891"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga392844657c800d2e16e7916ed5fb9891">CAN_F5R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga392844657c800d2e16e7916ed5fb9891"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb35a3bbc447c46929643115490e250d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb35a3bbc447c46929643115490e250d">CAN_F5R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gabb35a3bbc447c46929643115490e250d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga974bae58f9819eee0377d709c985bcbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga974bae58f9819eee0377d709c985bcbe">CAN_F5R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga974bae58f9819eee0377d709c985bcbe"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2823bb25e138cc52d11b154456947ab7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2823bb25e138cc52d11b154456947ab7">CAN_F5R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga2823bb25e138cc52d11b154456947ab7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98cf223bdcc1a106f7573b57f836f9ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga98cf223bdcc1a106f7573b57f836f9ed">CAN_F5R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga98cf223bdcc1a106f7573b57f836f9ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26bfd14720495dd180f1524f2fdb3743"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26bfd14720495dd180f1524f2fdb3743">CAN_F5R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga26bfd14720495dd180f1524f2fdb3743"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41b457c721dc855d05b2f353c22a83a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41b457c721dc855d05b2f353c22a83a7">CAN_F5R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga41b457c721dc855d05b2f353c22a83a7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bc89534aaf3f810a2151b04b0086717"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1bc89534aaf3f810a2151b04b0086717">CAN_F5R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga1bc89534aaf3f810a2151b04b0086717"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga070940536728fad3c0e5336926131b4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga070940536728fad3c0e5336926131b4b">CAN_F5R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga070940536728fad3c0e5336926131b4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddf2e4aa8107150a86d37ce03a0e1c0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaddf2e4aa8107150a86d37ce03a0e1c0e">CAN_F5R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaddf2e4aa8107150a86d37ce03a0e1c0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1788704faad47f1d45017df41a35f053"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1788704faad47f1d45017df41a35f053">CAN_F5R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga1788704faad47f1d45017df41a35f053"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11c4aeffb6646643c412e19e6f5cc015"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11c4aeffb6646643c412e19e6f5cc015">CAN_F5R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga11c4aeffb6646643c412e19e6f5cc015"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef348c2d37f96f5e5324368f90c80d42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef348c2d37f96f5e5324368f90c80d42">CAN_F5R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaef348c2d37f96f5e5324368f90c80d42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga398d842cfcb2d441d999e1407fc54f83"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga398d842cfcb2d441d999e1407fc54f83">CAN_F5R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga398d842cfcb2d441d999e1407fc54f83"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6575f8d4d154e2e8342b3f88352a9d52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6575f8d4d154e2e8342b3f88352a9d52">CAN_F5R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga6575f8d4d154e2e8342b3f88352a9d52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9e6ad77b1d8ac7303e920658aceb354"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9e6ad77b1d8ac7303e920658aceb354">CAN_F5R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gae9e6ad77b1d8ac7303e920658aceb354"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga911ade78e30d1a037d35dda5eb7cbd4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga911ade78e30d1a037d35dda5eb7cbd4b">CAN_F5R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga911ade78e30d1a037d35dda5eb7cbd4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49542b9334bc4917e25d6808c78787d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49542b9334bc4917e25d6808c78787d1">CAN_F5R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga49542b9334bc4917e25d6808c78787d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga255da64f4a66ff888f6633d6e51658c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga255da64f4a66ff888f6633d6e51658c6">CAN_F5R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga255da64f4a66ff888f6633d6e51658c6"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga8335d23f9fd156f40dc7fd63ba6783cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8335d23f9fd156f40dc7fd63ba6783cb">CAN_F5R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga8335d23f9fd156f40dc7fd63ba6783cb"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaf81786b7519b39f705729de2c55e4faa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf81786b7519b39f705729de2c55e4faa">CAN_F5R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:gaf81786b7519b39f705729de2c55e4faa"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4f7122b0ad8cb4fc1797d0dbecbb4a05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4f7122b0ad8cb4fc1797d0dbecbb4a05">CAN_F5R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga4f7122b0ad8cb4fc1797d0dbecbb4a05"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga71ad6452660daed3d6c436533a25efc2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga71ad6452660daed3d6c436533a25efc2">CAN_F6R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga71ad6452660daed3d6c436533a25efc2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9e24abd8d2f0775661415b6565f4f6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9e24abd8d2f0775661415b6565f4f6d">CAN_F6R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gac9e24abd8d2f0775661415b6565f4f6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6dc3f6ce4dde435743aadbe17cc78b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6dc3f6ce4dde435743aadbe17cc78b9">CAN_F6R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf6dc3f6ce4dde435743aadbe17cc78b9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae1f5163490dffe1f4d7c635458359c2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1f5163490dffe1f4d7c635458359c2f">CAN_F6R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gae1f5163490dffe1f4d7c635458359c2f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89e9191d214d05f4d90fbcd38daa73e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89e9191d214d05f4d90fbcd38daa73e1">CAN_F6R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga89e9191d214d05f4d90fbcd38daa73e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga97d29588281c546d98e09760cc5ef593"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97d29588281c546d98e09760cc5ef593">CAN_F6R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga97d29588281c546d98e09760cc5ef593"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga53f5717aca9932255049b133661765bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53f5717aca9932255049b133661765bf">CAN_F6R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga53f5717aca9932255049b133661765bf"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga7ec93958e936379d891bc3450dba3d1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ec93958e936379d891bc3450dba3d1d">CAN_F6R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga7ec93958e936379d891bc3450dba3d1d"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga8f97c7eb9d6e69d589db38d745ae321c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f97c7eb9d6e69d589db38d745ae321c">CAN_F6R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga8f97c7eb9d6e69d589db38d745ae321c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga372ebb5d42d147d41688f7c0fcf467d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga372ebb5d42d147d41688f7c0fcf467d2">CAN_F6R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga372ebb5d42d147d41688f7c0fcf467d2"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga47baa2c9c05c7c422a49994b8f80016f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47baa2c9c05c7c422a49994b8f80016f">CAN_F6R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga47baa2c9c05c7c422a49994b8f80016f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55d7665b118e98586c2a9b1900ce7292"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga55d7665b118e98586c2a9b1900ce7292">CAN_F6R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga55d7665b118e98586c2a9b1900ce7292"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga5095a203d07244e75dd6deca125b4468"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5095a203d07244e75dd6deca125b4468">CAN_F6R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga5095a203d07244e75dd6deca125b4468"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga533dbb10e8fce9aa6ec23573fb49c339"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga533dbb10e8fce9aa6ec23573fb49c339">CAN_F6R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga533dbb10e8fce9aa6ec23573fb49c339"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga8b95be922291e534609302c0c833f1f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b95be922291e534609302c0c833f1f7">CAN_F6R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga8b95be922291e534609302c0c833f1f7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17301d50c7b6ad30ffc05ee2c63f6171"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17301d50c7b6ad30ffc05ee2c63f6171">CAN_F6R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga17301d50c7b6ad30ffc05ee2c63f6171"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf23dfb03247544122ed01472b8a31b4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf23dfb03247544122ed01472b8a31b4d">CAN_F6R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaf23dfb03247544122ed01472b8a31b4d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf8d35fbfa677fc446da68f4043b633e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf8d35fbfa677fc446da68f4043b633e">CAN_F6R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:gadf8d35fbfa677fc446da68f4043b633e"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga6c81a1972ec8d87421c6113bb9747c3e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c81a1972ec8d87421c6113bb9747c3e">CAN_F6R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga6c81a1972ec8d87421c6113bb9747c3e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga11ea1bd4bae8b27a5fd73d210eb83d39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11ea1bd4bae8b27a5fd73d210eb83d39">CAN_F6R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga11ea1bd4bae8b27a5fd73d210eb83d39"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c48dcd1ac5e23827813ed695bdff0d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c48dcd1ac5e23827813ed695bdff0d1">CAN_F6R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga4c48dcd1ac5e23827813ed695bdff0d1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd115d29d9f0a8fddc13a32c013af26b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd115d29d9f0a8fddc13a32c013af26b">CAN_F6R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gacd115d29d9f0a8fddc13a32c013af26b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa3f116b2e31dd40bcdd6617fee83907e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa3f116b2e31dd40bcdd6617fee83907e">CAN_F6R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gaa3f116b2e31dd40bcdd6617fee83907e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga090da76d2d9379dbfc54f7c3fcf69fe4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga090da76d2d9379dbfc54f7c3fcf69fe4">CAN_F6R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga090da76d2d9379dbfc54f7c3fcf69fe4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9c8a59a8065400f4a75be49a78e2a9e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9c8a59a8065400f4a75be49a78e2a9e">CAN_F6R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gae9c8a59a8065400f4a75be49a78e2a9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3854a1a11c72e64d3c4722494f463421"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3854a1a11c72e64d3c4722494f463421">CAN_F6R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga3854a1a11c72e64d3c4722494f463421"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b5ceb9d7ae0c6e34490b8d8659919c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b5ceb9d7ae0c6e34490b8d8659919c9">CAN_F6R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga7b5ceb9d7ae0c6e34490b8d8659919c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac01a4accedd624ceccf8f8976a043177"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac01a4accedd624ceccf8f8976a043177">CAN_F6R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gac01a4accedd624ceccf8f8976a043177"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc2d754207055a5a87696eb1bb7d8cae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc2d754207055a5a87696eb1bb7d8cae">CAN_F6R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gacc2d754207055a5a87696eb1bb7d8cae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga471631ee112af3bde77d848c22d743ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga471631ee112af3bde77d848c22d743ef">CAN_F6R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga471631ee112af3bde77d848c22d743ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9574ec7dddcea6b80368778c01f62598"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9574ec7dddcea6b80368778c01f62598">CAN_F6R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga9574ec7dddcea6b80368778c01f62598"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64bcb159347ad8e2a2609ce89ed030df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga64bcb159347ad8e2a2609ce89ed030df">CAN_F6R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga64bcb159347ad8e2a2609ce89ed030df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec0803330590bf9aba9d09342034b2c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec0803330590bf9aba9d09342034b2c1">CAN_F7R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaec0803330590bf9aba9d09342034b2c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c633d4cbfdf79f09ae1df5e75c98439"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8c633d4cbfdf79f09ae1df5e75c98439">CAN_F7R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga8c633d4cbfdf79f09ae1df5e75c98439"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31a0c4ece8b73760ad295344b8558ddb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31a0c4ece8b73760ad295344b8558ddb">CAN_F7R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga31a0c4ece8b73760ad295344b8558ddb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe2fc15309540b87538ea3e8460d8d11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe2fc15309540b87538ea3e8460d8d11">CAN_F7R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gafe2fc15309540b87538ea3e8460d8d11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac81d4c021f4579021ddf9485472a84f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac81d4c021f4579021ddf9485472a84f5">CAN_F7R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gac81d4c021f4579021ddf9485472a84f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5dd6a00bb403a3e19e66c68f5ee308e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5dd6a00bb403a3e19e66c68f5ee308e2">CAN_F7R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga5dd6a00bb403a3e19e66c68f5ee308e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b5eaf37458d0426fd7f847775fd41e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b5eaf37458d0426fd7f847775fd41e9">CAN_F7R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga9b5eaf37458d0426fd7f847775fd41e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga780440ce173cde12fd117b519419424c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga780440ce173cde12fd117b519419424c">CAN_F7R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga780440ce173cde12fd117b519419424c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99ae0e27d14b42fef4551d83ee88b4ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99ae0e27d14b42fef4551d83ee88b4ac">CAN_F7R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga99ae0e27d14b42fef4551d83ee88b4ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace90c0624446480421fac233739413dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace90c0624446480421fac233739413dc">CAN_F7R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gace90c0624446480421fac233739413dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae60d566699df87580584ed496681562"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae60d566699df87580584ed496681562">CAN_F7R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gaae60d566699df87580584ed496681562"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6325b37cc369b92b2334e482dbe3bf06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6325b37cc369b92b2334e482dbe3bf06">CAN_F7R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga6325b37cc369b92b2334e482dbe3bf06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace846d293ac11d535ee2aad17cf099bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace846d293ac11d535ee2aad17cf099bc">CAN_F7R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:gace846d293ac11d535ee2aad17cf099bc"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga91b26397a75fc4c0124e84903d31221e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91b26397a75fc4c0124e84903d31221e">CAN_F7R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga91b26397a75fc4c0124e84903d31221e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada2e01c05c216ba6ff4756d043297c0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada2e01c05c216ba6ff4756d043297c0e">CAN_F7R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:gada2e01c05c216ba6ff4756d043297c0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeef08aa6565ff24bd9863b4b8a9c2ff5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeef08aa6565ff24bd9863b4b8a9c2ff5">CAN_F7R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gaeef08aa6565ff24bd9863b4b8a9c2ff5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16c3ccb033b9541b57c338b9737f18dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16c3ccb033b9541b57c338b9737f18dd">CAN_F7R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga16c3ccb033b9541b57c338b9737f18dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad898ca382f57efb1842884d46217245c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad898ca382f57efb1842884d46217245c">CAN_F7R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:gad898ca382f57efb1842884d46217245c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf419938e132cc1a0bf59a6c058e2c7c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf419938e132cc1a0bf59a6c058e2c7c5">CAN_F7R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:gaf419938e132cc1a0bf59a6c058e2c7c5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae991abb6f2e64443be7e39633f192aba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae991abb6f2e64443be7e39633f192aba">CAN_F7R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:gae991abb6f2e64443be7e39633f192aba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3738a42e2767c928de21a2f784ce6bce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3738a42e2767c928de21a2f784ce6bce">CAN_F7R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga3738a42e2767c928de21a2f784ce6bce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae5cb252582e6b7bd706b37447f71d6cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5cb252582e6b7bd706b37447f71d6cd">CAN_F7R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:gae5cb252582e6b7bd706b37447f71d6cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae616e53b9d961571eea4ff2df31f8399"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae616e53b9d961571eea4ff2df31f8399">CAN_F7R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gae616e53b9d961571eea4ff2df31f8399"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2049c9bb27af3cde01334b1901aa417"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2049c9bb27af3cde01334b1901aa417">CAN_F7R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:gab2049c9bb27af3cde01334b1901aa417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e69c2fd32e2c523c9e939df825fc605"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e69c2fd32e2c523c9e939df825fc605">CAN_F7R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:ga8e69c2fd32e2c523c9e939df825fc605"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga659cc84b9186e279c37e88b94e1c9829"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga659cc84b9186e279c37e88b94e1c9829">CAN_F7R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga659cc84b9186e279c37e88b94e1c9829"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga43c9da5ad4c2d261858f73b779cc3dae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43c9da5ad4c2d261858f73b779cc3dae">CAN_F7R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga43c9da5ad4c2d261858f73b779cc3dae"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0a1ea8d66ada6cea7268fba151c00d91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a1ea8d66ada6cea7268fba151c00d91">CAN_F7R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga0a1ea8d66ada6cea7268fba151c00d91"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gabbd6032652515423412ad73b8a004bbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabbd6032652515423412ad73b8a004bbb">CAN_F7R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gabbd6032652515423412ad73b8a004bbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a991a0bb5a81748b091d6b96c59fc37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a991a0bb5a81748b091d6b96c59fc37">CAN_F7R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga3a991a0bb5a81748b091d6b96c59fc37"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaedae5e816af0dd734311bf44be7571f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaedae5e816af0dd734311bf44be7571f2">CAN_F7R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:gaedae5e816af0dd734311bf44be7571f2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2f88a239b8a39ff3343b1cfe70b06139"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f88a239b8a39ff3343b1cfe70b06139">CAN_F7R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga2f88a239b8a39ff3343b1cfe70b06139"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3cfe399fb494ff6ab1d5b91258c42764"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3cfe399fb494ff6ab1d5b91258c42764">CAN_F8R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga3cfe399fb494ff6ab1d5b91258c42764"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9ca04b514b4d6a3b19619932513b8953"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ca04b514b4d6a3b19619932513b8953">CAN_F8R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga9ca04b514b4d6a3b19619932513b8953"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac4c3c099bf7db702b7bf5f71cddaaec2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4c3c099bf7db702b7bf5f71cddaaec2">CAN_F8R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:gac4c3c099bf7db702b7bf5f71cddaaec2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae1e53037e7f7171d8a7358590f0e7420"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1e53037e7f7171d8a7358590f0e7420">CAN_F8R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gae1e53037e7f7171d8a7358590f0e7420"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51e2af45725e06538c4d09ad07296316"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51e2af45725e06538c4d09ad07296316">CAN_F8R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga51e2af45725e06538c4d09ad07296316"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2ee5e9d68190f0d41a5b8603d1933922"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ee5e9d68190f0d41a5b8603d1933922">CAN_F8R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga2ee5e9d68190f0d41a5b8603d1933922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66c636150cfad43a32652dba3ded8383"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66c636150cfad43a32652dba3ded8383">CAN_F8R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga66c636150cfad43a32652dba3ded8383"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0fc81a4ee32f76ce3a6fdbb3fc49425c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0fc81a4ee32f76ce3a6fdbb3fc49425c">CAN_F8R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga0fc81a4ee32f76ce3a6fdbb3fc49425c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68a36336242e8259c779f1c8f4544737"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68a36336242e8259c779f1c8f4544737">CAN_F8R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga68a36336242e8259c779f1c8f4544737"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0014717b3c4c65afb7542308980803d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad0014717b3c4c65afb7542308980803d">CAN_F8R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gad0014717b3c4c65afb7542308980803d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga315a7e30b95c05db01b7f56f4d825e62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga315a7e30b95c05db01b7f56f4d825e62">CAN_F8R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga315a7e30b95c05db01b7f56f4d825e62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga353aad2279bf6b72bd861f6c79253635"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga353aad2279bf6b72bd861f6c79253635">CAN_F8R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga353aad2279bf6b72bd861f6c79253635"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25193c4b44d05db08ba40f0e0f2c45e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25193c4b44d05db08ba40f0e0f2c45e1">CAN_F8R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga25193c4b44d05db08ba40f0e0f2c45e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4469bfc90525f84d9d04d3a4996997e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4469bfc90525f84d9d04d3a4996997e6">CAN_F8R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga4469bfc90525f84d9d04d3a4996997e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b17ebf3dd1e53d8417f955ebcf743b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b17ebf3dd1e53d8417f955ebcf743b3">CAN_F8R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga3b17ebf3dd1e53d8417f955ebcf743b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6db6c2262434fc76213a441d8ce2edf1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6db6c2262434fc76213a441d8ce2edf1">CAN_F8R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga6db6c2262434fc76213a441d8ce2edf1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a1e1e9aa84af36845402d19236c1214"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a1e1e9aa84af36845402d19236c1214">CAN_F8R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga8a1e1e9aa84af36845402d19236c1214"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0a9ee665444a6b42e98e0f988d1ba7a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0a9ee665444a6b42e98e0f988d1ba7a">CAN_F8R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:gae0a9ee665444a6b42e98e0f988d1ba7a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga16cde37565a3d3ec3a8c41013df6f6f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16cde37565a3d3ec3a8c41013df6f6f1">CAN_F8R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga16cde37565a3d3ec3a8c41013df6f6f1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga57ca000fea3be225ddf5f295437b6e36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga57ca000fea3be225ddf5f295437b6e36">CAN_F8R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga57ca000fea3be225ddf5f295437b6e36"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gad60ee9ebdce23be6d2adca113ca918e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad60ee9ebdce23be6d2adca113ca918e8">CAN_F8R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:gad60ee9ebdce23be6d2adca113ca918e8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae186c9794783eb47b460532801afe43a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae186c9794783eb47b460532801afe43a">CAN_F8R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:gae186c9794783eb47b460532801afe43a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga106a5e5b8ae8d683fcec85b076688f34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga106a5e5b8ae8d683fcec85b076688f34">CAN_F8R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga106a5e5b8ae8d683fcec85b076688f34"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1643a77c219a9b2706f438c5123bccc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1643a77c219a9b2706f438c5123bccc8">CAN_F8R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga1643a77c219a9b2706f438c5123bccc8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab21aa6ed09bed09347e07dbcbd0e9e93"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab21aa6ed09bed09347e07dbcbd0e9e93">CAN_F8R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gab21aa6ed09bed09347e07dbcbd0e9e93"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gab8267e4cdc484abd75634469f9b255c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8267e4cdc484abd75634469f9b255c5">CAN_F8R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:gab8267e4cdc484abd75634469f9b255c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga697d286473e81666c91f28e853aab4ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga697d286473e81666c91f28e853aab4ad">CAN_F8R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga697d286473e81666c91f28e853aab4ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga295c26638700a849ee3c6504caf6ceab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga295c26638700a849ee3c6504caf6ceab">CAN_F8R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga295c26638700a849ee3c6504caf6ceab"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f8469008983b405bfc5855258f4f6e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f8469008983b405bfc5855258f4f6e6">CAN_F8R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga0f8469008983b405bfc5855258f4f6e6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad18d894a75ebe73c0185d905cfb81dbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad18d894a75ebe73c0185d905cfb81dbf">CAN_F8R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gad18d894a75ebe73c0185d905cfb81dbf"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaccdf92a69572b56641ddd2967c034a7a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaccdf92a69572b56641ddd2967c034a7a">CAN_F8R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:gaccdf92a69572b56641ddd2967c034a7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0636c9c9fd84e5e8d12e78f236f2a56c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0636c9c9fd84e5e8d12e78f236f2a56c">CAN_F8R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:ga0636c9c9fd84e5e8d12e78f236f2a56c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaa1209cec0d1199b7f74bb2e2b1cca424"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1209cec0d1199b7f74bb2e2b1cca424">CAN_F9R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaa1209cec0d1199b7f74bb2e2b1cca424"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fd983be0f74b7f183261f21cd2f6910"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fd983be0f74b7f183261f21cd2f6910">CAN_F9R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9fd983be0f74b7f183261f21cd2f6910"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2e363da951c1191e733a8bc603cda3f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2e363da951c1191e733a8bc603cda3f5">CAN_F9R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga2e363da951c1191e733a8bc603cda3f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabab5a59d405ae1684853988e95ab9844"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabab5a59d405ae1684853988e95ab9844">CAN_F9R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gabab5a59d405ae1684853988e95ab9844"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b5b46878001f43618c726b3429e4b50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b5b46878001f43618c726b3429e4b50">CAN_F9R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga4b5b46878001f43618c726b3429e4b50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga582895a48cfeb8d7ecf6c9757ba0aa39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga582895a48cfeb8d7ecf6c9757ba0aa39">CAN_F9R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga582895a48cfeb8d7ecf6c9757ba0aa39"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe18a44ac1a9c4cf2a6e94bb946af17f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe18a44ac1a9c4cf2a6e94bb946af17f">CAN_F9R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gafe18a44ac1a9c4cf2a6e94bb946af17f"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae497ffa0ef246a52e57a394fa57e616d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae497ffa0ef246a52e57a394fa57e616d">CAN_F9R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:gae497ffa0ef246a52e57a394fa57e616d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4eedc431183ceae7240d11afc05bacfa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4eedc431183ceae7240d11afc05bacfa">CAN_F9R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga4eedc431183ceae7240d11afc05bacfa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga71d1294050a77f52ecd4b00568cd7477"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga71d1294050a77f52ecd4b00568cd7477">CAN_F9R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga71d1294050a77f52ecd4b00568cd7477"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5adc0ffeba391461d887f5d176a9b5bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5adc0ffeba391461d887f5d176a9b5bd">CAN_F9R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga5adc0ffeba391461d887f5d176a9b5bd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga989f1dea5a35e78b08649ac699955563"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga989f1dea5a35e78b08649ac699955563">CAN_F9R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga989f1dea5a35e78b08649ac699955563"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0b71e1b7db02ef8c5853534921b33aee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b71e1b7db02ef8c5853534921b33aee">CAN_F9R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga0b71e1b7db02ef8c5853534921b33aee"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga48cff2713910823bbf9c8aeb399d6695"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga48cff2713910823bbf9c8aeb399d6695">CAN_F9R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga48cff2713910823bbf9c8aeb399d6695"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9e0057c4eb0f7238d2ec98ae0702ff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9e0057c4eb0f7238d2ec98ae0702ff3">CAN_F9R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gab9e0057c4eb0f7238d2ec98ae0702ff3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc16f71c9ee3bc56be17f7488c1df807"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc16f71c9ee3bc56be17f7488c1df807">CAN_F9R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gacc16f71c9ee3bc56be17f7488c1df807"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3909a33262113171b7d4dc11fcf8c3b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3909a33262113171b7d4dc11fcf8c3b1">CAN_F9R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga3909a33262113171b7d4dc11fcf8c3b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8cead3f8d10075aa34c9446859356e2d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8cead3f8d10075aa34c9446859356e2d">CAN_F9R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga8cead3f8d10075aa34c9446859356e2d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7730d43a2cf07a1568ed738a4f69692"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7730d43a2cf07a1568ed738a4f69692">CAN_F9R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gaf7730d43a2cf07a1568ed738a4f69692"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b2f5ba8403cbd679694cf9665e2690f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b2f5ba8403cbd679694cf9665e2690f">CAN_F9R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga6b2f5ba8403cbd679694cf9665e2690f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaca5a17ed59696ed0572b80767c4bef81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca5a17ed59696ed0572b80767c4bef81">CAN_F9R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaca5a17ed59696ed0572b80767c4bef81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac318672024cefb98843d473cbb2d46b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac318672024cefb98843d473cbb2d46b2">CAN_F9R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gac318672024cefb98843d473cbb2d46b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3523d55c8cf0a308fea4837b00f89abb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3523d55c8cf0a308fea4837b00f89abb">CAN_F9R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga3523d55c8cf0a308fea4837b00f89abb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga21d8d812323030dd39f417318c36b8dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga21d8d812323030dd39f417318c36b8dc">CAN_F9R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga21d8d812323030dd39f417318c36b8dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga065bba6dde8a5b81b42c2618204bf0be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga065bba6dde8a5b81b42c2618204bf0be">CAN_F9R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga065bba6dde8a5b81b42c2618204bf0be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade5290535026c192f7e94a4cb98e48b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade5290535026c192f7e94a4cb98e48b4">CAN_F9R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:gade5290535026c192f7e94a4cb98e48b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac7e7544d60c3084da344ee20ab6a760"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac7e7544d60c3084da344ee20ab6a760">CAN_F9R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaac7e7544d60c3084da344ee20ab6a760"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae965845f1e45d1f45831be60829e63bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae965845f1e45d1f45831be60829e63bc">CAN_F9R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gae965845f1e45d1f45831be60829e63bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63bbecf009bf6bd61dc9e8fe0603da73"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga63bbecf009bf6bd61dc9e8fe0603da73">CAN_F9R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:ga63bbecf009bf6bd61dc9e8fe0603da73"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga834cf606ef4b69b0c459b8cb9e836a9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga834cf606ef4b69b0c459b8cb9e836a9b">CAN_F9R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga834cf606ef4b69b0c459b8cb9e836a9b"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9c833e07b7a842ba7425291f628c9a11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c833e07b7a842ba7425291f628c9a11">CAN_F9R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:ga9c833e07b7a842ba7425291f628c9a11"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga18ef7c7bae75406a267e6a333c549a9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga18ef7c7bae75406a267e6a333c549a9f">CAN_F9R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga18ef7c7bae75406a267e6a333c549a9f"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga616898121d5befed0eb5ab61492872f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga616898121d5befed0eb5ab61492872f2">CAN_F10R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga616898121d5befed0eb5ab61492872f2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaa24b6ba1e723098e55e4affc793558c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa24b6ba1e723098e55e4affc793558c5">CAN_F10R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaa24b6ba1e723098e55e4affc793558c5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1b7fc9db4e77e216f37bf088d7b7703c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b7fc9db4e77e216f37bf088d7b7703c">CAN_F10R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga1b7fc9db4e77e216f37bf088d7b7703c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2348cdfff622628147e2c1df0a35363c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2348cdfff622628147e2c1df0a35363c">CAN_F10R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga2348cdfff622628147e2c1df0a35363c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaebde0ea1e0aaf38fdcf1584e9c9b2063"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaebde0ea1e0aaf38fdcf1584e9c9b2063">CAN_F10R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaebde0ea1e0aaf38fdcf1584e9c9b2063"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3b5b32b71c86c6dc7040b3044be61af7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b5b32b71c86c6dc7040b3044be61af7">CAN_F10R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga3b5b32b71c86c6dc7040b3044be61af7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9df7daa799c7c73d9a56de5f92285aca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9df7daa799c7c73d9a56de5f92285aca">CAN_F10R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga9df7daa799c7c73d9a56de5f92285aca"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaed755173b9d4375b40d73cab90396adc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaed755173b9d4375b40d73cab90396adc">CAN_F10R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:gaed755173b9d4375b40d73cab90396adc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a8d08fea6e7307f6d1d602e113a6d27"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a8d08fea6e7307f6d1d602e113a6d27">CAN_F10R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga8a8d08fea6e7307f6d1d602e113a6d27"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6aecdda55a484aa0e96c89f5d0f42aba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6aecdda55a484aa0e96c89f5d0f42aba">CAN_F10R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga6aecdda55a484aa0e96c89f5d0f42aba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4da658bf0a044b327c5efcc592e0ebe1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4da658bf0a044b327c5efcc592e0ebe1">CAN_F10R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga4da658bf0a044b327c5efcc592e0ebe1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae6ec91db97da763ae1da98ef3a3f7fea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae6ec91db97da763ae1da98ef3a3f7fea">CAN_F10R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:gae6ec91db97da763ae1da98ef3a3f7fea"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga62bba82d177602a29448acf481a7f691"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62bba82d177602a29448acf481a7f691">CAN_F10R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga62bba82d177602a29448acf481a7f691"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ce79aa37f7a175695fb910f986b7d81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ce79aa37f7a175695fb910f986b7d81">CAN_F10R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga6ce79aa37f7a175695fb910f986b7d81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf31488587e33ea32b60a5c21f3e3aff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf31488587e33ea32b60a5c21f3e3aff">CAN_F10R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gadf31488587e33ea32b60a5c21f3e3aff"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad8c7c289c07afb023bb3eedfe4d5a9b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8c7c289c07afb023bb3eedfe4d5a9b1">CAN_F10R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gad8c7c289c07afb023bb3eedfe4d5a9b1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga74258ab493246fefc21ddc475dcfda4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74258ab493246fefc21ddc475dcfda4a">CAN_F10R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga74258ab493246fefc21ddc475dcfda4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabcf9f2daaa27f340a8cd4e64533f5caf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabcf9f2daaa27f340a8cd4e64533f5caf">CAN_F10R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gabcf9f2daaa27f340a8cd4e64533f5caf"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2b8ad53931f4cb3bebb3f557d8686066"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b8ad53931f4cb3bebb3f557d8686066">CAN_F10R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga2b8ad53931f4cb3bebb3f557d8686066"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f0b00c508bddf59fd290091e738a340"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9f0b00c508bddf59fd290091e738a340">CAN_F10R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga9f0b00c508bddf59fd290091e738a340"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb9db852d4bf1332f748a0cfc0063364"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb9db852d4bf1332f748a0cfc0063364">CAN_F10R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gadb9db852d4bf1332f748a0cfc0063364"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga616164fcd20341e4eed5b10a8fd2837c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga616164fcd20341e4eed5b10a8fd2837c">CAN_F10R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga616164fcd20341e4eed5b10a8fd2837c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae70893925ea53547e9ce780c0480587b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae70893925ea53547e9ce780c0480587b">CAN_F10R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gae70893925ea53547e9ce780c0480587b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaed74e80c74c6c5e12d26abbc0d923787"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaed74e80c74c6c5e12d26abbc0d923787">CAN_F10R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:gaed74e80c74c6c5e12d26abbc0d923787"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaecb5b90d073107f3c5612379aaffa7ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaecb5b90d073107f3c5612379aaffa7ce">CAN_F10R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gaecb5b90d073107f3c5612379aaffa7ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga678702522f87f63edfcad21194be3c53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga678702522f87f63edfcad21194be3c53">CAN_F10R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga678702522f87f63edfcad21194be3c53"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4523c34e7f333636fade643b895b8f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf4523c34e7f333636fade643b895b8f5">CAN_F10R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaf4523c34e7f333636fade643b895b8f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf0e55fcb496970abe8fea481561f886"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf0e55fcb496970abe8fea481561f886">CAN_F10R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gacf0e55fcb496970abe8fea481561f886"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e4683223d46d60897b2c46b02addec5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e4683223d46d60897b2c46b02addec5">CAN_F10R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga4e4683223d46d60897b2c46b02addec5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6df50371abf968f0638faf7e0bf76cc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6df50371abf968f0638faf7e0bf76cc8">CAN_F10R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga6df50371abf968f0638faf7e0bf76cc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab294aa73a3fdfc60672b206bd57a1e08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab294aa73a3fdfc60672b206bd57a1e08">CAN_F10R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gab294aa73a3fdfc60672b206bd57a1e08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2de1906dc4119b37b29bbe25e3e6dbe0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2de1906dc4119b37b29bbe25e3e6dbe0">CAN_F10R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga2de1906dc4119b37b29bbe25e3e6dbe0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacad6560088b586891d446952bbd8fbbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacad6560088b586891d446952bbd8fbbe">CAN_F11R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gacad6560088b586891d446952bbd8fbbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac81bc667cb0c63aa0448f6e0eb1d105d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac81bc667cb0c63aa0448f6e0eb1d105d">CAN_F11R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gac81bc667cb0c63aa0448f6e0eb1d105d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8dab8868637d6d6fb707b6a37a5989b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8dab8868637d6d6fb707b6a37a5989b5">CAN_F11R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga8dab8868637d6d6fb707b6a37a5989b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga559246cfa4658a5adaa282e4a3b35dd5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga559246cfa4658a5adaa282e4a3b35dd5">CAN_F11R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga559246cfa4658a5adaa282e4a3b35dd5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga499aebdfc0c14b9c399698e28fde3e50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga499aebdfc0c14b9c399698e28fde3e50">CAN_F11R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga499aebdfc0c14b9c399698e28fde3e50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1613d097fe5b7107ff36f97a9263bd38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1613d097fe5b7107ff36f97a9263bd38">CAN_F11R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga1613d097fe5b7107ff36f97a9263bd38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9db1830185822d66619059a644d86ffe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9db1830185822d66619059a644d86ffe">CAN_F11R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga9db1830185822d66619059a644d86ffe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab35bedade0c9f71455abfbbac2edee14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab35bedade0c9f71455abfbbac2edee14">CAN_F11R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gab35bedade0c9f71455abfbbac2edee14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac79ac007ffed536eedddffdd2615c5f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac79ac007ffed536eedddffdd2615c5f7">CAN_F11R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gac79ac007ffed536eedddffdd2615c5f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5900c2273c405ce35b9bd52b189c102"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5900c2273c405ce35b9bd52b189c102">CAN_F11R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gad5900c2273c405ce35b9bd52b189c102"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9dad5ea347a6a928997a0a1c149369ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9dad5ea347a6a928997a0a1c149369ce">CAN_F11R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga9dad5ea347a6a928997a0a1c149369ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9285109080a523012f27b3bdbabc6949"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9285109080a523012f27b3bdbabc6949">CAN_F11R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga9285109080a523012f27b3bdbabc6949"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65cdf759738f8b0cb8c4c3231453aad8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65cdf759738f8b0cb8c4c3231453aad8">CAN_F11R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga65cdf759738f8b0cb8c4c3231453aad8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga24a40efa6debcdcfef0f7ab6d8b3eb04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga24a40efa6debcdcfef0f7ab6d8b3eb04">CAN_F11R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga24a40efa6debcdcfef0f7ab6d8b3eb04"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaa923634a3432436c4c84e65be1fd39d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa923634a3432436c4c84e65be1fd39d6">CAN_F11R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:gaa923634a3432436c4c84e65be1fd39d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65bae4ee01f83fe051acee8ee4c8a10e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65bae4ee01f83fe051acee8ee4c8a10e">CAN_F11R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:ga65bae4ee01f83fe051acee8ee4c8a10e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b6762f3642ce7a06fff58270ac9f53f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b6762f3642ce7a06fff58270ac9f53f">CAN_F11R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga7b6762f3642ce7a06fff58270ac9f53f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga69c7d6a41708543278980035b64bd31b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga69c7d6a41708543278980035b64bd31b">CAN_F11R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga69c7d6a41708543278980035b64bd31b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88d6d67020cbc5a4d5f0b7c5dc488aa6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88d6d67020cbc5a4d5f0b7c5dc488aa6">CAN_F11R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga88d6d67020cbc5a4d5f0b7c5dc488aa6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07f4a8d606f2063be35b52e1fc5e4b58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07f4a8d606f2063be35b52e1fc5e4b58">CAN_F11R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga07f4a8d606f2063be35b52e1fc5e4b58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58c6e5b0076c31b7bee1c9aea94e11fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga58c6e5b0076c31b7bee1c9aea94e11fb">CAN_F11R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga58c6e5b0076c31b7bee1c9aea94e11fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93bf815d462dc3a40725f73e107e11f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93bf815d462dc3a40725f73e107e11f5">CAN_F11R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga93bf815d462dc3a40725f73e107e11f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeebe934727476f5fde11c888c424c417"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeebe934727476f5fde11c888c424c417">CAN_F11R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gaeebe934727476f5fde11c888c424c417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8324877e56a61c15119f2ebf929894cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8324877e56a61c15119f2ebf929894cc">CAN_F11R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga8324877e56a61c15119f2ebf929894cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadfd994c36da11529ac494df973b5759c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadfd994c36da11529ac494df973b5759c">CAN_F11R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:gadfd994c36da11529ac494df973b5759c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f3e9d272b625f7d6269057aee5d7761"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f3e9d272b625f7d6269057aee5d7761">CAN_F11R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:ga8f3e9d272b625f7d6269057aee5d7761"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5da4d794a9797d14536197679b7b2b14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5da4d794a9797d14536197679b7b2b14">CAN_F11R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga5da4d794a9797d14536197679b7b2b14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9b9a815f36e7c2929f4313ca424c83a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9b9a815f36e7c2929f4313ca424c83a">CAN_F11R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:gad9b9a815f36e7c2929f4313ca424c83a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf162471f4c070d13fa409d44467373fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf162471f4c070d13fa409d44467373fc">CAN_F11R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gaf162471f4c070d13fa409d44467373fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2c301fd37e3fa27d3bd28a1f3f553e77"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c301fd37e3fa27d3bd28a1f3f553e77">CAN_F11R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga2c301fd37e3fa27d3bd28a1f3f553e77"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2bdc4ba1d0e44ba4d7a03cfd3197b687"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bdc4ba1d0e44ba4d7a03cfd3197b687">CAN_F11R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga2bdc4ba1d0e44ba4d7a03cfd3197b687"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6525c1ff364a229c9ea1b353b11be8c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6525c1ff364a229c9ea1b353b11be8c3">CAN_F11R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga6525c1ff364a229c9ea1b353b11be8c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5fd095552b3108c685514e78e43e52d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac5fd095552b3108c685514e78e43e52d">CAN_F12R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:gac5fd095552b3108c685514e78e43e52d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga450e88e19b2e478e73cbc5eef74a72d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga450e88e19b2e478e73cbc5eef74a72d2">CAN_F12R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga450e88e19b2e478e73cbc5eef74a72d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17875db304b98c38e627f7d7db339136"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17875db304b98c38e627f7d7db339136">CAN_F12R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:ga2960fee8bc56574e1b51975da7d2f041"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2960fee8bc56574e1b51975da7d2f041">CAN_F12R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2960fee8bc56574e1b51975da7d2f041"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b3b6f518fae0cb1123aa187138d90b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b3b6f518fae0cb1123aa187138d90b6">CAN_F12R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga6b3b6f518fae0cb1123aa187138d90b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39cedc414fa80ef987825daf32e11ac4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39cedc414fa80ef987825daf32e11ac4">CAN_F12R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga39cedc414fa80ef987825daf32e11ac4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga10aa07474c2e7cf7f2845d0d2b2bd383"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga10aa07474c2e7cf7f2845d0d2b2bd383">CAN_F12R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga10aa07474c2e7cf7f2845d0d2b2bd383"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga227ef5f36f6e03969cd952d62a3bc0a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga227ef5f36f6e03969cd952d62a3bc0a9">CAN_F12R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga227ef5f36f6e03969cd952d62a3bc0a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a946c991cee617b322ff9a372af3512"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a946c991cee617b322ff9a372af3512">CAN_F12R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga7a946c991cee617b322ff9a372af3512"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0ab582743e96fcd36662a9434b875bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad0ab582743e96fcd36662a9434b875bd">CAN_F12R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gad0ab582743e96fcd36662a9434b875bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga854c2b7108e33d263cc8269648f8bbbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga854c2b7108e33d263cc8269648f8bbbe">CAN_F12R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga854c2b7108e33d263cc8269648f8bbbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2ed3de0039e458bac5530d08c2e9af51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ed3de0039e458bac5530d08c2e9af51">CAN_F12R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga2ed3de0039e458bac5530d08c2e9af51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadad0db6fe916794156f773e98b524b07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadad0db6fe916794156f773e98b524b07">CAN_F12R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gadad0db6fe916794156f773e98b524b07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa7a50bd0de8b4e85d9e90c1f48ef7bc8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7a50bd0de8b4e85d9e90c1f48ef7bc8">CAN_F12R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gaa7a50bd0de8b4e85d9e90c1f48ef7bc8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c5558cc37c62c5570a5e2716e30ed99"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c5558cc37c62c5570a5e2716e30ed99">CAN_F12R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga2c5558cc37c62c5570a5e2716e30ed99"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fa511d56f90a2ee10e44e56e378f7ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fa511d56f90a2ee10e44e56e378f7ed">CAN_F12R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga9fa511d56f90a2ee10e44e56e378f7ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga77ae08ea078773a1aecbf74e89dc2a5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga77ae08ea078773a1aecbf74e89dc2a5d">CAN_F12R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga77ae08ea078773a1aecbf74e89dc2a5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a94ac3d4ba5c16a98fc04144ae3bb86"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a94ac3d4ba5c16a98fc04144ae3bb86">CAN_F12R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga3a94ac3d4ba5c16a98fc04144ae3bb86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9070c9b9eec5dea6b5c4cdbaa1d5918"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9070c9b9eec5dea6b5c4cdbaa1d5918">CAN_F12R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:gae9070c9b9eec5dea6b5c4cdbaa1d5918"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga758cacc8b96577bb3663da1fae36040b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga758cacc8b96577bb3663da1fae36040b">CAN_F12R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga758cacc8b96577bb3663da1fae36040b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80db4704807d6df4aaee2eebfcf5210a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80db4704807d6df4aaee2eebfcf5210a">CAN_F12R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga80db4704807d6df4aaee2eebfcf5210a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac3d3fb3a9b4b6b90139024bef933bc3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3d3fb3a9b4b6b90139024bef933bc3d">CAN_F12R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:gac3d3fb3a9b4b6b90139024bef933bc3d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga24e87973f51235e81195d84f78489cb0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga24e87973f51235e81195d84f78489cb0">CAN_F12R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:ga24e87973f51235e81195d84f78489cb0"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4e917f2a362569d86a75a34eddce636c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e917f2a362569d86a75a34eddce636c">CAN_F12R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga4e917f2a362569d86a75a34eddce636c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad6e5f2c5de8981fbfc152926fc8fb057"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad6e5f2c5de8981fbfc152926fc8fb057">CAN_F12R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gad6e5f2c5de8981fbfc152926fc8fb057"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaaad1149501e8f926a247aa532405c0b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaad1149501e8f926a247aa532405c0b9">CAN_F12R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
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||
<tr class="separator:gaaad1149501e8f926a247aa532405c0b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53538969afd7e43cc7fed4c400ab6f5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53538969afd7e43cc7fed4c400ab6f5a">CAN_F12R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
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||
<tr class="separator:ga53538969afd7e43cc7fed4c400ab6f5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74e04fa5d17a7cc7687c0ca40dd571ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74e04fa5d17a7cc7687c0ca40dd571ce">CAN_F12R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
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||
<tr class="separator:ga74e04fa5d17a7cc7687c0ca40dd571ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc1d97354c1649fa5ddc46f4271297d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadc1d97354c1649fa5ddc46f4271297d9">CAN_F12R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gadc1d97354c1649fa5ddc46f4271297d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga71b870003e469dcb24979e835a2f81a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga71b870003e469dcb24979e835a2f81a4">CAN_F12R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
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||
<tr class="separator:ga71b870003e469dcb24979e835a2f81a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2894b732a9683d32620fb90b06ba9f62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2894b732a9683d32620fb90b06ba9f62">CAN_F12R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
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||
<tr class="separator:ga2894b732a9683d32620fb90b06ba9f62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab11cddebcb4e1ab70b7222a999d0c58a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab11cddebcb4e1ab70b7222a999d0c58a">CAN_F12R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:gab11cddebcb4e1ab70b7222a999d0c58a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0b6865be0c757b49a250a537d73ae85e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b6865be0c757b49a250a537d73ae85e">CAN_F13R2_FB0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga0b6865be0c757b49a250a537d73ae85e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf18df9b2fd549b8991fdd9f8f94e7cbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf18df9b2fd549b8991fdd9f8f94e7cbb">CAN_F13R2_FB1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gaf18df9b2fd549b8991fdd9f8f94e7cbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga034e8f5b7675ce34eb2792531c7e174d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga034e8f5b7675ce34eb2792531c7e174d">CAN_F13R2_FB2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga034e8f5b7675ce34eb2792531c7e174d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf19767c0892dffb6eff8c5a3b0e254f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf19767c0892dffb6eff8c5a3b0e254f5">CAN_F13R2_FB3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gaf19767c0892dffb6eff8c5a3b0e254f5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad03b0ab4d686a1ad858f1ba4b679fff9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad03b0ab4d686a1ad858f1ba4b679fff9">CAN_F13R2_FB4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gad03b0ab4d686a1ad858f1ba4b679fff9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e37522978ae2e88c27f5604c5517d42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e37522978ae2e88c27f5604c5517d42">CAN_F13R2_FB5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga8e37522978ae2e88c27f5604c5517d42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2bf6fff2ca4adf6e093a13b2db77adbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bf6fff2ca4adf6e093a13b2db77adbb">CAN_F13R2_FB6</a>   ((uint32_t)0x00000040)</td></tr>
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||
<tr class="separator:ga2bf6fff2ca4adf6e093a13b2db77adbb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gabca970c306c9c9b576ef3424f686f324"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabca970c306c9c9b576ef3424f686f324">CAN_F13R2_FB7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:gabca970c306c9c9b576ef3424f686f324"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae44e1d120c773c9dc26f418acf3cb6de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae44e1d120c773c9dc26f418acf3cb6de">CAN_F13R2_FB8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:gae44e1d120c773c9dc26f418acf3cb6de"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga891d1d97e1a57c4cfa1a714b61b083eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga891d1d97e1a57c4cfa1a714b61b083eb">CAN_F13R2_FB9</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga891d1d97e1a57c4cfa1a714b61b083eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb4be9c1da46b251c43c0aafe7b04497"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb4be9c1da46b251c43c0aafe7b04497">CAN_F13R2_FB10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gafb4be9c1da46b251c43c0aafe7b04497"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga47f5215de00574378a489f90eb11eff4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47f5215de00574378a489f90eb11eff4">CAN_F13R2_FB11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga47f5215de00574378a489f90eb11eff4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac3bbd5350aeb18966e2a40e2dc4223e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3bbd5350aeb18966e2a40e2dc4223e3">CAN_F13R2_FB12</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gac3bbd5350aeb18966e2a40e2dc4223e3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2d97199e363dd56cd9a455aec75ef1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2d97199e363dd56cd9a455aec75ef1c">CAN_F13R2_FB13</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gab2d97199e363dd56cd9a455aec75ef1c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0731f4e60125130bebf88d33fd4ae3ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0731f4e60125130bebf88d33fd4ae3ca">CAN_F13R2_FB14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga0731f4e60125130bebf88d33fd4ae3ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1683c0cc3b3143a919f4dd59243eba9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1683c0cc3b3143a919f4dd59243eba9f">CAN_F13R2_FB15</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga1683c0cc3b3143a919f4dd59243eba9f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad2ed74a0929c6d397c14f49f114f13bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad2ed74a0929c6d397c14f49f114f13bf">CAN_F13R2_FB16</a>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gad2ed74a0929c6d397c14f49f114f13bf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafde6cdff22bf29d31b5be1b309fe4dde"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafde6cdff22bf29d31b5be1b309fe4dde">CAN_F13R2_FB17</a>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gafde6cdff22bf29d31b5be1b309fe4dde"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabb873fa1c32fbf6c5a2f3be93ba2f2e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb873fa1c32fbf6c5a2f3be93ba2f2e6">CAN_F13R2_FB18</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gabb873fa1c32fbf6c5a2f3be93ba2f2e6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf82a4dfd4d3c7a13232479be997ed1f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf82a4dfd4d3c7a13232479be997ed1f9">CAN_F13R2_FB19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gaf82a4dfd4d3c7a13232479be997ed1f9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7bf4384e44f002392339a71bc9c912c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7bf4384e44f002392339a71bc9c912c">CAN_F13R2_FB20</a>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gaa7bf4384e44f002392339a71bc9c912c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7023986be02dd8f736e04e658844061"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7023986be02dd8f736e04e658844061">CAN_F13R2_FB21</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gaa7023986be02dd8f736e04e658844061"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd059121f2a882342a409ebef8a96999"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafd059121f2a882342a409ebef8a96999">CAN_F13R2_FB22</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gafd059121f2a882342a409ebef8a96999"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5ef57f88bf1e6e34b0096013278926c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ef57f88bf1e6e34b0096013278926c0">CAN_F13R2_FB23</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga5ef57f88bf1e6e34b0096013278926c0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4847de9f5b54fc5ce00e0fba69564d2d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4847de9f5b54fc5ce00e0fba69564d2d">CAN_F13R2_FB24</a>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga4847de9f5b54fc5ce00e0fba69564d2d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2c415fa87c556bd8a4fc0f680d25f160"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c415fa87c556bd8a4fc0f680d25f160">CAN_F13R2_FB25</a>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga2c415fa87c556bd8a4fc0f680d25f160"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga20487222c41a08fe68b9ce58dfd52fff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20487222c41a08fe68b9ce58dfd52fff">CAN_F13R2_FB26</a>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga20487222c41a08fe68b9ce58dfd52fff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0d5ca021778a6e84fd3c0ad8981255d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0d5ca021778a6e84fd3c0ad8981255d">CAN_F13R2_FB27</a>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gaa0d5ca021778a6e84fd3c0ad8981255d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2f0c8c09be20a14f29ab46d53dd712ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f0c8c09be20a14f29ab46d53dd712ba">CAN_F13R2_FB28</a>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga2f0c8c09be20a14f29ab46d53dd712ba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga26161b84a5fc507f959b620c8e380703"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26161b84a5fc507f959b620c8e380703">CAN_F13R2_FB29</a>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga26161b84a5fc507f959b620c8e380703"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e753550a0a8547c7f64346e22925012"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e753550a0a8547c7f64346e22925012">CAN_F13R2_FB30</a>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga1e753550a0a8547c7f64346e22925012"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga305ac04b1c5198a4f82c78c570ce7f97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga305ac04b1c5198a4f82c78c570ce7f97">CAN_F13R2_FB31</a>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga305ac04b1c5198a4f82c78c570ce7f97"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2bf4701d3b15924e657942ce3caa4105"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bf4701d3b15924e657942ce3caa4105">CRC_DR_DR</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga2bf4701d3b15924e657942ce3caa4105"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9a0feb3cf1d8c5871e663ca4a174cc0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9a0feb3cf1d8c5871e663ca4a174cc0">CRC_IDR_IDR</a>   ((uint8_t)0xFF)</td></tr>
|
||
<tr class="separator:gae9a0feb3cf1d8c5871e663ca4a174cc0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7d57481fb891a0964b40f721354c56d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d57481fb891a0964b40f721354c56d7">CRC_CR_RESET</a>   ((uint8_t)0x01)</td></tr>
|
||
<tr class="separator:ga7d57481fb891a0964b40f721354c56d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8d0b1fad863e32d3bd9b95ecc7082e43"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d0b1fad863e32d3bd9b95ecc7082e43"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGODIR</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga8d0b1fad863e32d3bd9b95ecc7082e43"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40666a9903ed0e307b0f97ae7473f7fe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40666a9903ed0e307b0f97ae7473f7fe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE</b>   ((uint32_t)0x00080038)</td></tr>
|
||
<tr class="separator:ga40666a9903ed0e307b0f97ae7473f7fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf63b47c94b9fc9dad1382b9eabddb3a7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf63b47c94b9fc9dad1382b9eabddb3a7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_0</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaf63b47c94b9fc9dad1382b9eabddb3a7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b1c1d672a3959c76b36321a17b9bfaf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b1c1d672a3959c76b36321a17b9bfaf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_1</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga6b1c1d672a3959c76b36321a17b9bfaf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac04af940f21f9f865aaf43fc1c352331"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac04af940f21f9f865aaf43fc1c352331"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_2</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gac04af940f21f9f865aaf43fc1c352331"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac63bb6a7288f4287842acc3b82a5252e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac63bb6a7288f4287842acc3b82a5252e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_TDES_ECB</b>   ((uint32_t)0x00000000)</td></tr>
|
||
<tr class="separator:gac63bb6a7288f4287842acc3b82a5252e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaff78552081418931926c17802e4e3bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaff78552081418931926c17802e4e3bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_TDES_CBC</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaaff78552081418931926c17802e4e3bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga30e3cb1cae9167a9548d91baee97ec35"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga30e3cb1cae9167a9548d91baee97ec35"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_DES_ECB</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga30e3cb1cae9167a9548d91baee97ec35"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e84254439a55f626512f909c1182f2e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e84254439a55f626512f909c1182f2e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_DES_CBC</b>   ((uint32_t)0x00000018)</td></tr>
|
||
<tr class="separator:ga5e84254439a55f626512f909c1182f2e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaad5ef5312e7abda965d91a542dbfb33f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaad5ef5312e7abda965d91a542dbfb33f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_AES_ECB</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaad5ef5312e7abda965d91a542dbfb33f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9c8b2e0fc771fafb1c9194a8bc4fe9ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c8b2e0fc771fafb1c9194a8bc4fe9ef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_AES_CBC</b>   ((uint32_t)0x00000028)</td></tr>
|
||
<tr class="separator:ga9c8b2e0fc771fafb1c9194a8bc4fe9ef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga03eb6f14043a083c78fd0b27d1432530"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga03eb6f14043a083c78fd0b27d1432530"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_AES_CTR</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga03eb6f14043a083c78fd0b27d1432530"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga122cc878a5d8a4cee1185acb84e6bb51"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga122cc878a5d8a4cee1185acb84e6bb51"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_AES_KEY</b>   ((uint32_t)0x00000038)</td></tr>
|
||
<tr class="separator:ga122cc878a5d8a4cee1185acb84e6bb51"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74666b00f58b456a15c19e8614ae1854"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga74666b00f58b456a15c19e8614ae1854"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_DATATYPE</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:ga74666b00f58b456a15c19e8614ae1854"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b0e6c625b9ac13ed14230e5d9361522"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b0e6c625b9ac13ed14230e5d9361522"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_DATATYPE_0</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga6b0e6c625b9ac13ed14230e5d9361522"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf52b335e410455efe82e65fd1bfdd790"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf52b335e410455efe82e65fd1bfdd790"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_DATATYPE_1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaf52b335e410455efe82e65fd1bfdd790"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadc5c522813daf4eaffdf6f8be153125b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc5c522813daf4eaffdf6f8be153125b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_KEYSIZE</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:gadc5c522813daf4eaffdf6f8be153125b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga65f21ce543e31df15cd17c59376620ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga65f21ce543e31df15cd17c59376620ce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_KEYSIZE_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga65f21ce543e31df15cd17c59376620ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga12b74eda84734e53cf2a947eb04d2deb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga12b74eda84734e53cf2a947eb04d2deb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_KEYSIZE_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga12b74eda84734e53cf2a947eb04d2deb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a359cd42efacc743ee2dedc39880f8a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a359cd42efacc743ee2dedc39880f8a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_FFLUSH</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga1a359cd42efacc743ee2dedc39880f8a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga25df318843643ead955eca7609b28d73"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25df318843643ead955eca7609b28d73"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_CRYPEN</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga25df318843643ead955eca7609b28d73"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf61fd2f9d1f47ec7ea3d2e10f0b57f3d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf61fd2f9d1f47ec7ea3d2e10f0b57f3d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_GCM_CCMPH</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:gaf61fd2f9d1f47ec7ea3d2e10f0b57f3d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44f12cbb1f370dad12d1ba31362182d8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44f12cbb1f370dad12d1ba31362182d8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_GCM_CCMPH_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga44f12cbb1f370dad12d1ba31362182d8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2d3cddffd085eb0f93412c7816ad357e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d3cddffd085eb0f93412c7816ad357e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_GCM_CCMPH_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga2d3cddffd085eb0f93412c7816ad357e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gab949a7e6ddad78b872c50d610f203b93"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab949a7e6ddad78b872c50d610f203b93"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_CR_ALGOMODE_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gab949a7e6ddad78b872c50d610f203b93"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2d87f1dbfad020facc86ee16d252e8b4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d87f1dbfad020facc86ee16d252e8b4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_SR_IFEM</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga2d87f1dbfad020facc86ee16d252e8b4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0660e3027e8beb744e899a8aa84a01e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa0660e3027e8beb744e899a8aa84a01e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_SR_IFNF</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaa0660e3027e8beb744e899a8aa84a01e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5d771e3eecaee296480a963f6401fda8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d771e3eecaee296480a963f6401fda8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_SR_OFNE</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5d771e3eecaee296480a963f6401fda8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga88d5c4f860a950322b174617da6d4c87"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga88d5c4f860a950322b174617da6d4c87"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_SR_OFFU</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga88d5c4f860a950322b174617da6d4c87"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadbb845ce0da21442b692233390fb9ec0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadbb845ce0da21442b692233390fb9ec0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_SR_BUSY</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gadbb845ce0da21442b692233390fb9ec0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2ec62fd5243301ec46f39704fa87d2b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2ec62fd5243301ec46f39704fa87d2b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_DMACR_DIEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga2ec62fd5243301ec46f39704fa87d2b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6a958dc3179d0b1af43041573182bf02"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a958dc3179d0b1af43041573182bf02"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_DMACR_DOEN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga6a958dc3179d0b1af43041573182bf02"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga823629d5a10df713041ca2cbca436324"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga823629d5a10df713041ca2cbca436324"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_IMSCR_INIM</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga823629d5a10df713041ca2cbca436324"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04ca7302961b816f45a629b858794276"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04ca7302961b816f45a629b858794276"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_IMSCR_OUTIM</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga04ca7302961b816f45a629b858794276"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga191ad1ada022ccbcb0cee1200eea8cf8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga191ad1ada022ccbcb0cee1200eea8cf8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_RISR_OUTRIS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga191ad1ada022ccbcb0cee1200eea8cf8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46c6f8f9f70420f0cd1d9df6d89d77d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46c6f8f9f70420f0cd1d9df6d89d77d3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_RISR_INRIS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga46c6f8f9f70420f0cd1d9df6d89d77d3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab5760130c56f24263ac1a51b5db5598e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5760130c56f24263ac1a51b5db5598e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_MISR_INMIS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gab5760130c56f24263ac1a51b5db5598e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabbfecc9bb7988213f9d72282c2bbebb0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabbfecc9bb7988213f9d72282c2bbebb0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CRYP_MISR_OUTMIS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gabbfecc9bb7988213f9d72282c2bbebb0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabd8cedbb3dda03d56ac0ba92d2d9cefd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd8cedbb3dda03d56ac0ba92d2d9cefd">DAC_CR_EN1</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gabd8cedbb3dda03d56ac0ba92d2d9cefd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b1e2b83ae1ab889cb1e34a99746c9d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b1e2b83ae1ab889cb1e34a99746c9d8">DAC_CR_BOFF1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga0b1e2b83ae1ab889cb1e34a99746c9d8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga998aa4fd791ea2f4626df6ddc8fc7109"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga998aa4fd791ea2f4626df6ddc8fc7109">DAC_CR_TEN1</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga998aa4fd791ea2f4626df6ddc8fc7109"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf951c1a57a1a19e356df57d908f09c6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf951c1a57a1a19e356df57d908f09c6c">DAC_CR_TSEL1</a>   ((uint32_t)0x00000038)</td></tr>
|
||
<tr class="separator:gaf951c1a57a1a19e356df57d908f09c6c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8dfa13ec123c583136e24b7890add45b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8dfa13ec123c583136e24b7890add45b">DAC_CR_TSEL1_0</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga8dfa13ec123c583136e24b7890add45b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga265e32c4fc43310acdf3ebea01376766"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga265e32c4fc43310acdf3ebea01376766">DAC_CR_TSEL1_1</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga265e32c4fc43310acdf3ebea01376766"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa625d7638422e90a616ac93edd4bf408"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa625d7638422e90a616ac93edd4bf408">DAC_CR_TSEL1_2</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaa625d7638422e90a616ac93edd4bf408"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90491f31219d07175629eecdcdc9271e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga90491f31219d07175629eecdcdc9271e">DAC_CR_WAVE1</a>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:ga90491f31219d07175629eecdcdc9271e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0871e6466e3a7378103c431832ae525a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0871e6466e3a7378103c431832ae525a">DAC_CR_WAVE1_0</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga0871e6466e3a7378103c431832ae525a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga48e167ae02d2ad5bc9fd30c2f8ea5b37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga48e167ae02d2ad5bc9fd30c2f8ea5b37">DAC_CR_WAVE1_1</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga48e167ae02d2ad5bc9fd30c2f8ea5b37"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3bcf611b2f0b975513325895bf16e085"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3bcf611b2f0b975513325895bf16e085">DAC_CR_MAMP1</a>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga3bcf611b2f0b975513325895bf16e085"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4225dcce22b440fcd3a8ad96c5f2baec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4225dcce22b440fcd3a8ad96c5f2baec">DAC_CR_MAMP1_0</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga4225dcce22b440fcd3a8ad96c5f2baec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6cc15817842cb7992d449c448684f68d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6cc15817842cb7992d449c448684f68d">DAC_CR_MAMP1_1</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga6cc15817842cb7992d449c448684f68d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0fefef1d798a2685b03e44bd9fdac06b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0fefef1d798a2685b03e44bd9fdac06b">DAC_CR_MAMP1_2</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga0fefef1d798a2685b03e44bd9fdac06b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafdc83b4feb742c632ba66f55d102432b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdc83b4feb742c632ba66f55d102432b">DAC_CR_MAMP1_3</a>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gafdc83b4feb742c632ba66f55d102432b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga995c19d8c8de9ee09057ec6151154e17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga995c19d8c8de9ee09057ec6151154e17">DAC_CR_DMAEN1</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga995c19d8c8de9ee09057ec6151154e17"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa65db2420e02fc6813842f57134d898f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa65db2420e02fc6813842f57134d898f">DAC_CR_EN2</a>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaa65db2420e02fc6813842f57134d898f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadd6f660a5f15262beca06b9098a559e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd6f660a5f15262beca06b9098a559e9">DAC_CR_BOFF2</a>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gadd6f660a5f15262beca06b9098a559e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8fc527f6ddb787123da09d2085b772f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8fc527f6ddb787123da09d2085b772f">DAC_CR_TEN2</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gab8fc527f6ddb787123da09d2085b772f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga73b4d0ccff78f7c3862903e7b0e66302"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga73b4d0ccff78f7c3862903e7b0e66302">DAC_CR_TSEL2</a>   ((uint32_t)0x00380000)</td></tr>
|
||
<tr class="separator:ga73b4d0ccff78f7c3862903e7b0e66302"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9753b87f31e7106ecf77b2f01a99b237"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9753b87f31e7106ecf77b2f01a99b237">DAC_CR_TSEL2_0</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga9753b87f31e7106ecf77b2f01a99b237"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac79323a6c81bfa5c8239b23cd3db737a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac79323a6c81bfa5c8239b23cd3db737a">DAC_CR_TSEL2_1</a>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gac79323a6c81bfa5c8239b23cd3db737a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ad3da8a9c5fe9566d8ffe38916caaff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ad3da8a9c5fe9566d8ffe38916caaff">DAC_CR_TSEL2_2</a>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga9ad3da8a9c5fe9566d8ffe38916caaff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacf24e48cf288db4a4643057dd09e3a7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf24e48cf288db4a4643057dd09e3a7b">DAC_CR_WAVE2</a>   ((uint32_t)0x00C00000)</td></tr>
|
||
<tr class="separator:gacf24e48cf288db4a4643057dd09e3a7b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55d97d8bcbfdd72d5aeb9e9fbc0d592d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga55d97d8bcbfdd72d5aeb9e9fbc0d592d">DAC_CR_WAVE2_0</a>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga55d97d8bcbfdd72d5aeb9e9fbc0d592d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4798bf254010b442b4ac4288c2f1b65f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4798bf254010b442b4ac4288c2f1b65f">DAC_CR_WAVE2_1</a>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga4798bf254010b442b4ac4288c2f1b65f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7cf03fe2359cb0f11c33f793c2e92bdd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7cf03fe2359cb0f11c33f793c2e92bdd">DAC_CR_MAMP2</a>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga7cf03fe2359cb0f11c33f793c2e92bdd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae8d952192721dbdcea8d707d43096454"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8d952192721dbdcea8d707d43096454">DAC_CR_MAMP2_0</a>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:gae8d952192721dbdcea8d707d43096454"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga860032e8196838cd36a655c1749139d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga860032e8196838cd36a655c1749139d6">DAC_CR_MAMP2_1</a>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga860032e8196838cd36a655c1749139d6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2147ffa3282e9ff22475e5d6040f269e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2147ffa3282e9ff22475e5d6040f269e">DAC_CR_MAMP2_2</a>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga2147ffa3282e9ff22475e5d6040f269e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0fe77a2029873111cbe723a5cba9c57"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0fe77a2029873111cbe723a5cba9c57">DAC_CR_MAMP2_3</a>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gaa0fe77a2029873111cbe723a5cba9c57"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f905c2ac89f976df6c4beffdde58b53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f905c2ac89f976df6c4beffdde58b53">DAC_CR_DMAEN2</a>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga6f905c2ac89f976df6c4beffdde58b53"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga970ef02dffaceb35ff1dd7aceb67acdd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga970ef02dffaceb35ff1dd7aceb67acdd">DAC_SWTRIGR_SWTRIG1</a>   ((uint8_t)0x01)</td></tr>
|
||
<tr class="separator:ga970ef02dffaceb35ff1dd7aceb67acdd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf0e53585b505d21f5c457476bd5a18f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0e53585b505d21f5c457476bd5a18f8">DAC_SWTRIGR_SWTRIG2</a>   ((uint8_t)0x02)</td></tr>
|
||
<tr class="separator:gaf0e53585b505d21f5c457476bd5a18f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5295b5cb7f5d71ed2e8a310deb00013d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5295b5cb7f5d71ed2e8a310deb00013d">DAC_DHR12R1_DACC1DHR</a>   ((uint16_t)0x0FFF)</td></tr>
|
||
<tr class="separator:ga5295b5cb7f5d71ed2e8a310deb00013d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d34667f8f4b753689c8c936c28471c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d34667f8f4b753689c8c936c28471c5">DAC_DHR12L1_DACC1DHR</a>   ((uint16_t)0xFFF0)</td></tr>
|
||
<tr class="separator:ga0d34667f8f4b753689c8c936c28471c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae1fc9f022fe4a08f67c51646177b26cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1fc9f022fe4a08f67c51646177b26cb">DAC_DHR8R1_DACC1DHR</a>   ((uint8_t)0xFF)</td></tr>
|
||
<tr class="separator:gae1fc9f022fe4a08f67c51646177b26cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7506e369b37d55826042b540b10e44c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7506e369b37d55826042b540b10e44c7">DAC_DHR12R2_DACC2DHR</a>   ((uint16_t)0x0FFF)</td></tr>
|
||
<tr class="separator:ga7506e369b37d55826042b540b10e44c7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f66bd794202221e1a55547673b7abab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f66bd794202221e1a55547673b7abab">DAC_DHR12L2_DACC2DHR</a>   ((uint16_t)0xFFF0)</td></tr>
|
||
<tr class="separator:ga0f66bd794202221e1a55547673b7abab"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7da94dc053e6637efb9ccb57b7ae481c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7da94dc053e6637efb9ccb57b7ae481c">DAC_DHR8R2_DACC2DHR</a>   ((uint8_t)0xFF)</td></tr>
|
||
<tr class="separator:ga7da94dc053e6637efb9ccb57b7ae481c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca45719f3d365c9495bdcf6364ae59f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca45719f3d365c9495bdcf6364ae59f8">DAC_DHR12RD_DACC1DHR</a>   ((uint32_t)0x00000FFF)</td></tr>
|
||
<tr class="separator:gaca45719f3d365c9495bdcf6364ae59f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3edd68db1697af93027e05f6b764c540"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3edd68db1697af93027e05f6b764c540">DAC_DHR12RD_DACC2DHR</a>   ((uint32_t)0x0FFF0000)</td></tr>
|
||
<tr class="separator:ga3edd68db1697af93027e05f6b764c540"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga203db656bfef6fedee17b99fb77b1bdd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga203db656bfef6fedee17b99fb77b1bdd">DAC_DHR12LD_DACC1DHR</a>   ((uint32_t)0x0000FFF0)</td></tr>
|
||
<tr class="separator:ga203db656bfef6fedee17b99fb77b1bdd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8421d613b182aab8d6c58592bcda6c17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8421d613b182aab8d6c58592bcda6c17">DAC_DHR12LD_DACC2DHR</a>   ((uint32_t)0xFFF00000)</td></tr>
|
||
<tr class="separator:ga8421d613b182aab8d6c58592bcda6c17"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9aee01ad181fa5b541864ed62907d70d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9aee01ad181fa5b541864ed62907d70d">DAC_DHR8RD_DACC1DHR</a>   ((uint16_t)0x00FF)</td></tr>
|
||
<tr class="separator:ga9aee01ad181fa5b541864ed62907d70d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae31631eaac76ebecb059918c351ef3c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae31631eaac76ebecb059918c351ef3c9">DAC_DHR8RD_DACC2DHR</a>   ((uint16_t)0xFF00)</td></tr>
|
||
<tr class="separator:gae31631eaac76ebecb059918c351ef3c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b4192938e039dc25a7df8fcc5f3932a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b4192938e039dc25a7df8fcc5f3932a">DAC_DOR1_DACC1DOR</a>   ((uint16_t)0x0FFF)</td></tr>
|
||
<tr class="separator:ga5b4192938e039dc25a7df8fcc5f3932a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacaaa39c1e82279918918b072fd56db04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacaaa39c1e82279918918b072fd56db04">DAC_DOR2_DACC2DOR</a>   ((uint16_t)0x0FFF)</td></tr>
|
||
<tr class="separator:gacaaa39c1e82279918918b072fd56db04"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7d2048d6b521fb0946dc8c4e577a49c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d2048d6b521fb0946dc8c4e577a49c0">DAC_SR_DMAUDR1</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga7d2048d6b521fb0946dc8c4e577a49c0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf16e48ab85d9261c5b599c56b14aea5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf16e48ab85d9261c5b599c56b14aea5d">DAC_SR_DMAUDR2</a>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gaf16e48ab85d9261c5b599c56b14aea5d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f8b54f16f7e17b3da807b6dae1d649e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f8b54f16f7e17b3da807b6dae1d649e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_CAPTURE</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga7f8b54f16f7e17b3da807b6dae1d649e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga47bacab13c750dc0ecc9aaf935d1f435"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga47bacab13c750dc0ecc9aaf935d1f435"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_CM</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga47bacab13c750dc0ecc9aaf935d1f435"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5bb929e7d3b4ea62e80ba66c7bc5c216"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5bb929e7d3b4ea62e80ba66c7bc5c216"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_CROP</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5bb929e7d3b4ea62e80ba66c7bc5c216"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd10a1f9c5a588f468e550bb56051b03"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd10a1f9c5a588f468e550bb56051b03"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_JPEG</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gafd10a1f9c5a588f468e550bb56051b03"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46851e2b6011a84ecdfc5218a855ad78"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46851e2b6011a84ecdfc5218a855ad78"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_ESS</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga46851e2b6011a84ecdfc5218a855ad78"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga00769f93cbcc2693c8fd42f0e8aa31ad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00769f93cbcc2693c8fd42f0e8aa31ad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_PCKPOL</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga00769f93cbcc2693c8fd42f0e8aa31ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac2042d3da2719b7c9c6708e0566e46c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2042d3da2719b7c9c6708e0566e46c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_HSPOL</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gac2042d3da2719b7c9c6708e0566e46c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga497c7c4bf6fcc842ffc45eedc876ffdb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga497c7c4bf6fcc842ffc45eedc876ffdb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_VSPOL</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga497c7c4bf6fcc842ffc45eedc876ffdb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga13263970b396f75e00278ff7b78b313d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga13263970b396f75e00278ff7b78b313d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_FCRC_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga13263970b396f75e00278ff7b78b313d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1658bed43e7d0c3579151498104d5747"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1658bed43e7d0c3579151498104d5747"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_FCRC_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga1658bed43e7d0c3579151498104d5747"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9efa61252be662ff473d14156f09d32c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9efa61252be662ff473d14156f09d32c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_EDM_0</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga9efa61252be662ff473d14156f09d32c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga884b51a3e5bf0d615944f46b1751a97c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga884b51a3e5bf0d615944f46b1751a97c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_EDM_1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga884b51a3e5bf0d615944f46b1751a97c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga79e4190a772dc07958573a110106db69"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79e4190a772dc07958573a110106db69"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_CRE</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga79e4190a772dc07958573a110106db69"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1fa2461ca2f0629c2ddd77fea94bbd06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1fa2461ca2f0629c2ddd77fea94bbd06"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_CR_ENABLE</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga1fa2461ca2f0629c2ddd77fea94bbd06"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb10174e5a89c32d6413ecf77e6610a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb10174e5a89c32d6413ecf77e6610a0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_SR_HSYNC</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gafb10174e5a89c32d6413ecf77e6610a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9608c2fdd5feb3c8c022545f8d7e6adf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9608c2fdd5feb3c8c022545f8d7e6adf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_SR_VSYNC</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9608c2fdd5feb3c8c022545f8d7e6adf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga990aaedf052bc3b9ebd115f06aa43ab2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga990aaedf052bc3b9ebd115f06aa43ab2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_SR_FNE</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga990aaedf052bc3b9ebd115f06aa43ab2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga99308f49b63dd49db671a2a26d0d07fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga99308f49b63dd49db671a2a26d0d07fa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_RISR_FRAME_RIS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga99308f49b63dd49db671a2a26d0d07fa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga510c3f423fdddf8a41b6b69d55b6c66d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga510c3f423fdddf8a41b6b69d55b6c66d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_RISR_OVF_RIS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga510c3f423fdddf8a41b6b69d55b6c66d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf03ca1f0e5e1a7868c07c8237d7e33a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf03ca1f0e5e1a7868c07c8237d7e33a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_RISR_ERR_RIS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf03ca1f0e5e1a7868c07c8237d7e33a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga08625c101d8419ca58cc7032f4a936ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga08625c101d8419ca58cc7032f4a936ec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_RISR_VSYNC_RIS</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga08625c101d8419ca58cc7032f4a936ec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf06b386a61d97e046a7f0546478b91b8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf06b386a61d97e046a7f0546478b91b8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_RISR_LINE_RIS</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaf06b386a61d97e046a7f0546478b91b8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78d30c219bf7b5ebe0f8ee74cbdae61d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga78d30c219bf7b5ebe0f8ee74cbdae61d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_IER_FRAME_IE</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga78d30c219bf7b5ebe0f8ee74cbdae61d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4f313352a86f6b09726e63f89e161187"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4f313352a86f6b09726e63f89e161187"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_IER_OVF_IE</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga4f313352a86f6b09726e63f89e161187"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacc9d64d6edc4e8ff9452db0065c12831"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacc9d64d6edc4e8ff9452db0065c12831"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_IER_ERR_IE</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gacc9d64d6edc4e8ff9452db0065c12831"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad2f335c69d18e49ffb5314e85ac1f4fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad2f335c69d18e49ffb5314e85ac1f4fc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_IER_VSYNC_IE</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad2f335c69d18e49ffb5314e85ac1f4fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a06c700c5e779551834862a2d14612e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a06c700c5e779551834862a2d14612e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_IER_LINE_IE</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga4a06c700c5e779551834862a2d14612e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga73b7d7359389df61668089920ed5b28e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73b7d7359389df61668089920ed5b28e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_MISR_FRAME_MIS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga73b7d7359389df61668089920ed5b28e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaacaced5931c5790bdf6fc9ede4591496"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaacaced5931c5790bdf6fc9ede4591496"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_MISR_OVF_MIS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaacaced5931c5790bdf6fc9ede4591496"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga117dd3b10b1c7a03016fce867a6a8281"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga117dd3b10b1c7a03016fce867a6a8281"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_MISR_ERR_MIS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga117dd3b10b1c7a03016fce867a6a8281"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a02749de4576d3631cf35dbb4e4bf5c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a02749de4576d3631cf35dbb4e4bf5c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_MISR_VSYNC_MIS</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga1a02749de4576d3631cf35dbb4e4bf5c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga77aad6389ea95913c34b2ba3a14cfdca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga77aad6389ea95913c34b2ba3a14cfdca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_MISR_LINE_MIS</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga77aad6389ea95913c34b2ba3a14cfdca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7ce2decf4166be0a5376ea2810403030"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7ce2decf4166be0a5376ea2810403030"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_ICR_FRAME_ISC</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga7ce2decf4166be0a5376ea2810403030"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0318fb46a8594834640d08a9ae06f79e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0318fb46a8594834640d08a9ae06f79e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_ICR_OVF_ISC</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga0318fb46a8594834640d08a9ae06f79e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8da69cdd9d4f4c280279fa05fdf235bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8da69cdd9d4f4c280279fa05fdf235bc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_ICR_ERR_ISC</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga8da69cdd9d4f4c280279fa05fdf235bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaedd101bdda4f13c30d7af5a85156a047"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaedd101bdda4f13c30d7af5a85156a047"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_ICR_VSYNC_ISC</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaedd101bdda4f13c30d7af5a85156a047"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae64182a042ceb8275c54819458b1ca9c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae64182a042ceb8275c54819458b1ca9c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DCMI_ICR_LINE_ISC</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gae64182a042ceb8275c54819458b1ca9c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf353426d72702c7801416ba36d53dc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf353426d72702c7801416ba36d53dc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CHSEL</b>   ((uint32_t)0x0E000000)</td></tr>
|
||
<tr class="separator:gadf353426d72702c7801416ba36d53dc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17d34dad5c7bdb97fdcadaebfed80d90"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17d34dad5c7bdb97fdcadaebfed80d90"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CHSEL_0</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga17d34dad5c7bdb97fdcadaebfed80d90"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafa59d7ef4d7e0895f18ca4ef1210edae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafa59d7ef4d7e0895f18ca4ef1210edae"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CHSEL_1</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gafa59d7ef4d7e0895f18ca4ef1210edae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae001e60d3fd84c18bb5e2f96b695af38"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae001e60d3fd84c18bb5e2f96b695af38"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CHSEL_2</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gae001e60d3fd84c18bb5e2f96b695af38"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5c1174bff38faf5d87b71521bce8f84f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5c1174bff38faf5d87b71521bce8f84f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MBURST</b>   ((uint32_t)0x01800000)</td></tr>
|
||
<tr class="separator:ga5c1174bff38faf5d87b71521bce8f84f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e3931a8f14ffe008b8717e1b3232fca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e3931a8f14ffe008b8717e1b3232fca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MBURST_0</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga1e3931a8f14ffe008b8717e1b3232fca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf28eac7212392083bbf1b3d475022b74"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf28eac7212392083bbf1b3d475022b74"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MBURST_1</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gaf28eac7212392083bbf1b3d475022b74"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga502380abb155eb3b37a2ca9359e2da2e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga502380abb155eb3b37a2ca9359e2da2e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PBURST</b>   ((uint32_t)0x00600000)</td></tr>
|
||
<tr class="separator:ga502380abb155eb3b37a2ca9359e2da2e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf0eee1ad1788868a194f95107057a16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf0eee1ad1788868a194f95107057a16"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PBURST_0</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gadf0eee1ad1788868a194f95107057a16"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga061207b2c654a0dd62e40187c9557eda"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga061207b2c654a0dd62e40187c9557eda"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PBURST_1</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga061207b2c654a0dd62e40187c9557eda"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4f597f58faf86d2b78ad931079f57305"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4f597f58faf86d2b78ad931079f57305"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_ACK</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga4f597f58faf86d2b78ad931079f57305"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadd36c677ee53f56dc408cd549e64cf7d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadd36c677ee53f56dc408cd549e64cf7d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CT</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gadd36c677ee53f56dc408cd549e64cf7d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga53a1cde736b2afc5a394a67849f0c497"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga53a1cde736b2afc5a394a67849f0c497"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_DBM</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga53a1cde736b2afc5a394a67849f0c497"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga14c115d71a4e3b3c4da360108288154c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga14c115d71a4e3b3c4da360108288154c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PL</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:ga14c115d71a4e3b3c4da360108288154c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41b1b2f7bd6f0af932ff0fb7df9336b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41b1b2f7bd6f0af932ff0fb7df9336b6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PL_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga41b1b2f7bd6f0af932ff0fb7df9336b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81817adc8c0ee54dea0f67a1a9e8eb77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81817adc8c0ee54dea0f67a1a9e8eb77"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PL_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga81817adc8c0ee54dea0f67a1a9e8eb77"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeb929908d2e7fdef2136c20c93377c70"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb929908d2e7fdef2136c20c93377c70"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PINCOS</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gaeb929908d2e7fdef2136c20c93377c70"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9a98cb706a722d726d8ec6e9fe4a773"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae9a98cb706a722d726d8ec6e9fe4a773"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MSIZE</b>   ((uint32_t)0x00006000)</td></tr>
|
||
<tr class="separator:gae9a98cb706a722d726d8ec6e9fe4a773"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga39adb60b3394b61366691b45b8c2b80f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga39adb60b3394b61366691b45b8c2b80f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MSIZE_0</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga39adb60b3394b61366691b45b8c2b80f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa5c2ef08ab52de52b4e1fd785f60e263"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa5c2ef08ab52de52b4e1fd785f60e263"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MSIZE_1</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaa5c2ef08ab52de52b4e1fd785f60e263"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaea0808f979c27b7b68d79ad511e95ea0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaea0808f979c27b7b68d79ad511e95ea0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PSIZE</b>   ((uint32_t)0x00001800)</td></tr>
|
||
<tr class="separator:gaea0808f979c27b7b68d79ad511e95ea0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab05cf3e3f7c9edae5c70d59b3b75b14f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab05cf3e3f7c9edae5c70d59b3b75b14f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PSIZE_0</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gab05cf3e3f7c9edae5c70d59b3b75b14f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f376d0900380a3045cbeadd6a037302"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f376d0900380a3045cbeadd6a037302"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PSIZE_1</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga8f376d0900380a3045cbeadd6a037302"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga771a295832a584a3777ede523a691719"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga771a295832a584a3777ede523a691719"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_MINC</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga771a295832a584a3777ede523a691719"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga29c5d5c559dd14646fdc170e74f1f03b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga29c5d5c559dd14646fdc170e74f1f03b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PINC</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga29c5d5c559dd14646fdc170e74f1f03b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadc248dbc519cc580621cdadcdd8741fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc248dbc519cc580621cdadcdd8741fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_CIRC</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gadc248dbc519cc580621cdadcdd8741fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga16bc78076551c42cbdc084e9d0006bd4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga16bc78076551c42cbdc084e9d0006bd4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_DIR</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:ga16bc78076551c42cbdc084e9d0006bd4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadca9547536f3d2f76577275964b4875e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadca9547536f3d2f76577275964b4875e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_DIR_0</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gadca9547536f3d2f76577275964b4875e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac52c8d6ecad03bfe531867fa7457f2ae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac52c8d6ecad03bfe531867fa7457f2ae"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_DIR_1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gac52c8d6ecad03bfe531867fa7457f2ae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga11f412d256043bec3e01ceef7f2099f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga11f412d256043bec3e01ceef7f2099f2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_PFCTRL</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga11f412d256043bec3e01ceef7f2099f2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6ae47cc2cd2e985d29cb6b0bb65da1d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ae47cc2cd2e985d29cb6b0bb65da1d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_TCIE</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga6ae47cc2cd2e985d29cb6b0bb65da1d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga13a7fe097608bc5031d42ba69effed20"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga13a7fe097608bc5031d42ba69effed20"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_HTIE</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga13a7fe097608bc5031d42ba69effed20"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeee99c36ba3ea56cdb4f73a0b01fb602"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeee99c36ba3ea56cdb4f73a0b01fb602"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_TEIE</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaeee99c36ba3ea56cdb4f73a0b01fb602"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacaecc56f94a9af756d077cf7df1b6c41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacaecc56f94a9af756d077cf7df1b6c41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_DMEIE</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gacaecc56f94a9af756d077cf7df1b6c41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaabf69fe92e9a44167535365b0fe4ea9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaabf69fe92e9a44167535365b0fe4ea9e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxCR_EN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaabf69fe92e9a44167535365b0fe4ea9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga62e0e1a1121885de705e618855ba83b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62e0e1a1121885de705e618855ba83b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT</b>   ((uint32_t)0x0000FFFF)</td></tr>
|
||
<tr class="separator:ga62e0e1a1121885de705e618855ba83b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ae52f0e22e621d60861143ca6027852"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9ae52f0e22e621d60861143ca6027852"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga9ae52f0e22e621d60861143ca6027852"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c4223f0a871ccfee403988befa42d94"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4c4223f0a871ccfee403988befa42d94"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga4c4223f0a871ccfee403988befa42d94"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4766cc41262f7b530351ecc5939fc222"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4766cc41262f7b530351ecc5939fc222"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga4766cc41262f7b530351ecc5939fc222"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa43d96546fce4a436e4478a99ac0394"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa43d96546fce4a436e4478a99ac0394"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaaa43d96546fce4a436e4478a99ac0394"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81412c27b9d192be6c8c251b3a750e3c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81412c27b9d192be6c8c251b3a750e3c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga81412c27b9d192be6c8c251b3a750e3c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeff6beaa117fca4b6d1bbd87de34f674"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeff6beaa117fca4b6d1bbd87de34f674"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaeff6beaa117fca4b6d1bbd87de34f674"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7533a77655a960f82d08edfd2f4bf7ee"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7533a77655a960f82d08edfd2f4bf7ee"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga7533a77655a960f82d08edfd2f4bf7ee"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b2791b19fcf8586ffd28204bab2f2b4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b2791b19fcf8586ffd28204bab2f2b4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga4b2791b19fcf8586ffd28204bab2f2b4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa6d77fc0aa9e027fc906f70f8e6a4aca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa6d77fc0aa9e027fc906f70f8e6a4aca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaa6d77fc0aa9e027fc906f70f8e6a4aca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b4f096ed9b7f778e5b6beec36ca9698"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b4f096ed9b7f778e5b6beec36ca9698"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_9</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga4b4f096ed9b7f778e5b6beec36ca9698"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64a0c2548db60b344bbbda72b53089ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64a0c2548db60b344bbbda72b53089ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_10</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga64a0c2548db60b344bbbda72b53089ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6e37fe0da3a0c2e6ac94f999c8455187"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6e37fe0da3a0c2e6ac94f999c8455187"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_11</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga6e37fe0da3a0c2e6ac94f999c8455187"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa27c8ece8e904ef16ea45be9f7733103"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa27c8ece8e904ef16ea45be9f7733103"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_12</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaa27c8ece8e904ef16ea45be9f7733103"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f320a375482fe097d3f1579925013bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f320a375482fe097d3f1579925013bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_13</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga8f320a375482fe097d3f1579925013bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8882d292259d683b075bf6c4e009b3ae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8882d292259d683b075bf6c4e009b3ae"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_14</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga8882d292259d683b075bf6c4e009b3ae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga386a1a2048a470bed80654cd548dea65"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga386a1a2048a470bed80654cd548dea65"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxNDT_15</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga386a1a2048a470bed80654cd548dea65"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaba9ca2264bc381abe0f4183729ab1fb1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba9ca2264bc381abe0f4183729ab1fb1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FEIE</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaba9ca2264bc381abe0f4183729ab1fb1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56094479dc9b173b00ccfb199d8a2853"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56094479dc9b173b00ccfb199d8a2853"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FS</b>   ((uint32_t)0x00000038)</td></tr>
|
||
<tr class="separator:ga56094479dc9b173b00ccfb199d8a2853"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaccf0cb1a99fb8265535b15fc6a428060"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaccf0cb1a99fb8265535b15fc6a428060"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FS_0</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaccf0cb1a99fb8265535b15fc6a428060"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b5dd8e40fe393762866522caa0ab842"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b5dd8e40fe393762866522caa0ab842"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FS_1</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga6b5dd8e40fe393762866522caa0ab842"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51558a53d17a6deeed3937c15787361c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51558a53d17a6deeed3937c15787361c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FS_2</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga51558a53d17a6deeed3937c15787361c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89406bb954742665691c0ac2f8d95ec9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89406bb954742665691c0ac2f8d95ec9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_DMDIS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga89406bb954742665691c0ac2f8d95ec9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44c16978164026a81f5b07280e800e7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44c16978164026a81f5b07280e800e7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FTH</b>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga44c16978164026a81f5b07280e800e7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga63716e11d34bca95927671055aa63fe8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga63716e11d34bca95927671055aa63fe8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FTH_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga63716e11d34bca95927671055aa63fe8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae3d780fc1222a183071c73e62a0524a1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae3d780fc1222a183071c73e62a0524a1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_SxFCR_FTH_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gae3d780fc1222a183071c73e62a0524a1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44e5bf8adbb2646d325cba8d5dd670d8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44e5bf8adbb2646d325cba8d5dd670d8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TCIF3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga44e5bf8adbb2646d325cba8d5dd670d8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa10c891ee2ec333b7f87eea5886d574f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa10c891ee2ec333b7f87eea5886d574f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_HTIF3</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaa10c891ee2ec333b7f87eea5886d574f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5dfaba3a5db7cdcbddf9ee5974b44c2f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5dfaba3a5db7cdcbddf9ee5974b44c2f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TEIF3</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga5dfaba3a5db7cdcbddf9ee5974b44c2f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga01fd1397b41221f5bdf6f107cb92e196"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga01fd1397b41221f5bdf6f107cb92e196"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_DMEIF3</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga01fd1397b41221f5bdf6f107cb92e196"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5367443a1378eef82aed62ca22763952"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5367443a1378eef82aed62ca22763952"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_FEIF3</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga5367443a1378eef82aed62ca22763952"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf21350cce8c4cb5d7c6fcf5edc930cf8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf21350cce8c4cb5d7c6fcf5edc930cf8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TCIF2</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gaf21350cce8c4cb5d7c6fcf5edc930cf8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6ca25185d14a1f0c208ec8ceadc787a6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ca25185d14a1f0c208ec8ceadc787a6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_HTIF2</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga6ca25185d14a1f0c208ec8ceadc787a6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74d540802cadde42bdd6debae5d8ab89"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga74d540802cadde42bdd6debae5d8ab89"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TEIF2</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga74d540802cadde42bdd6debae5d8ab89"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabc7edcd7404f0dcf19a724dfad22026a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabc7edcd7404f0dcf19a724dfad22026a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_DMEIF2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gabc7edcd7404f0dcf19a724dfad22026a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga99c42b194213872753460ef9b7745213"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga99c42b194213872753460ef9b7745213"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_FEIF2</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga99c42b194213872753460ef9b7745213"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae02aec39ded937b3ce816d3df4520d9b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae02aec39ded937b3ce816d3df4520d9b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TCIF1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gae02aec39ded937b3ce816d3df4520d9b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04304a9f8891e325247c0aaa4c9fac72"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04304a9f8891e325247c0aaa4c9fac72"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_HTIF1</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga04304a9f8891e325247c0aaa4c9fac72"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0cd826db0b9ea5544d1a93beb90f8972"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0cd826db0b9ea5544d1a93beb90f8972"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TEIF1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga0cd826db0b9ea5544d1a93beb90f8972"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa4903814bfc12dd6193416374fbddf8c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa4903814bfc12dd6193416374fbddf8c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_DMEIF1</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaa4903814bfc12dd6193416374fbddf8c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafbc4fecde60c09e12f10113a156bb922"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafbc4fecde60c09e12f10113a156bb922"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_FEIF1</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gafbc4fecde60c09e12f10113a156bb922"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadbc3f7e52c0688bed4b71fa37666901d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadbc3f7e52c0688bed4b71fa37666901d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TCIF0</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gadbc3f7e52c0688bed4b71fa37666901d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6181727d13abbc46283ff22ce359e3b9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6181727d13abbc46283ff22ce359e3b9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_HTIF0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga6181727d13abbc46283ff22ce359e3b9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad43cdafa5acfcd683b7a2ee8976dd8ba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad43cdafa5acfcd683b7a2ee8976dd8ba"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_TEIF0</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad43cdafa5acfcd683b7a2ee8976dd8ba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga72de97ebc9d063dceb38bada91c44878"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga72de97ebc9d063dceb38bada91c44878"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_DMEIF0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga72de97ebc9d063dceb38bada91c44878"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga79bcc3f8e773206a66aba95c6f889d6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79bcc3f8e773206a66aba95c6f889d6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LISR_FEIF0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga79bcc3f8e773206a66aba95c6f889d6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad20a0a5e103def436d4e329fc0888482"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad20a0a5e103def436d4e329fc0888482"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TCIF7</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gad20a0a5e103def436d4e329fc0888482"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf535d1a3209d2e2e0e616e2d7501525d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf535d1a3209d2e2e0e616e2d7501525d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_HTIF7</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaf535d1a3209d2e2e0e616e2d7501525d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga960f094539b5afc7f9d5e45b7909afe6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga960f094539b5afc7f9d5e45b7909afe6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TEIF7</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga960f094539b5afc7f9d5e45b7909afe6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3bb23848f8a022a47ab4abd5aa9b7d39"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3bb23848f8a022a47ab4abd5aa9b7d39"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_DMEIF7</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga3bb23848f8a022a47ab4abd5aa9b7d39"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadea53385fca360f16c4474db1cf18bc1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadea53385fca360f16c4474db1cf18bc1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_FEIF7</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gadea53385fca360f16c4474db1cf18bc1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad29468aa609150e241d9ae62c477cf45"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad29468aa609150e241d9ae62c477cf45"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TCIF6</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gad29468aa609150e241d9ae62c477cf45"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d39c14138e9ff216c203b288137144b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d39c14138e9ff216c203b288137144b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_HTIF6</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga0d39c14138e9ff216c203b288137144b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a7ec01955fb504a5aa4f9f16a9ac52c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a7ec01955fb504a5aa4f9f16a9ac52c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TEIF6</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga1a7ec01955fb504a5aa4f9f16a9ac52c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7b58e7ba316d3fc296f4433b3e62c38"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7b58e7ba316d3fc296f4433b3e62c38"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_DMEIF6</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gab7b58e7ba316d3fc296f4433b3e62c38"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb297f94bde8d1aea580683d466ca8ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb297f94bde8d1aea580683d466ca8ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_FEIF6</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gafb297f94bde8d1aea580683d466ca8ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64f15eaf1dd30450d1d35ee517507321"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64f15eaf1dd30450d1d35ee517507321"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TCIF5</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga64f15eaf1dd30450d1d35ee517507321"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8617bf8160d1027879ffd354e04908d9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8617bf8160d1027879ffd354e04908d9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_HTIF5</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga8617bf8160d1027879ffd354e04908d9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf16fb0e5d87f704c89824f961bfb7637"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf16fb0e5d87f704c89824f961bfb7637"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TEIF5</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaf16fb0e5d87f704c89824f961bfb7637"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5ee964eee9c88fa28d32ce3ea6478f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5ee964eee9c88fa28d32ce3ea6478f2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_DMEIF5</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gac5ee964eee9c88fa28d32ce3ea6478f2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d62494b31bb830433ddd683f4872519"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d62494b31bb830433ddd683f4872519"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_FEIF5</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga0d62494b31bb830433ddd683f4872519"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafcce25c245499f9e62cb757e1871d973"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafcce25c245499f9e62cb757e1871d973"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TCIF4</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gafcce25c245499f9e62cb757e1871d973"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadba8d24329c676d70560eda0b8c1e5b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadba8d24329c676d70560eda0b8c1e5b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_HTIF4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gadba8d24329c676d70560eda0b8c1e5b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9005d4b958193fbd701c879eede467c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9005d4b958193fbd701c879eede467c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_TEIF4</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga9005d4b958193fbd701c879eede467c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf716f1bc12ea70f49802d84fb77646e8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf716f1bc12ea70f49802d84fb77646e8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_DMEIF4</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf716f1bc12ea70f49802d84fb77646e8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacab90057201b1da9774308ff3fb6cfa1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacab90057201b1da9774308ff3fb6cfa1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HISR_FEIF4</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gacab90057201b1da9774308ff3fb6cfa1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5210736d34dc24eb9507975921233137"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5210736d34dc24eb9507975921233137"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTCIF3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga5210736d34dc24eb9507975921233137"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ed3ab4e5d7975f985eb25dc65f99be3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ed3ab4e5d7975f985eb25dc65f99be3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CHTIF3</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga0ed3ab4e5d7975f985eb25dc65f99be3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0a51c601387d1ae49333d5ace8ae86ee"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0a51c601387d1ae49333d5ace8ae86ee"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTEIF3</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga0a51c601387d1ae49333d5ace8ae86ee"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabea10cdf2d3b0773b4e6b7fc9422f361"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabea10cdf2d3b0773b4e6b7fc9422f361"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CDMEIF3</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gabea10cdf2d3b0773b4e6b7fc9422f361"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad9432964145dc55af9186aea425e9963"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9432964145dc55af9186aea425e9963"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CFEIF3</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gad9432964145dc55af9186aea425e9963"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga52d6df2b5ab2b43da273a702fe139b59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga52d6df2b5ab2b43da273a702fe139b59"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTCIF2</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga52d6df2b5ab2b43da273a702fe139b59"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae19254e8ad726a73c6edc01bc7cf2cfa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae19254e8ad726a73c6edc01bc7cf2cfa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CHTIF2</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gae19254e8ad726a73c6edc01bc7cf2cfa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa9d761752657a3d268da5434a04c6c6a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa9d761752657a3d268da5434a04c6c6a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTEIF2</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gaa9d761752657a3d268da5434a04c6c6a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7680fc5f5e6c0032044f1d8ab7766de8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7680fc5f5e6c0032044f1d8ab7766de8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CDMEIF2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga7680fc5f5e6c0032044f1d8ab7766de8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae0f58173c721a4cee3f3885b352fa2a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0f58173c721a4cee3f3885b352fa2a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CFEIF2</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gae0f58173c721a4cee3f3885b352fa2a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7494c54901b8f5bcb4894d20b8cfafed"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7494c54901b8f5bcb4894d20b8cfafed"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTCIF1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga7494c54901b8f5bcb4894d20b8cfafed"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad2f38b0c141a9afb3943276dacdcb969"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad2f38b0c141a9afb3943276dacdcb969"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CHTIF1</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gad2f38b0c141a9afb3943276dacdcb969"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6d8adf52567aee2969492db65d448d4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6d8adf52567aee2969492db65d448d4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTEIF1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaf6d8adf52567aee2969492db65d448d4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a5aea54a390886f7de82e87e6dfc936"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a5aea54a390886f7de82e87e6dfc936"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CDMEIF1</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga9a5aea54a390886f7de82e87e6dfc936"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96cea0049553ab806bbc956f52528c37"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga96cea0049553ab806bbc956f52528c37"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CFEIF1</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga96cea0049553ab806bbc956f52528c37"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7a0b2cc41c63504195714614e59dc8e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7a0b2cc41c63504195714614e59dc8e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTCIF0</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gab7a0b2cc41c63504195714614e59dc8e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44f83ba08feb98240a553403d977b8d1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44f83ba08feb98240a553403d977b8d1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CHTIF0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga44f83ba08feb98240a553403d977b8d1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5824a64683ce2039260c952d989bf420"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5824a64683ce2039260c952d989bf420"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CTEIF0</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga5824a64683ce2039260c952d989bf420"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe80a122bf0537e8c95877ccf2b7b6d9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe80a122bf0537e8c95877ccf2b7b6d9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CDMEIF0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gafe80a122bf0537e8c95877ccf2b7b6d9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf6b8892189f3779f7fecf529ed87c74"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf6b8892189f3779f7fecf529ed87c74"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_LIFCR_CFEIF0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gadf6b8892189f3779f7fecf529ed87c74"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf8056629f4948fb236b4339e213cc69"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf8056629f4948fb236b4339e213cc69"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTCIF7</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gadf8056629f4948fb236b4339e213cc69"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga95e9989cbd70b18d833bb4cfcb8afce9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95e9989cbd70b18d833bb4cfcb8afce9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CHTIF7</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga95e9989cbd70b18d833bb4cfcb8afce9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga84ab215e0b217547745beefb65dfefdf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84ab215e0b217547745beefb65dfefdf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTEIF7</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga84ab215e0b217547745beefb65dfefdf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad70bf852fd8c24d79fcc104c950a589f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad70bf852fd8c24d79fcc104c950a589f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CDMEIF7</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gad70bf852fd8c24d79fcc104c950a589f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50332abe2e7b5a4f9cffd65d9a29382a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50332abe2e7b5a4f9cffd65d9a29382a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CFEIF7</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga50332abe2e7b5a4f9cffd65d9a29382a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd88be16962491e41e586f5109014bc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd88be16962491e41e586f5109014bc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTCIF6</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gacd88be16962491e41e586f5109014bc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaed7cbbbc0602d00e101e3f57aa3b696a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaed7cbbbc0602d00e101e3f57aa3b696a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CHTIF6</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gaed7cbbbc0602d00e101e3f57aa3b696a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga69e01e2f6a5cd1c800321e4121f8e788"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga69e01e2f6a5cd1c800321e4121f8e788"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTEIF6</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga69e01e2f6a5cd1c800321e4121f8e788"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f73fa93a4e01fbf279e920eca139807"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f73fa93a4e01fbf279e920eca139807"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CDMEIF6</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga7f73fa93a4e01fbf279e920eca139807"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga39a0a7f42498f71dedae8140483b7ced"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga39a0a7f42498f71dedae8140483b7ced"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CFEIF6</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga39a0a7f42498f71dedae8140483b7ced"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa55d19705147a6ee16effe9ec1012a72"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa55d19705147a6ee16effe9ec1012a72"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTCIF5</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gaa55d19705147a6ee16effe9ec1012a72"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2cef7eeccd11737c1ebf5735284046cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2cef7eeccd11737c1ebf5735284046cc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CHTIF5</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga2cef7eeccd11737c1ebf5735284046cc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33394fe20a3567c8baaeb15ad9aab586"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33394fe20a3567c8baaeb15ad9aab586"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTEIF5</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga33394fe20a3567c8baaeb15ad9aab586"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga15b404d9e1601cf3627cbf0163b50221"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga15b404d9e1601cf3627cbf0163b50221"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CDMEIF5</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga15b404d9e1601cf3627cbf0163b50221"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a4e90af967fa0a76c842384264e0e52"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a4e90af967fa0a76c842384264e0e52"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CFEIF5</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga9a4e90af967fa0a76c842384264e0e52"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga42e529507a40f0dc4c16da7cc6d659db"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga42e529507a40f0dc4c16da7cc6d659db"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTCIF4</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga42e529507a40f0dc4c16da7cc6d659db"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf8f0afa9a6526f7f4413766417a56be8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8f0afa9a6526f7f4413766417a56be8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CHTIF4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaf8f0afa9a6526f7f4413766417a56be8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9e05ff4fc6bace9cc6c0f0d4ec7b3314"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e05ff4fc6bace9cc6c0f0d4ec7b3314"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CTEIF4</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga9e05ff4fc6bace9cc6c0f0d4ec7b3314"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d70d58a4423ac8973c30ddbc7404b44"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d70d58a4423ac8973c30ddbc7404b44"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CDMEIF4</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga0d70d58a4423ac8973c30ddbc7404b44"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e5ea118900178d4fa2d19656c1b48ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e5ea118900178d4fa2d19656c1b48ff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DMA_HIFCR_CFEIF4</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga1e5ea118900178d4fa2d19656c1b48ff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga21ef0ff3efbf1ac68d1221fef8f05371"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga21ef0ff3efbf1ac68d1221fef8f05371">DMA2D_CR_START</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga21ef0ff3efbf1ac68d1221fef8f05371"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64fa2b2fd936575f41106f14e3e0292a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga64fa2b2fd936575f41106f14e3e0292a">DMA2D_CR_SUSP</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga64fa2b2fd936575f41106f14e3e0292a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad12973bf311ed4aa10e3f97766d589ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad12973bf311ed4aa10e3f97766d589ca">DMA2D_CR_ABORT</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad12973bf311ed4aa10e3f97766d589ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga615079079a7f8c65843b98ea13c89890"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga615079079a7f8c65843b98ea13c89890">DMA2D_CR_TEIE</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga615079079a7f8c65843b98ea13c89890"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf750d5a2ed4ca7f746777dbf6927149e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf750d5a2ed4ca7f746777dbf6927149e">DMA2D_CR_TCIE</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaf750d5a2ed4ca7f746777dbf6927149e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa6c26d2a790fef15f60efa32c442918f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa6c26d2a790fef15f60efa32c442918f">DMA2D_CR_TWIE</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gaa6c26d2a790fef15f60efa32c442918f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd16a66047d3972bc09c799fa5d83294"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd16a66047d3972bc09c799fa5d83294">DMA2D_CR_CAEIE</a>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gacd16a66047d3972bc09c799fa5d83294"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1799fced31c6fca2cde47755211f05dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1799fced31c6fca2cde47755211f05dd">DMA2D_CR_CTCIE</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga1799fced31c6fca2cde47755211f05dd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f88086bf1cf446a499f39615eb595ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f88086bf1cf446a499f39615eb595ce">DMA2D_CR_CEIE</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga6f88086bf1cf446a499f39615eb595ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaad8f10cbb0de796eb4a96448806ecf56"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad8f10cbb0de796eb4a96448806ecf56">DMA2D_CR_MODE</a>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:gaad8f10cbb0de796eb4a96448806ecf56"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga797e73d0317c5351ebfa81fcec9ee74a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga797e73d0317c5351ebfa81fcec9ee74a">DMA2D_ISR_TEIF</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga797e73d0317c5351ebfa81fcec9ee74a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaebfdf3351d8b08d4e6cb20e53027f286"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaebfdf3351d8b08d4e6cb20e53027f286">DMA2D_ISR_TCIF</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaebfdf3351d8b08d4e6cb20e53027f286"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2602aa4cf6d5ddc62a69221e81650f6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2602aa4cf6d5ddc62a69221e81650f6d">DMA2D_ISR_TWIF</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga2602aa4cf6d5ddc62a69221e81650f6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae12132e7245c4850274fcdd20bd1b1fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae12132e7245c4850274fcdd20bd1b1fd">DMA2D_ISR_CAEIF</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gae12132e7245c4850274fcdd20bd1b1fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7bb26c8920a05593c5a4adf37859c8cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7bb26c8920a05593c5a4adf37859c8cc">DMA2D_ISR_CTCIF</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga7bb26c8920a05593c5a4adf37859c8cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00b811475a96958284c17f32467a19a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00b811475a96958284c17f32467a19a4">DMA2D_ISR_CEIF</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga00b811475a96958284c17f32467a19a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga700ffb7c66ff9b6e587f54b4d6f9d409"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga700ffb7c66ff9b6e587f54b4d6f9d409">DMA2D_IFSR_CTEIF</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga700ffb7c66ff9b6e587f54b4d6f9d409"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae5ff825263374c6a82a940cef3f22def"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5ff825263374c6a82a940cef3f22def">DMA2D_IFSR_CTCIF</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gae5ff825263374c6a82a940cef3f22def"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga08d11dcc310801f1a21fa1621a911a69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga08d11dcc310801f1a21fa1621a911a69">DMA2D_IFSR_CTWIF</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga08d11dcc310801f1a21fa1621a911a69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9331ca07d508ec2330248ead234e759"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9331ca07d508ec2330248ead234e759">DMA2D_IFSR_CCAEIF</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gad9331ca07d508ec2330248ead234e759"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga603151f7582af8487dbca059b8c2797c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga603151f7582af8487dbca059b8c2797c">DMA2D_IFSR_CCTCIF</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga603151f7582af8487dbca059b8c2797c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga037c3669077ab408fc19f9a56d85dbeb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga037c3669077ab408fc19f9a56d85dbeb">DMA2D_IFSR_CCEIF</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga037c3669077ab408fc19f9a56d85dbeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga040254533141c16e79385b1d53f5e200"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga040254533141c16e79385b1d53f5e200">DMA2D_FGMAR_MA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga040254533141c16e79385b1d53f5e200"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3994214fb7867cdd705a98306261d4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3994214fb7867cdd705a98306261d4d">DMA2D_FGOR_LO</a>   ((uint32_t)0x00003FFF)</td></tr>
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<tr class="separator:gab3994214fb7867cdd705a98306261d4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae232ec07c8af265cf273378b9bd1441"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae232ec07c8af265cf273378b9bd1441">DMA2D_BGMAR_MA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:gaae232ec07c8af265cf273378b9bd1441"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52a7059b6f751d5c08c80f2685ad6ae0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52a7059b6f751d5c08c80f2685ad6ae0">DMA2D_BGOR_LO</a>   ((uint32_t)0x00003FFF)</td></tr>
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<tr class="separator:ga52a7059b6f751d5c08c80f2685ad6ae0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab96e4329f0cce1ff4939b86794ace4a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab96e4329f0cce1ff4939b86794ace4a5">DMA2D_FGPFCCR_CM</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gab96e4329f0cce1ff4939b86794ace4a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91559d3b49cc6eabc6e5c56fed4d90df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91559d3b49cc6eabc6e5c56fed4d90df">DMA2D_FGPFCCR_CCM</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga91559d3b49cc6eabc6e5c56fed4d90df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79281f18fe5f1d8f72bfc5493f7fa5f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79281f18fe5f1d8f72bfc5493f7fa5f5">DMA2D_FGPFCCR_START</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga79281f18fe5f1d8f72bfc5493f7fa5f5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga499d209664516db6d8e51c156d297a64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga499d209664516db6d8e51c156d297a64">DMA2D_FGPFCCR_CS</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga499d209664516db6d8e51c156d297a64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga662bae660d091cd661ae03b7b83b9fff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga662bae660d091cd661ae03b7b83b9fff">DMA2D_FGPFCCR_AM</a>   ((uint32_t)0x00030000)</td></tr>
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<tr class="separator:ga662bae660d091cd661ae03b7b83b9fff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31134d8c12473dc1a2993ae779c97764"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31134d8c12473dc1a2993ae779c97764">DMA2D_FGPFCCR_ALPHA</a>   ((uint32_t)0xFF000000)</td></tr>
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||
<tr class="separator:ga31134d8c12473dc1a2993ae779c97764"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a5f83d5dbcacb5368cbd7b961eb681a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a5f83d5dbcacb5368cbd7b961eb681a">DMA2D_FGCOLR_BLUE</a>   ((uint32_t)0x000000FF)</td></tr>
|
||
<tr class="separator:ga5a5f83d5dbcacb5368cbd7b961eb681a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga883726ad2d4c810d52f1488fb88fbee8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga883726ad2d4c810d52f1488fb88fbee8">DMA2D_FGCOLR_GREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
|
||
<tr class="separator:ga883726ad2d4c810d52f1488fb88fbee8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d6b0972e557412c73e0f16f36fcb5c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d6b0972e557412c73e0f16f36fcb5c2">DMA2D_FGCOLR_RED</a>   ((uint32_t)0x00FF0000)</td></tr>
|
||
<tr class="separator:ga0d6b0972e557412c73e0f16f36fcb5c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68eb0acaf75ebd3ad3c91c09d1120f4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68eb0acaf75ebd3ad3c91c09d1120f4e">DMA2D_BGPFCCR_CM</a>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:ga68eb0acaf75ebd3ad3c91c09d1120f4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7af16ab77cfa65b68d87955f8174c374"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7af16ab77cfa65b68d87955f8174c374">DMA2D_BGPFCCR_CCM</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga7af16ab77cfa65b68d87955f8174c374"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a80d7360eacbea6bdaf6e9e917fcfb3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a80d7360eacbea6bdaf6e9e917fcfb3">DMA2D_BGPFCCR_START</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga8a80d7360eacbea6bdaf6e9e917fcfb3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6815a2ca2215068895c9a472d7ddda39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6815a2ca2215068895c9a472d7ddda39">DMA2D_BGPFCCR_CS</a>   ((uint32_t)0x0000FF00)</td></tr>
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||
<tr class="separator:ga6815a2ca2215068895c9a472d7ddda39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabed12e8c87f469181c517b5bf45dddf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaabed12e8c87f469181c517b5bf45dddf">DMA2D_BGPFCCR_AM</a>   ((uint32_t)0x00030000)</td></tr>
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<tr class="separator:gaabed12e8c87f469181c517b5bf45dddf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bc612a1b1244f639b71a4d32951d0ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bc612a1b1244f639b71a4d32951d0ed">DMA2D_BGPFCCR_ALPHA</a>   ((uint32_t)0xFF000000)</td></tr>
|
||
<tr class="separator:ga4bc612a1b1244f639b71a4d32951d0ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7eed8c8ec566069a0d09afb988562b85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7eed8c8ec566069a0d09afb988562b85">DMA2D_BGCOLR_BLUE</a>   ((uint32_t)0x000000FF)</td></tr>
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||
<tr class="separator:ga7eed8c8ec566069a0d09afb988562b85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00f2e6030b2805bc1317cf9a176128dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00f2e6030b2805bc1317cf9a176128dd">DMA2D_BGCOLR_GREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
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||
<tr class="separator:ga00f2e6030b2805bc1317cf9a176128dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40b707327b395aa7ed5dcb17d5d63025"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40b707327b395aa7ed5dcb17d5d63025">DMA2D_BGCOLR_RED</a>   ((uint32_t)0x00FF0000)</td></tr>
|
||
<tr class="separator:ga40b707327b395aa7ed5dcb17d5d63025"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44e06e669220bd1ec2684822441e98b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44e06e669220bd1ec2684822441e98b3">DMA2D_FGCMAR_MA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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||
<tr class="separator:ga44e06e669220bd1ec2684822441e98b3"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6dc532dedbdffb9510e22260244a0559"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6dc532dedbdffb9510e22260244a0559">DMA2D_BGCMAR_MA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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||
<tr class="separator:ga6dc532dedbdffb9510e22260244a0559"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab6aab6b2bb5740ad6b5b79f5510eed4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab6aab6b2bb5740ad6b5b79f5510eed4a">DMA2D_OPFCCR_CM</a>   ((uint32_t)0x00000007)</td></tr>
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||
<tr class="separator:gab6aab6b2bb5740ad6b5b79f5510eed4a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga164c96762ec6cbaac2bff45dd84b97cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga164c96762ec6cbaac2bff45dd84b97cf">DMA2D_OCOLR_BLUE_1</a>   ((uint32_t)0x000000FF)</td></tr>
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||
<tr class="separator:ga164c96762ec6cbaac2bff45dd84b97cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8545d0dcde8b511d0ec64eb0c338fe2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8545d0dcde8b511d0ec64eb0c338fe2c">DMA2D_OCOLR_GREEN_1</a>   ((uint32_t)0x0000FF00)</td></tr>
|
||
<tr class="separator:ga8545d0dcde8b511d0ec64eb0c338fe2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3928724c5937ffda60f29f272dda4fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3928724c5937ffda60f29f272dda4fc">DMA2D_OCOLR_RED_1</a>   ((uint32_t)0x00FF0000)</td></tr>
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||
<tr class="separator:gad3928724c5937ffda60f29f272dda4fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaada795f8e861c5a220054e78c31c512"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaada795f8e861c5a220054e78c31c512">DMA2D_OCOLR_ALPHA_1</a>   ((uint32_t)0xFF000000)</td></tr>
|
||
<tr class="separator:gaaada795f8e861c5a220054e78c31c512"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga302e4754b96470c3c0e1c42f7a513001"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga302e4754b96470c3c0e1c42f7a513001">DMA2D_OCOLR_BLUE_2</a>   ((uint32_t)0x0000001F)</td></tr>
|
||
<tr class="separator:ga302e4754b96470c3c0e1c42f7a513001"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga885ce0eaadc6ca878568ff43ee710958"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga885ce0eaadc6ca878568ff43ee710958">DMA2D_OCOLR_GREEN_2</a>   ((uint32_t)0x000007E0)</td></tr>
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<tr class="separator:ga885ce0eaadc6ca878568ff43ee710958"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0af9cee2f3d6ab752e910249adb89816"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0af9cee2f3d6ab752e910249adb89816">DMA2D_OCOLR_RED_2</a>   ((uint32_t)0x0000F800)</td></tr>
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<tr class="separator:ga0af9cee2f3d6ab752e910249adb89816"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0aa0634e409fb6d9fc68ecf9533c8d9c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0aa0634e409fb6d9fc68ecf9533c8d9c">DMA2D_OCOLR_BLUE_3</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="separator:ga0aa0634e409fb6d9fc68ecf9533c8d9c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf4c97dc43e39e09956c2f4d8e092d17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf4c97dc43e39e09956c2f4d8e092d17">DMA2D_OCOLR_GREEN_3</a>   ((uint32_t)0x000003E0)</td></tr>
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<tr class="separator:gacf4c97dc43e39e09956c2f4d8e092d17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea63157a41a08d213f6cb8395373b385"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea63157a41a08d213f6cb8395373b385">DMA2D_OCOLR_RED_3</a>   ((uint32_t)0x00007C00)</td></tr>
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<tr class="separator:gaea63157a41a08d213f6cb8395373b385"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc0bf21946366343cedce1a2e9b07259"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc0bf21946366343cedce1a2e9b07259">DMA2D_OCOLR_ALPHA_3</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gabc0bf21946366343cedce1a2e9b07259"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd2439915c875a33bf9119382276cb89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd2439915c875a33bf9119382276cb89">DMA2D_OCOLR_BLUE_4</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gadd2439915c875a33bf9119382276cb89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga801078def8b64717b6fa0688483e3b78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga801078def8b64717b6fa0688483e3b78">DMA2D_OCOLR_GREEN_4</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:ga801078def8b64717b6fa0688483e3b78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3dd8ba291eeaec6bdf282570dc94699f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3dd8ba291eeaec6bdf282570dc94699f">DMA2D_OCOLR_RED_4</a>   ((uint32_t)0x00000F00)</td></tr>
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<tr class="separator:ga3dd8ba291eeaec6bdf282570dc94699f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0b00eb37c77d6852cfbb731b603a9d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0b00eb37c77d6852cfbb731b603a9d5">DMA2D_OCOLR_ALPHA_4</a>   ((uint32_t)0x0000F000)</td></tr>
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<tr class="separator:gab0b00eb37c77d6852cfbb731b603a9d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4898744c8de9d7d0d59d7ff41653a04f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4898744c8de9d7d0d59d7ff41653a04f">DMA2D_OMAR_MA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga4898744c8de9d7d0d59d7ff41653a04f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafd4dae0dd24a62d5a70fce6d095761ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafd4dae0dd24a62d5a70fce6d095761ab">DMA2D_OOR_LO</a>   ((uint32_t)0x00003FFF)</td></tr>
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<tr class="separator:gafd4dae0dd24a62d5a70fce6d095761ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7be9ed42e3543c13c9976a738470d2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7be9ed42e3543c13c9976a738470d2e">DMA2D_NLR_NL</a>   ((uint32_t)0x0000FFFF)</td></tr>
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<tr class="separator:gaf7be9ed42e3543c13c9976a738470d2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade633c0e602bb412837333b687b1619a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade633c0e602bb412837333b687b1619a">DMA2D_NLR_PL</a>   ((uint32_t)0x3FFF0000)</td></tr>
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<tr class="separator:gade633c0e602bb412837333b687b1619a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ebac2dac47e0480401202c86c3dacd4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ebac2dac47e0480401202c86c3dacd4">DMA2D_LWR_LW</a>   ((uint32_t)0x0000FFFF)</td></tr>
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<tr class="separator:ga9ebac2dac47e0480401202c86c3dacd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe04b2be922ba53ca5c46a4ab9f38d15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe04b2be922ba53ca5c46a4ab9f38d15">DMA2D_AMTCR_EN</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gabe04b2be922ba53ca5c46a4ab9f38d15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e5dccef2a3b408c458365114ca277ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e5dccef2a3b408c458365114ca277ac">DMA2D_AMTCR_DT</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga3e5dccef2a3b408c458365114ca277ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad03b2ba6cde99065627fccabd54ac097"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad03b2ba6cde99065627fccabd54ac097">EXTI_IMR_MR0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gad03b2ba6cde99065627fccabd54ac097"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaaf3f9a86c620149893db38c83f8ba58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaaf3f9a86c620149893db38c83f8ba58">EXTI_IMR_MR1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaaaf3f9a86c620149893db38c83f8ba58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga71604d1c29973c5e2bf69c8e94e89f67"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga71604d1c29973c5e2bf69c8e94e89f67">EXTI_IMR_MR2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga71604d1c29973c5e2bf69c8e94e89f67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5edd42f9b2129c18cfa3c3598dcd1134"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5edd42f9b2129c18cfa3c3598dcd1134">EXTI_IMR_MR3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga5edd42f9b2129c18cfa3c3598dcd1134"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23e920ad334439cd2ad4d683054914e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23e920ad334439cd2ad4d683054914e3">EXTI_IMR_MR4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga23e920ad334439cd2ad4d683054914e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7cd3c5a2e4c4cb9b81e8965fcbf1c3a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7cd3c5a2e4c4cb9b81e8965fcbf1c3a5">EXTI_IMR_MR5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga7cd3c5a2e4c4cb9b81e8965fcbf1c3a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5533c8ec796e3bbc9dc4474376056e06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5533c8ec796e3bbc9dc4474376056e06">EXTI_IMR_MR6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga5533c8ec796e3bbc9dc4474376056e06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab620165d3fea1c564fcf1016805a1a8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab620165d3fea1c564fcf1016805a1a8e">EXTI_IMR_MR7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gab620165d3fea1c564fcf1016805a1a8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88e8b274e4398fdcb1c68da2b6320d5b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88e8b274e4398fdcb1c68da2b6320d5b">EXTI_IMR_MR8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga88e8b274e4398fdcb1c68da2b6320d5b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4d177dcf33bb9a34f8590ec509746e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf4d177dcf33bb9a34f8590ec509746e8">EXTI_IMR_MR9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaf4d177dcf33bb9a34f8590ec509746e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5fd7db9a1ce82c152ca7bc6fddf31366"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fd7db9a1ce82c152ca7bc6fddf31366">EXTI_IMR_MR10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga5fd7db9a1ce82c152ca7bc6fddf31366"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68cfe8fe938fcb0fc6925bf493ccfaa7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68cfe8fe938fcb0fc6925bf493ccfaa7">EXTI_IMR_MR11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga68cfe8fe938fcb0fc6925bf493ccfaa7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad21caf923d2083fb106852493667c16e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad21caf923d2083fb106852493667c16e">EXTI_IMR_MR12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gad21caf923d2083fb106852493667c16e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e1938a063c48d7d6504cb32f7965c0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e1938a063c48d7d6504cb32f7965c0e">EXTI_IMR_MR13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga5e1938a063c48d7d6504cb32f7965c0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab8827cee06670f256bc8f6301bea9cab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8827cee06670f256bc8f6301bea9cab">EXTI_IMR_MR14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gab8827cee06670f256bc8f6301bea9cab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88d9990be7f8f9e530a9f930a365fa44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88d9990be7f8f9e530a9f930a365fa44">EXTI_IMR_MR15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga88d9990be7f8f9e530a9f930a365fa44"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7419f78ed9044bdd237b452ef49e1b7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7419f78ed9044bdd237b452ef49e1b7f">EXTI_IMR_MR16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga7419f78ed9044bdd237b452ef49e1b7f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4489fa85d1552b8f40faed93483a5d35"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4489fa85d1552b8f40faed93483a5d35">EXTI_IMR_MR17</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:ga4489fa85d1552b8f40faed93483a5d35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05e16f2cda40cca58a45458cc44d510f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05e16f2cda40cca58a45458cc44d510f">EXTI_IMR_MR18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga05e16f2cda40cca58a45458cc44d510f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad47f7a023cbba165dfb95845d3c8c55c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad47f7a023cbba165dfb95845d3c8c55c">EXTI_IMR_MR19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:gad47f7a023cbba165dfb95845d3c8c55c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga515c0dc6d2472e06a89e4bb19725e8f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga515c0dc6d2472e06a89e4bb19725e8f3">EXTI_EMR_MR0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga515c0dc6d2472e06a89e4bb19725e8f3"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6d88e7c10e5985fa425ea7ab4fe4c3e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d88e7c10e5985fa425ea7ab4fe4c3e5">EXTI_EMR_MR1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga6d88e7c10e5985fa425ea7ab4fe4c3e5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga460d5d4c0b53bcc04d5804e1204ded21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga460d5d4c0b53bcc04d5804e1204ded21">EXTI_EMR_MR2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga460d5d4c0b53bcc04d5804e1204ded21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga73944983ce5a6bde9dc172b4f483898c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga73944983ce5a6bde9dc172b4f483898c">EXTI_EMR_MR3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga73944983ce5a6bde9dc172b4f483898c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab80f809ead83e747677a31c80c6aae03"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab80f809ead83e747677a31c80c6aae03">EXTI_EMR_MR4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gab80f809ead83e747677a31c80c6aae03"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga65976f75b703f740dea3562ba3b8db59"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65976f75b703f740dea3562ba3b8db59">EXTI_EMR_MR5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga65976f75b703f740dea3562ba3b8db59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea480bd932cd1fa0904f5eb1caee9a12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea480bd932cd1fa0904f5eb1caee9a12">EXTI_EMR_MR6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:gadbb27ff8664928994ef96f87052d14be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbb27ff8664928994ef96f87052d14be">EXTI_EMR_MR7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gadbb27ff8664928994ef96f87052d14be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ed4b371da871ffd0cc12ee00147282f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4ed4b371da871ffd0cc12ee00147282f">EXTI_EMR_MR8</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga4ed4b371da871ffd0cc12ee00147282f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga109af342179fff1fccfdde582834867a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga109af342179fff1fccfdde582834867a">EXTI_EMR_MR9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga109af342179fff1fccfdde582834867a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf342d34ed1b8e4aa916bf49e30c2a234"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf342d34ed1b8e4aa916bf49e30c2a234">EXTI_EMR_MR10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf342d34ed1b8e4aa916bf49e30c2a234"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ec516af1de770c82c3c9c458cbc0172"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ec516af1de770c82c3c9c458cbc0172">EXTI_EMR_MR11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga9ec516af1de770c82c3c9c458cbc0172"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15732553e5b0de9f58180a0b024d4cad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15732553e5b0de9f58180a0b024d4cad">EXTI_EMR_MR12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga15732553e5b0de9f58180a0b024d4cad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9fd2ec6472e46869956acb28f5e1b55f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fd2ec6472e46869956acb28f5e1b55f">EXTI_EMR_MR13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga9fd2ec6472e46869956acb28f5e1b55f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaecf5890ea71eea034ec1cd9e96284f89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaecf5890ea71eea034ec1cd9e96284f89">EXTI_EMR_MR14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gaecf5890ea71eea034ec1cd9e96284f89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a7bacc32351a36aefcd5614abc76ae3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a7bacc32351a36aefcd5614abc76ae3">EXTI_EMR_MR15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga7a7bacc32351a36aefcd5614abc76ae3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34b1a6934265da759bc061f73d5d1374"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34b1a6934265da759bc061f73d5d1374">EXTI_EMR_MR16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga34b1a6934265da759bc061f73d5d1374"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a30aa20cf475eecf7e15171e83035e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a30aa20cf475eecf7e15171e83035e4">EXTI_EMR_MR17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga6a30aa20cf475eecf7e15171e83035e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25eee729b57b4c78a0613c184fc539e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25eee729b57b4c78a0613c184fc539e5">EXTI_EMR_MR18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:ga25eee729b57b4c78a0613c184fc539e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaeababa85e5ebe6aa93d011d83fd7994"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaeababa85e5ebe6aa93d011d83fd7994">EXTI_EMR_MR19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:gaaeababa85e5ebe6aa93d011d83fd7994"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb1823a87cd797a6066681a3256cecc6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb1823a87cd797a6066681a3256cecc6">EXTI_RTSR_TR0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:gadb1823a87cd797a6066681a3256cecc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c42cc3763c52d1061b32219fc441566"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c42cc3763c52d1061b32219fc441566">EXTI_RTSR_TR1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga1c42cc3763c52d1061b32219fc441566"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c073b519f09b130e4ab4039823e290c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c073b519f09b130e4ab4039823e290c">EXTI_RTSR_TR2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga1c073b519f09b130e4ab4039823e290c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga090f295579a774c215585a55e5066b11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga090f295579a774c215585a55e5066b11">EXTI_RTSR_TR3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga090f295579a774c215585a55e5066b11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabce4722e99e3f44d40bfb6afb63444cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabce4722e99e3f44d40bfb6afb63444cc">EXTI_RTSR_TR4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gabce4722e99e3f44d40bfb6afb63444cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac57b970ebc88f7bb015119ece9dd32de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac57b970ebc88f7bb015119ece9dd32de">EXTI_RTSR_TR5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gac57b970ebc88f7bb015119ece9dd32de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaccc2212ce653d34cf48446ae0a68bed6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaccc2212ce653d34cf48446ae0a68bed6">EXTI_RTSR_TR6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaccc2212ce653d34cf48446ae0a68bed6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad380a0bc59524f4a0846a0b91d3c65c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad380a0bc59524f4a0846a0b91d3c65c1">EXTI_RTSR_TR7</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gad380a0bc59524f4a0846a0b91d3c65c1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga26cd6a5115b0bbe113f39545bff1ee39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26cd6a5115b0bbe113f39545bff1ee39">EXTI_RTSR_TR8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga26cd6a5115b0bbe113f39545bff1ee39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3127246b2db3571b00c6af2453941d17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3127246b2db3571b00c6af2453941d17">EXTI_RTSR_TR9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga3127246b2db3571b00c6af2453941d17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa29df7ddbd067889992eb60ecddce0e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa29df7ddbd067889992eb60ecddce0e4">EXTI_RTSR_TR10</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gaa29df7ddbd067889992eb60ecddce0e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8cf7a92cdb61b3f8cf6eec9513317ab7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8cf7a92cdb61b3f8cf6eec9513317ab7">EXTI_RTSR_TR11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga8cf7a92cdb61b3f8cf6eec9513317ab7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0423be12bfb13f34eec9656d6d274e04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0423be12bfb13f34eec9656d6d274e04">EXTI_RTSR_TR12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga0423be12bfb13f34eec9656d6d274e04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d5ef451fd76dc0fa9c76d7c520d8f12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d5ef451fd76dc0fa9c76d7c520d8f12">EXTI_RTSR_TR13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga5d5ef451fd76dc0fa9c76d7c520d8f12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga95b0d883fa0fbc49105bda5596463cda"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95b0d883fa0fbc49105bda5596463cda">EXTI_RTSR_TR14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga95b0d883fa0fbc49105bda5596463cda"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4fe54b09102a18676829c0bafb0aead2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4fe54b09102a18676829c0bafb0aead2">EXTI_RTSR_TR15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga4fe54b09102a18676829c0bafb0aead2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8e4fb52990f0fa3fb9bed5b74f1a589"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8e4fb52990f0fa3fb9bed5b74f1a589">EXTI_RTSR_TR16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gae8e4fb52990f0fa3fb9bed5b74f1a589"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0a8fcb63516a4ed0d91b556f696f806"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad0a8fcb63516a4ed0d91b556f696f806">EXTI_RTSR_TR17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gad0a8fcb63516a4ed0d91b556f696f806"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaca4223b8c4bc8726ac96ec64837f7b62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca4223b8c4bc8726ac96ec64837f7b62">EXTI_RTSR_TR18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gaca4223b8c4bc8726ac96ec64837f7b62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40a722b0c36e832f619b2136f1510b3e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40a722b0c36e832f619b2136f1510b3e">EXTI_RTSR_TR19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:ga40a722b0c36e832f619b2136f1510b3e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gacfb6fa5ae3fcaf08aec6d86c3bfefa4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacfb6fa5ae3fcaf08aec6d86c3bfefa4c">EXTI_FTSR_TR0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:gacfb6fa5ae3fcaf08aec6d86c3bfefa4c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac287be3bd3bad84aed48603dbe8bd4ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac287be3bd3bad84aed48603dbe8bd4ed">EXTI_FTSR_TR1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gac287be3bd3bad84aed48603dbe8bd4ed"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9c4503803cbe1933cd35519cfc809041"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c4503803cbe1933cd35519cfc809041">EXTI_FTSR_TR2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga9c4503803cbe1933cd35519cfc809041"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga23593d2b8a9ec0147bab28765af30e1f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23593d2b8a9ec0147bab28765af30e1f">EXTI_FTSR_TR3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga23593d2b8a9ec0147bab28765af30e1f"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaa77211bfa8f4d77cf373296954dad6b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa77211bfa8f4d77cf373296954dad6b2">EXTI_FTSR_TR4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gaa77211bfa8f4d77cf373296954dad6b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga903f9b080c5971dd5d7935e5b87886e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga903f9b080c5971dd5d7935e5b87886e2">EXTI_FTSR_TR5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga903f9b080c5971dd5d7935e5b87886e2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae8527cce22f69e02a08ed67a67f8e5ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8527cce22f69e02a08ed67a67f8e5ca">EXTI_FTSR_TR6</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gae8527cce22f69e02a08ed67a67f8e5ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf408315e497b902922a9bf40a4c6f567"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf408315e497b902922a9bf40a4c6f567">EXTI_FTSR_TR7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:gaf408315e497b902922a9bf40a4c6f567"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga00f1bded4d121e21116627b8e80784fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00f1bded4d121e21116627b8e80784fc">EXTI_FTSR_TR8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga00f1bded4d121e21116627b8e80784fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga89f0c4de2b6acb75302d206b697f83ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga89f0c4de2b6acb75302d206b697f83ef">EXTI_FTSR_TR9</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga89f0c4de2b6acb75302d206b697f83ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac9a2b80699a213f0d2b03658f21ad643"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9a2b80699a213f0d2b03658f21ad643">EXTI_FTSR_TR10</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gac9a2b80699a213f0d2b03658f21ad643"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c74d4d520406a14c517784cdd5fc6ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c74d4d520406a14c517784cdd5fc6ef">EXTI_FTSR_TR11</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga6c74d4d520406a14c517784cdd5fc6ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3992511ec1785bdf107873b139d74245"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3992511ec1785bdf107873b139d74245">EXTI_FTSR_TR12</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga3992511ec1785bdf107873b139d74245"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0714519a1edcba4695f92f1bba70e825"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0714519a1edcba4695f92f1bba70e825">EXTI_FTSR_TR13</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga0714519a1edcba4695f92f1bba70e825"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b92577e64a95ef2069f1a56176d35ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b92577e64a95ef2069f1a56176d35ff">EXTI_FTSR_TR14</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga5b92577e64a95ef2069f1a56176d35ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a6cc515f13ffe1a3620d06fa08addc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a6cc515f13ffe1a3620d06fa08addc7">EXTI_FTSR_TR15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga2a6cc515f13ffe1a3620d06fa08addc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1b4b850094ccc48790a1e4616ceebd2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1b4b850094ccc48790a1e4616ceebd2">EXTI_FTSR_TR16</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaa1b4b850094ccc48790a1e4616ceebd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga009e618c9563b3a8dcaec493006115c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga009e618c9563b3a8dcaec493006115c7">EXTI_FTSR_TR17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga009e618c9563b3a8dcaec493006115c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga405285cdc474ee20085b17ef1f61517e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga405285cdc474ee20085b17ef1f61517e">EXTI_FTSR_TR18</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga405285cdc474ee20085b17ef1f61517e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1277527e2fa727fdec2dcc7a300ea1af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1277527e2fa727fdec2dcc7a300ea1af">EXTI_FTSR_TR19</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga1277527e2fa727fdec2dcc7a300ea1af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa6df16d2e8010a2897888a4acf19cee3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa6df16d2e8010a2897888a4acf19cee3">EXTI_SWIER_SWIER0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:gaa6df16d2e8010a2897888a4acf19cee3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeb0c3fa5a03204d743ae92ff925421ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaeb0c3fa5a03204d743ae92ff925421ae">EXTI_SWIER_SWIER1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:gaeb0c3fa5a03204d743ae92ff925421ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6bea1dbaf71e830dd357135524166f4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6bea1dbaf71e830dd357135524166f4c">EXTI_SWIER_SWIER2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga6bea1dbaf71e830dd357135524166f4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37395ac6729647ab5ee1fa4ca086c08a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37395ac6729647ab5ee1fa4ca086c08a">EXTI_SWIER_SWIER3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga37395ac6729647ab5ee1fa4ca086c08a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab051808f7a1ed9aaf43a3df90fc6a575"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab051808f7a1ed9aaf43a3df90fc6a575">EXTI_SWIER_SWIER4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gab051808f7a1ed9aaf43a3df90fc6a575"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaa5b4ace22acacac13ce106b2063a3977"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa5b4ace22acacac13ce106b2063a3977">EXTI_SWIER_SWIER5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gaa5b4ace22acacac13ce106b2063a3977"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8ad0142288597993852e4cf350f61ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8ad0142288597993852e4cf350f61ed">EXTI_SWIER_SWIER6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gad8ad0142288597993852e4cf350f61ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabdf8eab3e32cc03ca71f519a9111e28f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabdf8eab3e32cc03ca71f519a9111e28f">EXTI_SWIER_SWIER7</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:gabdf8eab3e32cc03ca71f519a9111e28f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e83a373926804449d500b115e9090ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e83a373926804449d500b115e9090ce">EXTI_SWIER_SWIER8</a>   ((uint32_t)0x00000100)</td></tr>
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||
<tr class="separator:ga5e83a373926804449d500b115e9090ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab102aa929ffe463ffe9f2db651704a61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab102aa929ffe463ffe9f2db651704a61">EXTI_SWIER_SWIER9</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gab102aa929ffe463ffe9f2db651704a61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9d8691936b6cd80ff8e18c0bfe271d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9d8691936b6cd80ff8e18c0bfe271d7">EXTI_SWIER_SWIER10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gae9d8691936b6cd80ff8e18c0bfe271d7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga7ab9fea9935608ec8ee7fb1e1ae049e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ab9fea9935608ec8ee7fb1e1ae049e7">EXTI_SWIER_SWIER11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga7ab9fea9935608ec8ee7fb1e1ae049e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d67869db50c848f57633ebf00566539"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d67869db50c848f57633ebf00566539">EXTI_SWIER_SWIER12</a>   ((uint32_t)0x00001000)</td></tr>
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||
<tr class="separator:ga5d67869db50c848f57633ebf00566539"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga930a1d03fe3c32bd65a336ccee418826"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga930a1d03fe3c32bd65a336ccee418826">EXTI_SWIER_SWIER13</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga930a1d03fe3c32bd65a336ccee418826"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5d645db667cd63d1a9b91963c543a4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5d645db667cd63d1a9b91963c543a4b">EXTI_SWIER_SWIER14</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:gad5d645db667cd63d1a9b91963c543a4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0b9e64d5a1779371fa4678713ab18e08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b9e64d5a1779371fa4678713ab18e08">EXTI_SWIER_SWIER15</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga0b9e64d5a1779371fa4678713ab18e08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga55b528743b11f4ab93ae97ee2e639b5b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga55b528743b11f4ab93ae97ee2e639b5b">EXTI_SWIER_SWIER16</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:ga55b528743b11f4ab93ae97ee2e639b5b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0da944251419887af3a87c86080fb455"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0da944251419887af3a87c86080fb455">EXTI_SWIER_SWIER17</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga0da944251419887af3a87c86080fb455"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab07aefbb7a8a18c9338b49d3b10ff068"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab07aefbb7a8a18c9338b49d3b10ff068">EXTI_SWIER_SWIER18</a>   ((uint32_t)0x00040000)</td></tr>
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||
<tr class="separator:gab07aefbb7a8a18c9338b49d3b10ff068"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab7c48ac5522385cdb1d7882985f909b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab7c48ac5522385cdb1d7882985f909b">EXTI_SWIER_SWIER19</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:gaab7c48ac5522385cdb1d7882985f909b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6da1c8a465606de1f90a74d369fbf25a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6da1c8a465606de1f90a74d369fbf25a">EXTI_PR_PR0</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga6da1c8a465606de1f90a74d369fbf25a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b9b5f97edeccf442998a65b19e77f25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b9b5f97edeccf442998a65b19e77f25">EXTI_PR_PR1</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga4b9b5f97edeccf442998a65b19e77f25"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga085d2105381752a0aadc9be5a93ea665"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga085d2105381752a0aadc9be5a93ea665">EXTI_PR_PR2</a>   ((uint32_t)0x00000004)</td></tr>
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||
<tr class="separator:ga085d2105381752a0aadc9be5a93ea665"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga064dab3e0d5689b92125713100555ce0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga064dab3e0d5689b92125713100555ce0">EXTI_PR_PR3</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:ga064dab3e0d5689b92125713100555ce0"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga14f73b3693b3353a006d360cb8fd2ddc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14f73b3693b3353a006d360cb8fd2ddc">EXTI_PR_PR4</a>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:ga14f73b3693b3353a006d360cb8fd2ddc"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga319e167fa6e112061997d9a8d79f02f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga319e167fa6e112061997d9a8d79f02f8">EXTI_PR_PR5</a>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:ga319e167fa6e112061997d9a8d79f02f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6f47cd1f602692258985784ed5e8e76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6f47cd1f602692258985784ed5e8e76">EXTI_PR_PR6</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gaf6f47cd1f602692258985784ed5e8e76"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa17ea7e3fb89e98fd6a232f453fcff9e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa17ea7e3fb89e98fd6a232f453fcff9e">EXTI_PR_PR7</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaa17ea7e3fb89e98fd6a232f453fcff9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa82e0dcb4961a32a9b7ebdf30493156d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa82e0dcb4961a32a9b7ebdf30493156d">EXTI_PR_PR8</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaa82e0dcb4961a32a9b7ebdf30493156d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fcc64f03d79af531febc077f45c48eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2fcc64f03d79af531febc077f45c48eb">EXTI_PR_PR9</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga2fcc64f03d79af531febc077f45c48eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1ef8e9c691b95763007ed228e98fa108"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ef8e9c691b95763007ed228e98fa108">EXTI_PR_PR10</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga1ef8e9c691b95763007ed228e98fa108"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga144f1a41abb7b87a1619c15ba5fb548b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga144f1a41abb7b87a1619c15ba5fb548b">EXTI_PR_PR11</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga144f1a41abb7b87a1619c15ba5fb548b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae1a68025056b8c84bb13635af5e2a07c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1a68025056b8c84bb13635af5e2a07c">EXTI_PR_PR12</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gae1a68025056b8c84bb13635af5e2a07c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3471c79d5b19813785387504a1a5f0c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3471c79d5b19813785387504a1a5f0c4">EXTI_PR_PR13</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga3471c79d5b19813785387504a1a5f0c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae5396ec2dbbee9d7585224fa12273598"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5396ec2dbbee9d7585224fa12273598">EXTI_PR_PR14</a>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gae5396ec2dbbee9d7585224fa12273598"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga149f9d9d6c1aab867734b59db1117c41"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga149f9d9d6c1aab867734b59db1117c41">EXTI_PR_PR15</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga149f9d9d6c1aab867734b59db1117c41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa47e5b07d5a407198e09f05262f18bba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa47e5b07d5a407198e09f05262f18bba">EXTI_PR_PR16</a>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaa47e5b07d5a407198e09f05262f18bba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadbc7d82eb61e2adf0a955ef0cc97690f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbc7d82eb61e2adf0a955ef0cc97690f">EXTI_PR_PR17</a>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gadbc7d82eb61e2adf0a955ef0cc97690f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga541810a93fbf4cdd9b39f2717f37240d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga541810a93fbf4cdd9b39f2717f37240d">EXTI_PR_PR18</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga541810a93fbf4cdd9b39f2717f37240d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41e43af631a30492e09e5fd5c50f47f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41e43af631a30492e09e5fd5c50f47f5">EXTI_PR_PR19</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga41e43af631a30492e09e5fd5c50f47f5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaef5e44cbb084160a6004ca9951ec7318"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaef5e44cbb084160a6004ca9951ec7318"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gaef5e44cbb084160a6004ca9951ec7318"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga936324709ea40109331b76849da2c8b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga936324709ea40109331b76849da2c8b2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_0WS</b>   ((uint32_t)0x00000000)</td></tr>
|
||
<tr class="separator:ga936324709ea40109331b76849da2c8b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaec66af244e6afb5bbf9816d7c76e1621"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec66af244e6afb5bbf9816d7c76e1621"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_1WS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaec66af244e6afb5bbf9816d7c76e1621"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad9b09ca8db6df455d0b8f810f8521257"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9b09ca8db6df455d0b8f810f8521257"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_2WS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gad9b09ca8db6df455d0b8f810f8521257"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3437dcee177845a407919d3b2d9bd063"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3437dcee177845a407919d3b2d9bd063"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_3WS</b>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga3437dcee177845a407919d3b2d9bd063"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad3594f2a9e12213efe75cd7df646e1ad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3594f2a9e12213efe75cd7df646e1ad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_4WS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad3594f2a9e12213efe75cd7df646e1ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67e55ca49f028a701d0c81420a6e2918"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67e55ca49f028a701d0c81420a6e2918"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_5WS</b>   ((uint32_t)0x00000005)</td></tr>
|
||
<tr class="separator:ga67e55ca49f028a701d0c81420a6e2918"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3019ff197b4fd698e9625c9abb67f4be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3019ff197b4fd698e9625c9abb67f4be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_6WS</b>   ((uint32_t)0x00000006)</td></tr>
|
||
<tr class="separator:ga3019ff197b4fd698e9625c9abb67f4be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa164c6e6fdfcae274a84dc87ca87b95e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa164c6e6fdfcae274a84dc87ca87b95e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_7WS</b>   ((uint32_t)0x00000007)</td></tr>
|
||
<tr class="separator:gaa164c6e6fdfcae274a84dc87ca87b95e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab9f8078f5374cc3f5a03d32d820166d1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab9f8078f5374cc3f5a03d32d820166d1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_8WS</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gab9f8078f5374cc3f5a03d32d820166d1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5c1eb3fa1ed22b5eaf27127dbc595c94"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5c1eb3fa1ed22b5eaf27127dbc595c94"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_9WS</b>   ((uint32_t)0x00000009)</td></tr>
|
||
<tr class="separator:ga5c1eb3fa1ed22b5eaf27127dbc595c94"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4cfa58b7a1ceac2a54a01c35183c606f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4cfa58b7a1ceac2a54a01c35183c606f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_10WS</b>   ((uint32_t)0x0000000A)</td></tr>
|
||
<tr class="separator:ga4cfa58b7a1ceac2a54a01c35183c606f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga090b61ac30c669a4aa444e6ac8b1840d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga090b61ac30c669a4aa444e6ac8b1840d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_11WS</b>   ((uint32_t)0x0000000B)</td></tr>
|
||
<tr class="separator:ga090b61ac30c669a4aa444e6ac8b1840d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab15fcf83d62d874c46a2693f2436e14e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab15fcf83d62d874c46a2693f2436e14e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_12WS</b>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:gab15fcf83d62d874c46a2693f2436e14e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac69dcbabace32e958f918bf10aaf3460"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac69dcbabace32e958f918bf10aaf3460"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_13WS</b>   ((uint32_t)0x0000000D)</td></tr>
|
||
<tr class="separator:gac69dcbabace32e958f918bf10aaf3460"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacf4fe4205ceb9511137d1649849d3761"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacf4fe4205ceb9511137d1649849d3761"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_14WS</b>   ((uint32_t)0x0000000E)</td></tr>
|
||
<tr class="separator:gacf4fe4205ceb9511137d1649849d3761"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga91adfcf84aadad50a0127d2865353683"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga91adfcf84aadad50a0127d2865353683"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_LATENCY_15WS</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:ga91adfcf84aadad50a0127d2865353683"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga082e7e91fffee86db39676396d01a8e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga082e7e91fffee86db39676396d01a8e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_PRFTEN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga082e7e91fffee86db39676396d01a8e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51d8b1dd2c46942d377c579a38dce711"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51d8b1dd2c46942d377c579a38dce711"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_ICEN</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga51d8b1dd2c46942d377c579a38dce711"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a9a5cc3aa05dc62264addab1008c896"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a9a5cc3aa05dc62264addab1008c896"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_DCEN</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga5a9a5cc3aa05dc62264addab1008c896"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga923ff88475799eea9285f77f5383ced5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga923ff88475799eea9285f77f5383ced5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_ICRST</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga923ff88475799eea9285f77f5383ced5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac53d7c85551a9829014d6027d67ce6c7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac53d7c85551a9829014d6027d67ce6c7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_DCRST</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gac53d7c85551a9829014d6027d67ce6c7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga277876cbec14426a7a70ed6b3ead6d49"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga277876cbec14426a7a70ed6b3ead6d49"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_BYTE0_ADDRESS</b>   ((uint32_t)0x40023C00)</td></tr>
|
||
<tr class="separator:ga277876cbec14426a7a70ed6b3ead6d49"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac7c5712edb158a725d8647c6af19544e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7c5712edb158a725d8647c6af19544e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_ACR_BYTE2_ADDRESS</b>   ((uint32_t)0x40023C03)</td></tr>
|
||
<tr class="separator:gac7c5712edb158a725d8647c6af19544e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae1301c6b487cfefa247c54a576a0c12b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae1301c6b487cfefa247c54a576a0c12b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_EOP</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gae1301c6b487cfefa247c54a576a0c12b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab779aa8b88258e15c183041744a846ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab779aa8b88258e15c183041744a846ff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_SOP</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gab779aa8b88258e15c183041744a846ff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabf6f52f59b01530928d747cf32bd4d01"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabf6f52f59b01530928d747cf32bd4d01"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_WRPERR</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gabf6f52f59b01530928d747cf32bd4d01"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac98c2458e114e7f419f3222673878ce0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac98c2458e114e7f419f3222673878ce0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_PGAERR</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gac98c2458e114e7f419f3222673878ce0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7fd2704724528be959f82089f67e3869"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fd2704724528be959f82089f67e3869"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_PGPERR</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga7fd2704724528be959f82089f67e3869"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5d76ad3629a288bee0136b8b34f274f4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d76ad3629a288bee0136b8b34f274f4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_PGSERR</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga5d76ad3629a288bee0136b8b34f274f4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b86181a96fd2f1cc3828e9d8d83d368"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b86181a96fd2f1cc3828e9d8d83d368"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_SR_BSY</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga4b86181a96fd2f1cc3828e9d8d83d368"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga47754b39bd7a7c79c251d6376f97f661"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga47754b39bd7a7c79c251d6376f97f661"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_PG</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga47754b39bd7a7c79c251d6376f97f661"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae0e561d67b381c4bd8714cd6a9c15f56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0e561d67b381c4bd8714cd6a9c15f56"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SER</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gae0e561d67b381c4bd8714cd6a9c15f56"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a287aa5a625125301306a02fb69c53a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a287aa5a625125301306a02fb69c53a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_MER</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga4a287aa5a625125301306a02fb69c53a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga035fdd19649827a4231d9e718fff67be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga035fdd19649827a4231d9e718fff67be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_MER1</b>   FLASH_CR_MER</td></tr>
|
||
<tr class="separator:ga035fdd19649827a4231d9e718fff67be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4375b021000bd1acdecab7f72240f57d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4375b021000bd1acdecab7f72240f57d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB</b>   ((uint32_t)0x000000F8)</td></tr>
|
||
<tr class="separator:ga4375b021000bd1acdecab7f72240f57d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9937f2386c7127f9855f68e2ec121448"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9937f2386c7127f9855f68e2ec121448"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB_0</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga9937f2386c7127f9855f68e2ec121448"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa70c4abfe231ffeab3f34a97c171427b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa70c4abfe231ffeab3f34a97c171427b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB_1</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaa70c4abfe231ffeab3f34a97c171427b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga23c44361d3aaf062fc6b288b1d44b988"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga23c44361d3aaf062fc6b288b1d44b988"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB_2</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga23c44361d3aaf062fc6b288b1d44b988"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga417708b5b7aabfe219fb671f2955af31"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga417708b5b7aabfe219fb671f2955af31"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB_3</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga417708b5b7aabfe219fb671f2955af31"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga734972442e2704a86bfb69c5707b33a1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga734972442e2704a86bfb69c5707b33a1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_SNB_4</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga734972442e2704a86bfb69c5707b33a1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga948ebea4921be9f981292b6e6733b00f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga948ebea4921be9f981292b6e6733b00f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_PSIZE</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:ga948ebea4921be9f981292b6e6733b00f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaadbc673f47f1ed33ca4144e9eee91ad6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaadbc673f47f1ed33ca4144e9eee91ad6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_PSIZE_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaadbc673f47f1ed33ca4144e9eee91ad6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga196dca8b265486bf05782e6bbe81d854"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga196dca8b265486bf05782e6bbe81d854"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_PSIZE_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga196dca8b265486bf05782e6bbe81d854"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3eb5af925f8183d38a85dad10fc34528"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3eb5af925f8183d38a85dad10fc34528"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_MER2</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga3eb5af925f8183d38a85dad10fc34528"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe4dd28134f93f52b1d4ec5b36a99864"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe4dd28134f93f52b1d4ec5b36a99864"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_STRT</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gafe4dd28134f93f52b1d4ec5b36a99864"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab9e69856f654ec430a42791a34799db0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab9e69856f654ec430a42791a34799db0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_EOPIE</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gab9e69856f654ec430a42791a34799db0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab25f1fa4127fa015361b61a6f3180784"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab25f1fa4127fa015361b61a6f3180784"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_CR_LOCK</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:gab25f1fa4127fa015361b61a6f3180784"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c1da080e341fca41ce7f7d661cc4904"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4c1da080e341fca41ce7f7d661cc4904"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_OPTLOCK</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga4c1da080e341fca41ce7f7d661cc4904"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0858d561d4790c86b64a60204a09a3b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0858d561d4790c86b64a60204a09a3b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_OPTSTRT</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga0858d561d4790c86b64a60204a09a3b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf842eaac29efd86925c9431a8eb99b27"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf842eaac29efd86925c9431a8eb99b27"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_BOR_LEV_0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf842eaac29efd86925c9431a8eb99b27"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2971824f63351f09ad3db521d6a5b212"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2971824f63351f09ad3db521d6a5b212"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_BOR_LEV_1</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga2971824f63351f09ad3db521d6a5b212"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga62cadc42caa03753ab8733da2b957ead"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62cadc42caa03753ab8733da2b957ead"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_BOR_LEV</b>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga62cadc42caa03753ab8733da2b957ead"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9198e76e4af532cb78ba3d8d7b1b35a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9198e76e4af532cb78ba3d8d7b1b35a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_BFB2</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga9198e76e4af532cb78ba3d8d7b1b35a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf38cbe85e3a2c30dbe6ccb3b3e636504"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf38cbe85e3a2c30dbe6ccb3b3e636504"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_WDG_SW</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaf38cbe85e3a2c30dbe6ccb3b3e636504"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga12b1ec98e521815433b3eec1e4136fd2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga12b1ec98e521815433b3eec1e4136fd2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nRST_STOP</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga12b1ec98e521815433b3eec1e4136fd2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga82102d640fe1d3e6e9f9c6a3e0adb56f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82102d640fe1d3e6e9f9c6a3e0adb56f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nRST_STDBY</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga82102d640fe1d3e6e9f9c6a3e0adb56f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa180c5732c34b271618aa58695c8ff5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa180c5732c34b271618aa58695c8ff5a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP</b>   ((uint32_t)0x0000FF00)</td></tr>
|
||
<tr class="separator:gaa180c5732c34b271618aa58695c8ff5a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd79ca0fb8dd121074f40b83b2313d12"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd79ca0fb8dd121074f40b83b2313d12"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gafd79ca0fb8dd121074f40b83b2313d12"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga935fe4b6ea955b3dc26110f19e894e60"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga935fe4b6ea955b3dc26110f19e894e60"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga935fe4b6ea955b3dc26110f19e894e60"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga02ba844244e374fe8105a7cad59ad523"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga02ba844244e374fe8105a7cad59ad523"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga02ba844244e374fe8105a7cad59ad523"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga844d4d62b7de476c90dd5f971f5e9041"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga844d4d62b7de476c90dd5f971f5e9041"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga844d4d62b7de476c90dd5f971f5e9041"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga73bffe5ebb8d12020ebf3f2875f4a709"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73bffe5ebb8d12020ebf3f2875f4a709"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_4</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga73bffe5ebb8d12020ebf3f2875f4a709"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67fef54b7b6c44afcc50e4f20ba461fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67fef54b7b6c44afcc50e4f20ba461fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_5</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga67fef54b7b6c44afcc50e4f20ba461fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga18946cdea0f463f1e5386f42986f7e67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga18946cdea0f463f1e5386f42986f7e67"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_6</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga18946cdea0f463f1e5386f42986f7e67"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad00a8584a84d18d76e147e4873740b4d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad00a8584a84d18d76e147e4873740b4d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_RDP_7</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gad00a8584a84d18d76e147e4873740b4d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2c2bbd885cff2e6c16662a014f3125e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2c2bbd885cff2e6c16662a014f3125e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP</b>   ((uint32_t)0x0FFF0000)</td></tr>
|
||
<tr class="separator:ga2c2bbd885cff2e6c16662a014f3125e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga823e5c42b89e152a8394c3fa6c8811ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga823e5c42b89e152a8394c3fa6c8811ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga823e5c42b89e152a8394c3fa6c8811ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4d0ef7c876b297706a26dda017441f9c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4d0ef7c876b297706a26dda017441f9c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga4d0ef7c876b297706a26dda017441f9c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96c5b96918f1871febfb31a026028522"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga96c5b96918f1871febfb31a026028522"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga96c5b96918f1871febfb31a026028522"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabb0fa51cc0e95dcc79b74f451898f634"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabb0fa51cc0e95dcc79b74f451898f634"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gabb0fa51cc0e95dcc79b74f451898f634"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad936542dd4c587babd790e92783d90fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad936542dd4c587babd790e92783d90fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_4</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gad936542dd4c587babd790e92783d90fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae20268ac71dad90ee983642bb328e8ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae20268ac71dad90ee983642bb328e8ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_5</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gae20268ac71dad90ee983642bb328e8ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga947616eac2be3f26ae1a3d748e70cac8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga947616eac2be3f26ae1a3d748e70cac8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_6</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga947616eac2be3f26ae1a3d748e70cac8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa4d248e42a97e1c852cbea42b25598e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa4d248e42a97e1c852cbea42b25598e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_7</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gaa4d248e42a97e1c852cbea42b25598e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb38a3c5a67d67160a33d1762ed0f51f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadb38a3c5a67d67160a33d1762ed0f51f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_8</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gadb38a3c5a67d67160a33d1762ed0f51f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e186dbacd1587760b167b9ae4166c5c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e186dbacd1587760b167b9ae4166c5c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_9</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga5e186dbacd1587760b167b9ae4166c5c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga38f22bae03f31d60f0c6aded7cd29ead"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38f22bae03f31d60f0c6aded7cd29ead"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_10</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga38f22bae03f31d60f0c6aded7cd29ead"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac11ce7f6df6922142fc54fb8d376e239"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac11ce7f6df6922142fc54fb8d376e239"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_nWRP_11</b>   ((uint32_t)0x08000000)</td></tr>
|
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<tr class="separator:gac11ce7f6df6922142fc54fb8d376e239"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6b7d9725eafd522586664407fb9fe905"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b7d9725eafd522586664407fb9fe905"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_DB1M</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga6b7d9725eafd522586664407fb9fe905"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga319a7b9c8e58943de71013d952264a16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga319a7b9c8e58943de71013d952264a16"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR_SPRMOD</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga319a7b9c8e58943de71013d952264a16"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga166b108d44b55fef7da25bb1a9696d4a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga166b108d44b55fef7da25bb1a9696d4a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP</b>   ((uint32_t)0x0FFF0000)</td></tr>
|
||
<tr class="separator:ga166b108d44b55fef7da25bb1a9696d4a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gab8704f7d9b4f2ed666a36fd524200393"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8704f7d9b4f2ed666a36fd524200393"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_0</b>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gab8704f7d9b4f2ed666a36fd524200393"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5dbe2ea161a6b8f8f9410097b56e7f37"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5dbe2ea161a6b8f8f9410097b56e7f37"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga5dbe2ea161a6b8f8f9410097b56e7f37"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga95055e7aee08960157182164896ab53e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95055e7aee08960157182164896ab53e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_2</b>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga95055e7aee08960157182164896ab53e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga215ec5e70d6f8e9bcfc23e808720b7b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga215ec5e70d6f8e9bcfc23e808720b7b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga215ec5e70d6f8e9bcfc23e808720b7b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga552186f19bc88ebbceb4b20fd17fa15c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga552186f19bc88ebbceb4b20fd17fa15c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_4</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga552186f19bc88ebbceb4b20fd17fa15c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa4370733a7b56759492f1af72272d086"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa4370733a7b56759492f1af72272d086"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_5</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gaa4370733a7b56759492f1af72272d086"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeecb61b8efdc36c40fce01e4cd1d5907"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeecb61b8efdc36c40fce01e4cd1d5907"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_6</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gaeecb61b8efdc36c40fce01e4cd1d5907"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7e3446bcd7be06c230bc6cbceadae5cf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7e3446bcd7be06c230bc6cbceadae5cf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_7</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga7e3446bcd7be06c230bc6cbceadae5cf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga97aac6b31d856505401e3bef486df10f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97aac6b31d856505401e3bef486df10f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_8</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga97aac6b31d856505401e3bef486df10f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ab067bd8ab9645c93e6acf3b839dd8d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ab067bd8ab9645c93e6acf3b839dd8d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_9</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga0ab067bd8ab9645c93e6acf3b839dd8d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaf08f9db2b0ca30861faac54b6df672e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf08f9db2b0ca30861faac54b6df672e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_10</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaaf08f9db2b0ca30861faac54b6df672e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga244656eb3ca465d38aba14e92f8c5870"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga244656eb3ca465d38aba14e92f8c5870"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>FLASH_OPTCR1_nWRP_11</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga244656eb3ca465d38aba14e92f8c5870"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad154cab86ce34cebfe1f76e5c2f78e61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad154cab86ce34cebfe1f76e5c2f78e61">FSMC_BCR1_MBKEN</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gad154cab86ce34cebfe1f76e5c2f78e61"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga28dd9f93d8687cdc08745df9fcc38e89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga28dd9f93d8687cdc08745df9fcc38e89">FSMC_BCR1_MUXEN</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga28dd9f93d8687cdc08745df9fcc38e89"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bab7a47703902d187502ac765ebb05d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9bab7a47703902d187502ac765ebb05d">FSMC_BCR1_MTYP</a>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga9bab7a47703902d187502ac765ebb05d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga29b921567bd5a422c51f9a0f426ac3f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga29b921567bd5a422c51f9a0f426ac3f6">FSMC_BCR1_MTYP_0</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga29b921567bd5a422c51f9a0f426ac3f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3fe2fd14b3c0d88aecfb9cf5b44995a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3fe2fd14b3c0d88aecfb9cf5b44995a0">FSMC_BCR1_MTYP_1</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga3fe2fd14b3c0d88aecfb9cf5b44995a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa12297787a0580fedbd5244f0caa0a76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa12297787a0580fedbd5244f0caa0a76">FSMC_BCR1_MWID</a>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:gaa12297787a0580fedbd5244f0caa0a76"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a6fe3b4b28a31c4bbf26a838695fd0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a6fe3b4b28a31c4bbf26a838695fd0c">FSMC_BCR1_MWID_0</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga1a6fe3b4b28a31c4bbf26a838695fd0c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga65592a6a20efa6aed5b59fe1eba508d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65592a6a20efa6aed5b59fe1eba508d8">FSMC_BCR1_MWID_1</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga65592a6a20efa6aed5b59fe1eba508d8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga14aaca2a8bccab73c7726cf73ee9be16"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14aaca2a8bccab73c7726cf73ee9be16">FSMC_BCR1_FACCEN</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga14aaca2a8bccab73c7726cf73ee9be16"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga94857a0177ae12f1172da65d8708ae97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga94857a0177ae12f1172da65d8708ae97">FSMC_BCR1_BURSTEN</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga94857a0177ae12f1172da65d8708ae97"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga57dbc565fbc7d8ec20fda7ef0da30df4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga57dbc565fbc7d8ec20fda7ef0da30df4">FSMC_BCR1_WAITPOL</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga57dbc565fbc7d8ec20fda7ef0da30df4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad215e95feee8339393bd93a2bcea11f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad215e95feee8339393bd93a2bcea11f1">FSMC_BCR1_WRAPMOD</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gad215e95feee8339393bd93a2bcea11f1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga141a337e3f1479e79d62b567ba685bcf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga141a337e3f1479e79d62b567ba685bcf">FSMC_BCR1_WAITCFG</a>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga141a337e3f1479e79d62b567ba685bcf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7349a91da7ba38277a068f4e8eea314"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7349a91da7ba38277a068f4e8eea314">FSMC_BCR1_WREN</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaa7349a91da7ba38277a068f4e8eea314"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe4611a02a4fa635b66d5b5e52328fc5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe4611a02a4fa635b66d5b5e52328fc5">FSMC_BCR1_WAITEN</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gabe4611a02a4fa635b66d5b5e52328fc5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7936ff74a1cfba880a9b5bc943dc8661"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7936ff74a1cfba880a9b5bc943dc8661">FSMC_BCR1_EXTMOD</a>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga7936ff74a1cfba880a9b5bc943dc8661"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf5673d96c0fb27c7faed335e05ad41c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5673d96c0fb27c7faed335e05ad41c1">FSMC_BCR1_ASYNCWAIT</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gaf5673d96c0fb27c7faed335e05ad41c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga015672f5aa2132a55e316f5b7a577174"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga015672f5aa2132a55e316f5b7a577174">FSMC_BCR1_CBURSTRW</a>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga015672f5aa2132a55e316f5b7a577174"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad9c99df3c6cebc68f6695ad7bc13f717"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9c99df3c6cebc68f6695ad7bc13f717">FSMC_BCR2_MBKEN</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gad9c99df3c6cebc68f6695ad7bc13f717"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f65c4348ab55c12695730bde8be8986"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9f65c4348ab55c12695730bde8be8986">FSMC_BCR2_MUXEN</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9f65c4348ab55c12695730bde8be8986"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabdf82247710aaeff72fb37113bff3daf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabdf82247710aaeff72fb37113bff3daf">FSMC_BCR2_MTYP</a>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:gabdf82247710aaeff72fb37113bff3daf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac595e1e3045aad0b379367f47bf10a84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac595e1e3045aad0b379367f47bf10a84">FSMC_BCR2_MTYP_0</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gac595e1e3045aad0b379367f47bf10a84"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8b9e5b00171ea739ba67a627a2484f47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b9e5b00171ea739ba67a627a2484f47">FSMC_BCR2_MTYP_1</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga8b9e5b00171ea739ba67a627a2484f47"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4099746e30f71a98ea71d1048a5d028a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4099746e30f71a98ea71d1048a5d028a">FSMC_BCR2_MWID</a>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga4099746e30f71a98ea71d1048a5d028a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8501d3ce728f6a074061294a9e5a54cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8501d3ce728f6a074061294a9e5a54cf">FSMC_BCR2_MWID_0</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga8501d3ce728f6a074061294a9e5a54cf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74276c5828d545cf4b2db2d568c60627"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74276c5828d545cf4b2db2d568c60627">FSMC_BCR2_MWID_1</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga74276c5828d545cf4b2db2d568c60627"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a4e1ad30533ab54b45987cab30d51a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a4e1ad30533ab54b45987cab30d51a0">FSMC_BCR2_FACCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga7a4e1ad30533ab54b45987cab30d51a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d8202b9b40d3912a6294fe2a0e28ebf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d8202b9b40d3912a6294fe2a0e28ebf">FSMC_BCR2_BURSTEN</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga0d8202b9b40d3912a6294fe2a0e28ebf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0f59e7aa2664f9c767ce22bec369698"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0f59e7aa2664f9c767ce22bec369698">FSMC_BCR2_WAITPOL</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaa0f59e7aa2664f9c767ce22bec369698"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e93e4e902a636d4d75a1fd7e884afea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e93e4e902a636d4d75a1fd7e884afea">FSMC_BCR2_WRAPMOD</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga9e93e4e902a636d4d75a1fd7e884afea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5141640b4dcb78a524740b681819f9f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5141640b4dcb78a524740b681819f9f1">FSMC_BCR2_WAITCFG</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga5141640b4dcb78a524740b681819f9f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad446f2fcb7909b80a8c1731141be5186"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad446f2fcb7909b80a8c1731141be5186">FSMC_BCR2_WREN</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gad446f2fcb7909b80a8c1731141be5186"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad015d2aa1c58b48681f35a4f92eaf7f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad015d2aa1c58b48681f35a4f92eaf7f7">FSMC_BCR2_WAITEN</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gad015d2aa1c58b48681f35a4f92eaf7f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76d3e5d899ba2399d3318da577d58ac6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76d3e5d899ba2399d3318da577d58ac6">FSMC_BCR2_EXTMOD</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga76d3e5d899ba2399d3318da577d58ac6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad45d1b552ba61ccbb1dc4ebfc556285a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad45d1b552ba61ccbb1dc4ebfc556285a">FSMC_BCR2_ASYNCWAIT</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gad45d1b552ba61ccbb1dc4ebfc556285a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae64b1874f1ab83a1d0224cb66e504dff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae64b1874f1ab83a1d0224cb66e504dff">FSMC_BCR2_CBURSTRW</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gae64b1874f1ab83a1d0224cb66e504dff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d7810ad338086a1ec9b15f339ed6f4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d7810ad338086a1ec9b15f339ed6f4d">FSMC_BCR3_MBKEN</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga0d7810ad338086a1ec9b15f339ed6f4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadaae648c8591e7650cba828910638d3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadaae648c8591e7650cba828910638d3d">FSMC_BCR3_MUXEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gadaae648c8591e7650cba828910638d3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga319fb6069b651eb947b4d0ba3c9f6196"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga319fb6069b651eb947b4d0ba3c9f6196">FSMC_BCR3_MTYP</a>   ((uint32_t)0x0000000C)</td></tr>
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<tr class="separator:ga319fb6069b651eb947b4d0ba3c9f6196"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf33b80510e653dd32de2ae1ec1a1dfb5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf33b80510e653dd32de2ae1ec1a1dfb5">FSMC_BCR3_MTYP_0</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaf33b80510e653dd32de2ae1ec1a1dfb5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a038553e3a30df4b6e331cad504069b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a038553e3a30df4b6e331cad504069b">FSMC_BCR3_MTYP_1</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2a038553e3a30df4b6e331cad504069b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51097cfe8d4263a30d292e7e9dc73cd2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51097cfe8d4263a30d292e7e9dc73cd2">FSMC_BCR3_MWID</a>   ((uint32_t)0x00000030)</td></tr>
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<tr class="separator:ga51097cfe8d4263a30d292e7e9dc73cd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga373b764c1a4104300eb587aa4510c1f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga373b764c1a4104300eb587aa4510c1f1">FSMC_BCR3_MWID_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga373b764c1a4104300eb587aa4510c1f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43c7292c185269cc11d986f3ae0ceb24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43c7292c185269cc11d986f3ae0ceb24">FSMC_BCR3_MWID_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga43c7292c185269cc11d986f3ae0ceb24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga380c39b95426ac9a18c70e3f56016c81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga380c39b95426ac9a18c70e3f56016c81">FSMC_BCR3_FACCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga380c39b95426ac9a18c70e3f56016c81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9badf60f5caa010e041d66d40af596a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9badf60f5caa010e041d66d40af596a">FSMC_BCR3_BURSTEN</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gad9badf60f5caa010e041d66d40af596a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabbca3d0aa315f3e9bc6bacf244bdb747"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabbca3d0aa315f3e9bc6bacf244bdb747">FSMC_BCR3_WAITPOL</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gabbca3d0aa315f3e9bc6bacf244bdb747"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44fc6e205695d39b63c0f5b18c3cd214"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44fc6e205695d39b63c0f5b18c3cd214">FSMC_BCR3_WRAPMOD</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga44fc6e205695d39b63c0f5b18c3cd214"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab845515c37adae28d0e1452596cca7ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab845515c37adae28d0e1452596cca7ea">FSMC_BCR3_WAITCFG</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gab845515c37adae28d0e1452596cca7ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22c9b0145aa62cafd915a4c7da1931b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22c9b0145aa62cafd915a4c7da1931b5">FSMC_BCR3_WREN</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga22c9b0145aa62cafd915a4c7da1931b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9665b36b791862c464f07ad49dea315c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9665b36b791862c464f07ad49dea315c">FSMC_BCR3_WAITEN</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga9665b36b791862c464f07ad49dea315c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ab23550b17dca7ede57f8b5ef05f2e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ab23550b17dca7ede57f8b5ef05f2e7">FSMC_BCR3_EXTMOD</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga6ab23550b17dca7ede57f8b5ef05f2e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9e16fb6b68a8adb7722871ccdd2d9a44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9e16fb6b68a8adb7722871ccdd2d9a44">FSMC_BCR3_ASYNCWAIT</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga9e16fb6b68a8adb7722871ccdd2d9a44"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70c6da37696af84767f82efd0df3a7da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga70c6da37696af84767f82efd0df3a7da">FSMC_BCR3_CBURSTRW</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga70c6da37696af84767f82efd0df3a7da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a1ea2c2967cda7ef1597c4fb1a9dd9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a1ea2c2967cda7ef1597c4fb1a9dd9a">FSMC_BCR4_MBKEN</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga9a1ea2c2967cda7ef1597c4fb1a9dd9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga92d644d34b59762d0b48f7784d3aed4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga92d644d34b59762d0b48f7784d3aed4b">FSMC_BCR4_MUXEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga92d644d34b59762d0b48f7784d3aed4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1f9bf2c236b772e76174aff4388a1b6f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f9bf2c236b772e76174aff4388a1b6f">FSMC_BCR4_MTYP</a>   ((uint32_t)0x0000000C)</td></tr>
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<tr class="separator:ga1f9bf2c236b772e76174aff4388a1b6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66d358ec27a34fe13131d852b950643e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66d358ec27a34fe13131d852b950643e">FSMC_BCR4_MTYP_0</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga66d358ec27a34fe13131d852b950643e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac5abffefdc124215182346aba701183"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac5abffefdc124215182346aba701183">FSMC_BCR4_MTYP_1</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gaac5abffefdc124215182346aba701183"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c4ce32ca454c42344cfe73f71abd274"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c4ce32ca454c42344cfe73f71abd274">FSMC_BCR4_MWID</a>   ((uint32_t)0x00000030)</td></tr>
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<tr class="separator:ga5c4ce32ca454c42344cfe73f71abd274"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c8f397cfb1f07421abeaf3060f7a329"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c8f397cfb1f07421abeaf3060f7a329">FSMC_BCR4_MWID_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga1c8f397cfb1f07421abeaf3060f7a329"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5cd3a31190eb0cea8a72b55d8369970"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5cd3a31190eb0cea8a72b55d8369970">FSMC_BCR4_MWID_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaf5cd3a31190eb0cea8a72b55d8369970"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf769d7958a8c610ccca912600e61f30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabf769d7958a8c610ccca912600e61f30">FSMC_BCR4_FACCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gabf769d7958a8c610ccca912600e61f30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c6ffdcee5dc3de1402bd8b644d6ecf4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c6ffdcee5dc3de1402bd8b644d6ecf4">FSMC_BCR4_BURSTEN</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga2c6ffdcee5dc3de1402bd8b644d6ecf4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga485976f8857949064d060374031cad3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga485976f8857949064d060374031cad3d">FSMC_BCR4_WAITPOL</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga485976f8857949064d060374031cad3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa35333cfffc35c7948ee0aa0e5672c3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa35333cfffc35c7948ee0aa0e5672c3c">FSMC_BCR4_WRAPMOD</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaa35333cfffc35c7948ee0aa0e5672c3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11c35ab0ee9ee23a5352218b4b84a258"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11c35ab0ee9ee23a5352218b4b84a258">FSMC_BCR4_WAITCFG</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga11c35ab0ee9ee23a5352218b4b84a258"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf2eef4eb8e6bb99cace5145b6ad09ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf2eef4eb8e6bb99cace5145b6ad09ee">FSMC_BCR4_WREN</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gadf2eef4eb8e6bb99cace5145b6ad09ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga458727d27c2bc7cede05f6537bfc1bd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga458727d27c2bc7cede05f6537bfc1bd8">FSMC_BCR4_WAITEN</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="memitem:ga6794966a05855913923294f5c2ab69ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6794966a05855913923294f5c2ab69ed">FSMC_BCR4_EXTMOD</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="memitem:ga158eeaca2258bc25beae918d01e01dd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga158eeaca2258bc25beae918d01e01dd8">FSMC_BCR4_ASYNCWAIT</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="memitem:ga19293300b8230e38afa1c16c526b3f29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19293300b8230e38afa1c16c526b3f29">FSMC_BCR4_CBURSTRW</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="memitem:gab457e5d3a33d80db3ad070b1cf57669a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab457e5d3a33d80db3ad070b1cf57669a">FSMC_BTR1_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gab457e5d3a33d80db3ad070b1cf57669a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae29ca17c63df62cc12c06e6cfa3429e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae29ca17c63df62cc12c06e6cfa3429e3">FSMC_BTR1_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gae29ca17c63df62cc12c06e6cfa3429e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaefb98ce348ba665f122e44ddc0390b45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaefb98ce348ba665f122e44ddc0390b45">FSMC_BTR1_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="memitem:gaa5e5c5b00c91aca1cc266622d3f30bf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa5e5c5b00c91aca1cc266622d3f30bf0">FSMC_BTR1_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaa5e5c5b00c91aca1cc266622d3f30bf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f0105afe671cd62730cf879072c80f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f0105afe671cd62730cf879072c80f3">FSMC_BTR1_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2f0105afe671cd62730cf879072c80f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc4a3860c48a62ff0290622e1937072d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadc4a3860c48a62ff0290622e1937072d">FSMC_BTR1_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:gadc4a3860c48a62ff0290622e1937072d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga222a16d5a1a8deebaf39a96d94d3c3f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga222a16d5a1a8deebaf39a96d94d3c3f0">FSMC_BTR1_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga222a16d5a1a8deebaf39a96d94d3c3f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ad1f9164644c4ff4c6ae5a655478abc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ad1f9164644c4ff4c6ae5a655478abc">FSMC_BTR1_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga5ad1f9164644c4ff4c6ae5a655478abc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f9d68df0fd84b77342a565e9faad929"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f9d68df0fd84b77342a565e9faad929">FSMC_BTR1_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga3f9d68df0fd84b77342a565e9faad929"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e88e45163e76f529b5a94937526f45c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e88e45163e76f529b5a94937526f45c">FSMC_BTR1_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga6e88e45163e76f529b5a94937526f45c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae39175370a991b500962fd084230e389"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae39175370a991b500962fd084230e389">FSMC_BTR1_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gae39175370a991b500962fd084230e389"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4488a428f33d96263a00a30af42b849b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4488a428f33d96263a00a30af42b849b">FSMC_BTR1_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga4488a428f33d96263a00a30af42b849b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad53bd6a1decfafdb420a37453b3b5545"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad53bd6a1decfafdb420a37453b3b5545">FSMC_BTR1_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gad53bd6a1decfafdb420a37453b3b5545"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacce8f6cf5a9ba24943b3e762bde00aee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacce8f6cf5a9ba24943b3e762bde00aee">FSMC_BTR1_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gacce8f6cf5a9ba24943b3e762bde00aee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99638cc2cbe0dead029c201e5f30c3a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99638cc2cbe0dead029c201e5f30c3a8">FSMC_BTR1_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga99638cc2cbe0dead029c201e5f30c3a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ec9346bbaf845f1dffe33c4a625c0ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ec9346bbaf845f1dffe33c4a625c0ac">FSMC_BTR1_BUSTURN</a>   ((uint32_t)0x000F0000)</td></tr>
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<tr class="separator:ga7ec9346bbaf845f1dffe33c4a625c0ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c1578a85c4f2cef9e034c7b5da6d454"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c1578a85c4f2cef9e034c7b5da6d454">FSMC_BTR1_BUSTURN_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga6c1578a85c4f2cef9e034c7b5da6d454"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf873cbfe4827496215eb08bb33ae4784"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf873cbfe4827496215eb08bb33ae4784">FSMC_BTR1_BUSTURN_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gaf873cbfe4827496215eb08bb33ae4784"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad768d3ff0a5159e552663c9489b977f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad768d3ff0a5159e552663c9489b977f6">FSMC_BTR1_BUSTURN_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gad768d3ff0a5159e552663c9489b977f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3ecfd25fb64efb3745ee96b2877a017"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3ecfd25fb64efb3745ee96b2877a017">FSMC_BTR1_BUSTURN_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaf3ecfd25fb64efb3745ee96b2877a017"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac7c4dbd43df84559e30a9c332b265ad5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac7c4dbd43df84559e30a9c332b265ad5">FSMC_BTR1_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:gac7c4dbd43df84559e30a9c332b265ad5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe9c9e09de00afad666ace28c608032f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe9c9e09de00afad666ace28c608032f">FSMC_BTR1_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gabe9c9e09de00afad666ace28c608032f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafffebd7a0cf6e6d80b65804c2c50ce62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafffebd7a0cf6e6d80b65804c2c50ce62">FSMC_BTR1_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gafffebd7a0cf6e6d80b65804c2c50ce62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43afa754305cc1a7ff3075cdd4309990"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43afa754305cc1a7ff3075cdd4309990">FSMC_BTR1_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga43afa754305cc1a7ff3075cdd4309990"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68a146aec5d723a84945ae6da6c0692f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68a146aec5d723a84945ae6da6c0692f">FSMC_BTR1_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga68a146aec5d723a84945ae6da6c0692f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ef6dcccdb11a1b094966be0c019124b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4ef6dcccdb11a1b094966be0c019124b">FSMC_BTR1_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:ga4ef6dcccdb11a1b094966be0c019124b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2d832593697ba108d99a97e4fdfd159"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2d832593697ba108d99a97e4fdfd159">FSMC_BTR1_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gae2d832593697ba108d99a97e4fdfd159"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a7e4efc546c1c9d16c750a4542e1c55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a7e4efc546c1c9d16c750a4542e1c55">FSMC_BTR1_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga2a7e4efc546c1c9d16c750a4542e1c55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga22e7d41e0f94ab896c6eea199eb0aef1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22e7d41e0f94ab896c6eea199eb0aef1">FSMC_BTR1_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga22e7d41e0f94ab896c6eea199eb0aef1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b42f22fc488e0ed0d06832118773123"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b42f22fc488e0ed0d06832118773123">FSMC_BTR1_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga8b42f22fc488e0ed0d06832118773123"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga027548b6b5971a2c56558932c956fa4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga027548b6b5971a2c56558932c956fa4c">FSMC_BTR1_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:ga027548b6b5971a2c56558932c956fa4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf77aa4936dc4f35d1b426d147c643c80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf77aa4936dc4f35d1b426d147c643c80">FSMC_BTR1_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gaf77aa4936dc4f35d1b426d147c643c80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b336cf3ae23cfda19895927b63af558"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b336cf3ae23cfda19895927b63af558">FSMC_BTR1_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga7b336cf3ae23cfda19895927b63af558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23697810b99730ddf52834a5066c1ba5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23697810b99730ddf52834a5066c1ba5">FSMC_BTR2_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga23697810b99730ddf52834a5066c1ba5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga827398dc098f2d08bb77a04b2e7d6ba3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga827398dc098f2d08bb77a04b2e7d6ba3">FSMC_BTR2_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga827398dc098f2d08bb77a04b2e7d6ba3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1b40f47f2db0db78de6fe2df58b5d591"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b40f47f2db0db78de6fe2df58b5d591">FSMC_BTR2_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga1b40f47f2db0db78de6fe2df58b5d591"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga558185a28aeedbb098890348a041a74d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga558185a28aeedbb098890348a041a74d">FSMC_BTR2_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga558185a28aeedbb098890348a041a74d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbd4d42459a990825b61962d9118cd7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbd4d42459a990825b61962d9118cd7b">FSMC_BTR2_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gadbd4d42459a990825b61962d9118cd7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac37c974d0260ba1dbd1acaf6fceb425c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac37c974d0260ba1dbd1acaf6fceb425c">FSMC_BTR2_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="memitem:gabbf56fc3a549d1e68d56e1587123bd27"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabbf56fc3a549d1e68d56e1587123bd27">FSMC_BTR2_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="memitem:ga0b7d19f02444ce8b3286d44258c6caef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b7d19f02444ce8b3286d44258c6caef">FSMC_BTR2_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="memitem:ga7e9433e15e301d5d3f0dd6b73c9db2f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e9433e15e301d5d3f0dd6b73c9db2f7">FSMC_BTR2_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:gacc538e46145ed4947194f3ad63e211b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc538e46145ed4947194f3ad63e211b7">FSMC_BTR2_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="memitem:gabe1d3fe096ea53ea073b78bd6ddbff58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe1d3fe096ea53ea073b78bd6ddbff58">FSMC_BTR2_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="memitem:gaa066dab45a22ebd3a7102b92dcd251bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa066dab45a22ebd3a7102b92dcd251bd">FSMC_BTR2_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaa066dab45a22ebd3a7102b92dcd251bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68c15ca5fdd13efb5499f0e86bd5bc88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68c15ca5fdd13efb5499f0e86bd5bc88">FSMC_BTR2_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga68c15ca5fdd13efb5499f0e86bd5bc88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga36cfe553d431ca6976f0d36c73045836"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36cfe553d431ca6976f0d36c73045836">FSMC_BTR2_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:ga874499b29d2b72a75265f16a2d8ed834"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga874499b29d2b72a75265f16a2d8ed834">FSMC_BTR2_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga874499b29d2b72a75265f16a2d8ed834"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ae7c94522af51d2f96a0fa715dfa9b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ae7c94522af51d2f96a0fa715dfa9b0">FSMC_BTR2_BUSTURN</a>   ((uint32_t)0x000F0000)</td></tr>
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<tr class="separator:ga5ae7c94522af51d2f96a0fa715dfa9b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2617a99e5eab8b31ff168557f93852a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2617a99e5eab8b31ff168557f93852a3">FSMC_BTR2_BUSTURN_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga2617a99e5eab8b31ff168557f93852a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83871fa5cde9d72ec840d29d43aa2e57"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83871fa5cde9d72ec840d29d43aa2e57">FSMC_BTR2_BUSTURN_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga83871fa5cde9d72ec840d29d43aa2e57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacada2902f8612df1e5ac6e224bcf8d3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacada2902f8612df1e5ac6e224bcf8d3c">FSMC_BTR2_BUSTURN_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gacada2902f8612df1e5ac6e224bcf8d3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66ad543195f36fdb3efdf7550381f982"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66ad543195f36fdb3efdf7550381f982">FSMC_BTR2_BUSTURN_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga66ad543195f36fdb3efdf7550381f982"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37fdb25c494cf314cb680f84c5e0a503"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37fdb25c494cf314cb680f84c5e0a503">FSMC_BTR2_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:ga37fdb25c494cf314cb680f84c5e0a503"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ac8729c8ac330f6ade93a6a15a4ba70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ac8729c8ac330f6ade93a6a15a4ba70">FSMC_BTR2_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga1ac8729c8ac330f6ade93a6a15a4ba70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31920e8bf2d83ad3c2849f8e942bb6e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31920e8bf2d83ad3c2849f8e942bb6e4">FSMC_BTR2_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga31920e8bf2d83ad3c2849f8e942bb6e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5ba3172687049c687e3a38ec08d6c5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5ba3172687049c687e3a38ec08d6c5a">FSMC_BTR2_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaf5ba3172687049c687e3a38ec08d6c5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga453c2a90dc3340596c9d34672cede6a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga453c2a90dc3340596c9d34672cede6a0">FSMC_BTR2_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga453c2a90dc3340596c9d34672cede6a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3247db1653b31df0c34ab7898400bb5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae3247db1653b31df0c34ab7898400bb5">FSMC_BTR2_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:gae3247db1653b31df0c34ab7898400bb5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0510047c932d2833f6cbe0a4a5d7b9b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0510047c932d2833f6cbe0a4a5d7b9b5">FSMC_BTR2_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga0510047c932d2833f6cbe0a4a5d7b9b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e1852b706b3c719c0eab8ef863b39e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e1852b706b3c719c0eab8ef863b39e0">FSMC_BTR2_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga4e1852b706b3c719c0eab8ef863b39e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ace24f50d1c51c978af55d47c13c0e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ace24f50d1c51c978af55d47c13c0e9">FSMC_BTR2_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga7ace24f50d1c51c978af55d47c13c0e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99389b63c4dee3c54aa1de36a4119add"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99389b63c4dee3c54aa1de36a4119add">FSMC_BTR2_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga99389b63c4dee3c54aa1de36a4119add"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07b93600977cde6e31a9464f87606043"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07b93600977cde6e31a9464f87606043">FSMC_BTR2_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:ga07b93600977cde6e31a9464f87606043"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9383d89d5e557a166f6b8290892b89b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9383d89d5e557a166f6b8290892b89b3">FSMC_BTR2_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga9383d89d5e557a166f6b8290892b89b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad200e1dc2d1835e3dc0fa8f0483eb2c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad200e1dc2d1835e3dc0fa8f0483eb2c0">FSMC_BTR2_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gad200e1dc2d1835e3dc0fa8f0483eb2c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3e55daf436a25fadae7384611aa0f89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55daf436a25fadae7384611aa0f89">FSMC_BTR3_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gaf3e55daf436a25fadae7384611aa0f89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab6a21211dd7a3445e944af0fe1a4b600"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab6a21211dd7a3445e944af0fe1a4b600">FSMC_BTR3_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gab6a21211dd7a3445e944af0fe1a4b600"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51c23d36fa8e7e38048d94830bf0f74f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51c23d36fa8e7e38048d94830bf0f74f">FSMC_BTR3_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga51c23d36fa8e7e38048d94830bf0f74f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93be4171cb7d0b66d8d4d12e61b07b88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93be4171cb7d0b66d8d4d12e61b07b88">FSMC_BTR3_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga93be4171cb7d0b66d8d4d12e61b07b88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab01cf0b1c88857669d10fee8d7ba4d85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab01cf0b1c88857669d10fee8d7ba4d85">FSMC_BTR3_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gab01cf0b1c88857669d10fee8d7ba4d85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7833ee760b2400e6fb483b1d83cbdff3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7833ee760b2400e6fb483b1d83cbdff3">FSMC_BTR3_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:ga7833ee760b2400e6fb483b1d83cbdff3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad417ccae1c4018d0ff5c76c942aeb2ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad417ccae1c4018d0ff5c76c942aeb2ca">FSMC_BTR3_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gad417ccae1c4018d0ff5c76c942aeb2ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60d0ae6af13ef088367cef06c7f207d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60d0ae6af13ef088367cef06c7f207d3">FSMC_BTR3_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga60d0ae6af13ef088367cef06c7f207d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac029aaed48e2a3e2eedf767fe0ce0b92"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac029aaed48e2a3e2eedf767fe0ce0b92">FSMC_BTR3_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gac029aaed48e2a3e2eedf767fe0ce0b92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b6aab5907bc42e140ca5a4d60fcd64c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b6aab5907bc42e140ca5a4d60fcd64c">FSMC_BTR3_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga5b6aab5907bc42e140ca5a4d60fcd64c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e9ac671a510ee06e86c41d7876ffe10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e9ac671a510ee06e86c41d7876ffe10">FSMC_BTR3_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga1e9ac671a510ee06e86c41d7876ffe10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65fe87d29c1a4ee0b08014ed8e0423e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65fe87d29c1a4ee0b08014ed8e0423e1">FSMC_BTR3_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga65fe87d29c1a4ee0b08014ed8e0423e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad33e3df5c80255cb5e11ba427e9c224f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad33e3df5c80255cb5e11ba427e9c224f">FSMC_BTR3_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gad33e3df5c80255cb5e11ba427e9c224f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a31f070e41c6785ebc606d4f25d103a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a31f070e41c6785ebc606d4f25d103a">FSMC_BTR3_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:gad220fbd264261a37eac09d4f6c0b79a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad220fbd264261a37eac09d4f6c0b79a2">FSMC_BTR3_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="memitem:gae8a3ad9f940c6942682d8d97b1eb0ca4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8a3ad9f940c6942682d8d97b1eb0ca4">FSMC_BTR3_BUSTURN</a>   ((uint32_t)0x000F0000)</td></tr>
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<tr class="separator:gae8a3ad9f940c6942682d8d97b1eb0ca4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga739f2db66e52626aa9a5ee02c11d7a34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga739f2db66e52626aa9a5ee02c11d7a34">FSMC_BTR3_BUSTURN_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga739f2db66e52626aa9a5ee02c11d7a34"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7e4c4102ea6e6cf2082e78168edfc18e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e4c4102ea6e6cf2082e78168edfc18e">FSMC_BTR3_BUSTURN_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga7e4c4102ea6e6cf2082e78168edfc18e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5eab2601ae3cd040bf44feb3e70c459"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5eab2601ae3cd040bf44feb3e70c459">FSMC_BTR3_BUSTURN_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gad5eab2601ae3cd040bf44feb3e70c459"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf61e23804e0fa3ca45f851ca98de371"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf61e23804e0fa3ca45f851ca98de371">FSMC_BTR3_BUSTURN_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gacf61e23804e0fa3ca45f851ca98de371"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47a8d8e279c50995143ecf4124580703"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47a8d8e279c50995143ecf4124580703">FSMC_BTR3_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:ga47a8d8e279c50995143ecf4124580703"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd9c93b0ee64856981394a63d6a3a964"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd9c93b0ee64856981394a63d6a3a964">FSMC_BTR3_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gadd9c93b0ee64856981394a63d6a3a964"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98fa7611b4ae197ab25cdf1cae9f8ee1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga98fa7611b4ae197ab25cdf1cae9f8ee1">FSMC_BTR3_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga98fa7611b4ae197ab25cdf1cae9f8ee1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf806c044b2a3d1417acc79907dcaef4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf806c044b2a3d1417acc79907dcaef4b">FSMC_BTR3_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaf806c044b2a3d1417acc79907dcaef4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa9bf0683d046f9bcfb0d55a065ae69ab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa9bf0683d046f9bcfb0d55a065ae69ab">FSMC_BTR3_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gaa9bf0683d046f9bcfb0d55a065ae69ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa88a80458ddd56b0dfa7cf3599b986dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa88a80458ddd56b0dfa7cf3599b986dd">FSMC_BTR3_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:gaa88a80458ddd56b0dfa7cf3599b986dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga655083fdb0e563b9a4d6ea589194ba02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga655083fdb0e563b9a4d6ea589194ba02">FSMC_BTR3_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga655083fdb0e563b9a4d6ea589194ba02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga486280713c8f07d7033bce4e74825130"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga486280713c8f07d7033bce4e74825130">FSMC_BTR3_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga486280713c8f07d7033bce4e74825130"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8314e30c84dccd983de04fdeeb57c360"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8314e30c84dccd983de04fdeeb57c360">FSMC_BTR3_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga8314e30c84dccd983de04fdeeb57c360"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac7e7da5269a2dac164c9d1d01da2bc28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac7e7da5269a2dac164c9d1d01da2bc28">FSMC_BTR3_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gac7e7da5269a2dac164c9d1d01da2bc28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56c8f213e437ceed2140f2c16a0416cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56c8f213e437ceed2140f2c16a0416cd">FSMC_BTR3_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:ga56c8f213e437ceed2140f2c16a0416cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d50e71940995d42c5f9fadcb7cd61f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d50e71940995d42c5f9fadcb7cd61f2">FSMC_BTR3_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga4d50e71940995d42c5f9fadcb7cd61f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8bbfd5e08b73d1c5de53ee0ff0ddb9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8bbfd5e08b73d1c5de53ee0ff0ddb9a">FSMC_BTR3_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gac8bbfd5e08b73d1c5de53ee0ff0ddb9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab44cc2146b4cf6bc8f43292512fd8cf8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab44cc2146b4cf6bc8f43292512fd8cf8">FSMC_BTR4_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gab44cc2146b4cf6bc8f43292512fd8cf8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0ee1ab3716b0ab1a4e7b51234af7c63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0ee1ab3716b0ab1a4e7b51234af7c63">FSMC_BTR4_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaa0ee1ab3716b0ab1a4e7b51234af7c63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd427c001c5b17a3e083c81f6b228a50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd427c001c5b17a3e083c81f6b228a50">FSMC_BTR4_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gacd427c001c5b17a3e083c81f6b228a50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae722fdaa69bfb7622aa80c82e3772949"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae722fdaa69bfb7622aa80c82e3772949">FSMC_BTR4_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae722fdaa69bfb7622aa80c82e3772949"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f8ab4a1c7fe6e7dc2b093add88c274e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f8ab4a1c7fe6e7dc2b093add88c274e">FSMC_BTR4_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga0f8ab4a1c7fe6e7dc2b093add88c274e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e52ae9a5d59507bdf9f4f9da19444ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e52ae9a5d59507bdf9f4f9da19444ed">FSMC_BTR4_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:ga1e52ae9a5d59507bdf9f4f9da19444ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf6200f13c3eed1e9646750897a987a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf6200f13c3eed1e9646750897a987a2">FSMC_BTR4_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gadf6200f13c3eed1e9646750897a987a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0803bc2ad60138e0eef53a53ca5bf537"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0803bc2ad60138e0eef53a53ca5bf537">FSMC_BTR4_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga0803bc2ad60138e0eef53a53ca5bf537"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga893711250b9d3ea2e5e48ca53d1e0147"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga893711250b9d3ea2e5e48ca53d1e0147">FSMC_BTR4_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga893711250b9d3ea2e5e48ca53d1e0147"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75c73d4bb0ddcac383ca610a604d95b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75c73d4bb0ddcac383ca610a604d95b3">FSMC_BTR4_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga75c73d4bb0ddcac383ca610a604d95b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c28625ee031527a29f7cb7db1bb97cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c28625ee031527a29f7cb7db1bb97cf">FSMC_BTR4_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga2c28625ee031527a29f7cb7db1bb97cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabdb0212604c6c58c9524adc7931e2897"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabdb0212604c6c58c9524adc7931e2897">FSMC_BTR4_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gabdb0212604c6c58c9524adc7931e2897"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2353d753ca5532703b4f822b7d2a7382"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2353d753ca5532703b4f822b7d2a7382">FSMC_BTR4_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga2353d753ca5532703b4f822b7d2a7382"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d82a6f3fcf69d6b96968118db7b8216"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d82a6f3fcf69d6b96968118db7b8216">FSMC_BTR4_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga8d82a6f3fcf69d6b96968118db7b8216"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e0860f92bb204c4b5902d3e34b8b30a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e0860f92bb204c4b5902d3e34b8b30a">FSMC_BTR4_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga3e0860f92bb204c4b5902d3e34b8b30a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga207a9eedfc1b244c393be3c34ea60a15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga207a9eedfc1b244c393be3c34ea60a15">FSMC_BTR4_BUSTURN</a>   ((uint32_t)0x000F0000)</td></tr>
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<tr class="separator:ga207a9eedfc1b244c393be3c34ea60a15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4dec1fa50fca6639be7179d445aacfe4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4dec1fa50fca6639be7179d445aacfe4">FSMC_BTR4_BUSTURN_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga4dec1fa50fca6639be7179d445aacfe4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1db211382068251dc5cfe44a175e639"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab1db211382068251dc5cfe44a175e639">FSMC_BTR4_BUSTURN_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gab1db211382068251dc5cfe44a175e639"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa5391a8c2a1e8cd6abb81fa5b2836464"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa5391a8c2a1e8cd6abb81fa5b2836464">FSMC_BTR4_BUSTURN_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gaa5391a8c2a1e8cd6abb81fa5b2836464"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbfd74790a1e25339151de440e3a93e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbfd74790a1e25339151de440e3a93e5">FSMC_BTR4_BUSTURN_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gadbfd74790a1e25339151de440e3a93e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ac39964e3792653e454538407b11504"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ac39964e3792653e454538407b11504">FSMC_BTR4_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:ga7ac39964e3792653e454538407b11504"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacee394c98ac568fe1d6df61c887ed53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacee394c98ac568fe1d6df61c887ed53">FSMC_BTR4_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="memitem:ga9c7cd1d1a4954d494bd107400925f86f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c7cd1d1a4954d494bd107400925f86f">FSMC_BTR4_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga9c7cd1d1a4954d494bd107400925f86f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93b0ab3235ffacca24e6b285460c5dd3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93b0ab3235ffacca24e6b285460c5dd3">FSMC_BTR4_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga93b0ab3235ffacca24e6b285460c5dd3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga931463443390c5a706303e87a538d1ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga931463443390c5a706303e87a538d1ce">FSMC_BTR4_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga931463443390c5a706303e87a538d1ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa53cb7c299e794915d3aba803374adca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa53cb7c299e794915d3aba803374adca">FSMC_BTR4_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:gaa53cb7c299e794915d3aba803374adca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad2315f17d1cd7dd9da1b0ee2f7e4ea29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad2315f17d1cd7dd9da1b0ee2f7e4ea29">FSMC_BTR4_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gad2315f17d1cd7dd9da1b0ee2f7e4ea29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga808a7d758e6ca75c573d08ee92228745"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga808a7d758e6ca75c573d08ee92228745">FSMC_BTR4_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga808a7d758e6ca75c573d08ee92228745"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac376a62779292d64bfac24d572b743e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac376a62779292d64bfac24d572b743e9">FSMC_BTR4_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gac376a62779292d64bfac24d572b743e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadfc558894dcb263451dbac13f48fffe1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadfc558894dcb263451dbac13f48fffe1">FSMC_BTR4_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gadfc558894dcb263451dbac13f48fffe1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabbf731d99007936586f9e15f17c3c771"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabbf731d99007936586f9e15f17c3c771">FSMC_BTR4_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:gabbf731d99007936586f9e15f17c3c771"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e69759ab89b16573bafd2f6ded95bfb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e69759ab89b16573bafd2f6ded95bfb">FSMC_BTR4_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga8e69759ab89b16573bafd2f6ded95bfb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e486b11f6af0f566f8843a5c95c6a6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e486b11f6af0f566f8843a5c95c6a6c">FSMC_BTR4_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga3e486b11f6af0f566f8843a5c95c6a6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4aa5ee153cb4bf79f0d4ae2c47f365c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4aa5ee153cb4bf79f0d4ae2c47f365c4">FSMC_BWTR1_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga4aa5ee153cb4bf79f0d4ae2c47f365c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacb80aeedb6d0d9cb09e7b4d3ff8b541"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacb80aeedb6d0d9cb09e7b4d3ff8b541">FSMC_BWTR1_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaacb80aeedb6d0d9cb09e7b4d3ff8b541"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20dbbdff1e2f1d57727dabbc4b03c840"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20dbbdff1e2f1d57727dabbc4b03c840">FSMC_BWTR1_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga20dbbdff1e2f1d57727dabbc4b03c840"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga411f0d164c26dda8132ff22856757470"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga411f0d164c26dda8132ff22856757470">FSMC_BWTR1_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga411f0d164c26dda8132ff22856757470"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e2bc67999e8d2b63771fa223ffa8e4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e2bc67999e8d2b63771fa223ffa8e4d">FSMC_BWTR1_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga3e2bc67999e8d2b63771fa223ffa8e4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa3d8ff62f87ab6aeb5170dd67de15cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa3d8ff62f87ab6aeb5170dd67de15cf">FSMC_BWTR1_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:gafa3d8ff62f87ab6aeb5170dd67de15cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e24880c23375636d7504d42077a400a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e24880c23375636d7504d42077a400a">FSMC_BWTR1_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga1e24880c23375636d7504d42077a400a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb90dec93198b1d3077feb5fe508f004"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb90dec93198b1d3077feb5fe508f004">FSMC_BWTR1_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gafb90dec93198b1d3077feb5fe508f004"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26ef7d6cd5ec547a349462e4f31963b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26ef7d6cd5ec547a349462e4f31963b6">FSMC_BWTR1_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga26ef7d6cd5ec547a349462e4f31963b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4a961ecd844e14a90d1b2f6c5d59196"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4a961ecd844e14a90d1b2f6c5d59196">FSMC_BWTR1_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gac4a961ecd844e14a90d1b2f6c5d59196"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee2641a6f415d03df324667662bd3dcf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaee2641a6f415d03df324667662bd3dcf">FSMC_BWTR1_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gaee2641a6f415d03df324667662bd3dcf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga162800452847dd98d27a4078370518b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga162800452847dd98d27a4078370518b2">FSMC_BWTR1_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga162800452847dd98d27a4078370518b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16476bfbbcb9726c1fbc593d3568a514"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16476bfbbcb9726c1fbc593d3568a514">FSMC_BWTR1_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga16476bfbbcb9726c1fbc593d3568a514"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga623de376d9f5189d73068d0865a5049e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga623de376d9f5189d73068d0865a5049e">FSMC_BWTR1_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga623de376d9f5189d73068d0865a5049e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade0627f53e3df25fdaa973db6159bd70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade0627f53e3df25fdaa973db6159bd70">FSMC_BWTR1_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gade0627f53e3df25fdaa973db6159bd70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacab3c524b3e47327b24fa560feb93487"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacab3c524b3e47327b24fa560feb93487">FSMC_BWTR1_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:gacab3c524b3e47327b24fa560feb93487"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa16b4376e693343cf65ab05808398b7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa16b4376e693343cf65ab05808398b7f">FSMC_BWTR1_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaa16b4376e693343cf65ab05808398b7f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga632860254f0019e87c2e73c872d8d0c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga632860254f0019e87c2e73c872d8d0c3">FSMC_BWTR1_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga632860254f0019e87c2e73c872d8d0c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9debedb9d28dc78574eafc829cde91fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9debedb9d28dc78574eafc829cde91fe">FSMC_BWTR1_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga9debedb9d28dc78574eafc829cde91fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga67c483e37ed994b71337a0e0777c1290"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga67c483e37ed994b71337a0e0777c1290">FSMC_BWTR1_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga67c483e37ed994b71337a0e0777c1290"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5f05e337758cdb98cfc833e43bd6d674"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5f05e337758cdb98cfc833e43bd6d674">FSMC_BWTR1_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:ga5f05e337758cdb98cfc833e43bd6d674"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd6a7a7678ef3afbbed587cf318d1540"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd6a7a7678ef3afbbed587cf318d1540">FSMC_BWTR1_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gadd6a7a7678ef3afbbed587cf318d1540"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga515ba99da829728fa7128161786c933d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga515ba99da829728fa7128161786c933d">FSMC_BWTR1_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga515ba99da829728fa7128161786c933d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13d22659082e66df3f0497057cf7dda5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13d22659082e66df3f0497057cf7dda5">FSMC_BWTR1_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga13d22659082e66df3f0497057cf7dda5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3af303f1131ff3de0894ec908de252c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3af303f1131ff3de0894ec908de252c4">FSMC_BWTR1_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga3af303f1131ff3de0894ec908de252c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa676b8e4f48602c27ea8edab61ce5db0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa676b8e4f48602c27ea8edab61ce5db0">FSMC_BWTR1_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:gaa676b8e4f48602c27ea8edab61ce5db0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae87cae14e6bb4403b420fc9e4084d6e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae87cae14e6bb4403b420fc9e4084d6e2">FSMC_BWTR1_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gae87cae14e6bb4403b420fc9e4084d6e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac0cddde5db2e0bb09f1c8938afd6ac98"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac0cddde5db2e0bb09f1c8938afd6ac98">FSMC_BWTR1_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gac0cddde5db2e0bb09f1c8938afd6ac98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b6553bd9ad305aa42341e08b1736260"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b6553bd9ad305aa42341e08b1736260">FSMC_BWTR2_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga7b6553bd9ad305aa42341e08b1736260"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga593fe1987e8c6052cdb992e629f1d059"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga593fe1987e8c6052cdb992e629f1d059">FSMC_BWTR2_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga593fe1987e8c6052cdb992e629f1d059"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6dc23a2314a44b6ad9f293716f0c8a11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6dc23a2314a44b6ad9f293716f0c8a11">FSMC_BWTR2_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="memitem:ga1e9c799b36f45cad86a3f98d262baa6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e9c799b36f45cad86a3f98d262baa6d">FSMC_BWTR2_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:ga95abc246eb528275d894346c0665e930"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95abc246eb528275d894346c0665e930">FSMC_BWTR2_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga95abc246eb528275d894346c0665e930"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae879db1879650f99b1c75635884bda17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae879db1879650f99b1c75635884bda17">FSMC_BWTR2_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="memitem:gaf5826c5d5c544cd59210c071358fb8e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5826c5d5c544cd59210c071358fb8e9">FSMC_BWTR2_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="memitem:ga258acf47f7706a1cd0b0a914e63cbe17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga258acf47f7706a1cd0b0a914e63cbe17">FSMC_BWTR2_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="memitem:ga39f1a9ccc80d1218935936539a000b84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39f1a9ccc80d1218935936539a000b84">FSMC_BWTR2_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:ga81de376a21fc25a7e1c31db341dfcd3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81de376a21fc25a7e1c31db341dfcd3f">FSMC_BWTR2_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga81de376a21fc25a7e1c31db341dfcd3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab280652524006fbb3820597112136f14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab280652524006fbb3820597112136f14">FSMC_BWTR2_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="memitem:ga78a0f0466162848135313296ebf44890"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78a0f0466162848135313296ebf44890">FSMC_BWTR2_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="memitem:ga51e43e17e99141c9009c779cc359323a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51e43e17e99141c9009c779cc359323a">FSMC_BWTR2_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="memitem:ga1f8791c2a33f740f905d45e3754e3353"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f8791c2a33f740f905d45e3754e3353">FSMC_BWTR2_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga1f8791c2a33f740f905d45e3754e3353"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a2a5797dd14b5b89581c5fb08872fae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a2a5797dd14b5b89581c5fb08872fae">FSMC_BWTR2_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga8a2a5797dd14b5b89581c5fb08872fae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf62bb3c772353b551de22915814115b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf62bb3c772353b551de22915814115b6">FSMC_BWTR2_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:gaf62bb3c772353b551de22915814115b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d5aaffe4b4c549b247c31dead5585c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d5aaffe4b4c549b247c31dead5585c6">FSMC_BWTR2_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga7d5aaffe4b4c549b247c31dead5585c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6caca8a04c9768a84bcd958656ea8209"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6caca8a04c9768a84bcd958656ea8209">FSMC_BWTR2_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga6caca8a04c9768a84bcd958656ea8209"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae608705cf36abaf22e96e9c4c63d4363"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae608705cf36abaf22e96e9c4c63d4363">FSMC_BWTR2_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gae608705cf36abaf22e96e9c4c63d4363"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3cb607738f2c3aa4dae4990d0754f73"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3cb607738f2c3aa4dae4990d0754f73">FSMC_BWTR2_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gaf3cb607738f2c3aa4dae4990d0754f73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f04b7ebcecadd4b515cac94159ea8d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f04b7ebcecadd4b515cac94159ea8d3">FSMC_BWTR2_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:ga7f04b7ebcecadd4b515cac94159ea8d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac5b453a7316f378f6bf222d5de5b515"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac5b453a7316f378f6bf222d5de5b515">FSMC_BWTR2_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gaac5b453a7316f378f6bf222d5de5b515"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f5e6363ecbd1c23b1f49a9cfb3301d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f5e6363ecbd1c23b1f49a9cfb3301d2">FSMC_BWTR2_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga6f5e6363ecbd1c23b1f49a9cfb3301d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf028fc0c3148bf9075c09ad311afee65"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf028fc0c3148bf9075c09ad311afee65">FSMC_BWTR2_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaf028fc0c3148bf9075c09ad311afee65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9984c8161469dd0922de2d8c4cd9dbe5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9984c8161469dd0922de2d8c4cd9dbe5">FSMC_BWTR2_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga9984c8161469dd0922de2d8c4cd9dbe5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga320be3e2e266dc25bd02e10787b2ba0d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga320be3e2e266dc25bd02e10787b2ba0d">FSMC_BWTR2_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:ga320be3e2e266dc25bd02e10787b2ba0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabe5419d99a7ad4d4eb761c82077d958"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaabe5419d99a7ad4d4eb761c82077d958">FSMC_BWTR2_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gaabe5419d99a7ad4d4eb761c82077d958"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab6cdd284ad94abfef0f24fcb813b4558"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab6cdd284ad94abfef0f24fcb813b4558">FSMC_BWTR2_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gab6cdd284ad94abfef0f24fcb813b4558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga455ba53d0f18173b0694d71757a084ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga455ba53d0f18173b0694d71757a084ff">FSMC_BWTR3_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:ga455ba53d0f18173b0694d71757a084ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9dddd5ba924b56867c9cb39484ef498d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9dddd5ba924b56867c9cb39484ef498d">FSMC_BWTR3_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:gacd242d768da1f9ab4304e91e5dabb5a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd242d768da1f9ab4304e91e5dabb5a9">FSMC_BWTR3_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gacd242d768da1f9ab4304e91e5dabb5a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef99967dc66814cf5d732365c40daebb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef99967dc66814cf5d732365c40daebb">FSMC_BWTR3_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaef99967dc66814cf5d732365c40daebb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga471ebb2d47fb951340df6ba22b40a788"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga471ebb2d47fb951340df6ba22b40a788">FSMC_BWTR3_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga471ebb2d47fb951340df6ba22b40a788"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3d031a0d71677932a68639ba88bd13e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae3d031a0d71677932a68639ba88bd13e">FSMC_BWTR3_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:gae3d031a0d71677932a68639ba88bd13e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b3948c407a5a4be6a21cccad0a8d12d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b3948c407a5a4be6a21cccad0a8d12d">FSMC_BWTR3_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga5b3948c407a5a4be6a21cccad0a8d12d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea21d05228f7771c6306726af5da5a4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea21d05228f7771c6306726af5da5a4a">FSMC_BWTR3_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaea21d05228f7771c6306726af5da5a4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa574b3a1efe581d195789dcc8bba01f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa574b3a1efe581d195789dcc8bba01f8">FSMC_BWTR3_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaa574b3a1efe581d195789dcc8bba01f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae8216cf865785468af58dbce0002a7c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae8216cf865785468af58dbce0002a7c">FSMC_BWTR3_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaae8216cf865785468af58dbce0002a7c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae93d9fee8a67491918526019b439a00f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae93d9fee8a67491918526019b439a00f">FSMC_BWTR3_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="memitem:gaf1ec40c6360faeb133cb224a6789bb51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1ec40c6360faeb133cb224a6789bb51">FSMC_BWTR3_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaf1ec40c6360faeb133cb224a6789bb51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacaf23316e44d731620f0cbde29ae9a93"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacaf23316e44d731620f0cbde29ae9a93">FSMC_BWTR3_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gacaf23316e44d731620f0cbde29ae9a93"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31686e755ef0f98078d96c08891cf8f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31686e755ef0f98078d96c08891cf8f4">FSMC_BWTR3_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga31686e755ef0f98078d96c08891cf8f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a291f74abf021a7fe66ce8afd714c39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a291f74abf021a7fe66ce8afd714c39">FSMC_BWTR3_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga5a291f74abf021a7fe66ce8afd714c39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a270daf60bba0a4a9de6607635b0264"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a270daf60bba0a4a9de6607635b0264">FSMC_BWTR3_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:ga5a270daf60bba0a4a9de6607635b0264"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0e2f5c1eb92f5dba7c2d76b6267805a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0e2f5c1eb92f5dba7c2d76b6267805a">FSMC_BWTR3_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="memitem:gad909c7569c4740c823bf4b31f93d4edb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad909c7569c4740c823bf4b31f93d4edb">FSMC_BWTR3_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gad909c7569c4740c823bf4b31f93d4edb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab17fdae6a3e63acc21280497e0761d15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab17fdae6a3e63acc21280497e0761d15">FSMC_BWTR3_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gab17fdae6a3e63acc21280497e0761d15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56fbdeda5582325eb5eea0061209adc9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56fbdeda5582325eb5eea0061209adc9">FSMC_BWTR3_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga56fbdeda5582325eb5eea0061209adc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05b769f726e31038cfa6bf4897453088"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05b769f726e31038cfa6bf4897453088">FSMC_BWTR3_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:ga05b769f726e31038cfa6bf4897453088"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga900f347cf4b9debe88252ff1d453098e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga900f347cf4b9debe88252ff1d453098e">FSMC_BWTR3_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga900f347cf4b9debe88252ff1d453098e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb44640d0ccf25b8c8ec4b24b3600d26"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb44640d0ccf25b8c8ec4b24b3600d26">FSMC_BWTR3_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gafb44640d0ccf25b8c8ec4b24b3600d26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a6405794f28617802ba7bd3586a5f50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a6405794f28617802ba7bd3586a5f50">FSMC_BWTR3_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga4a6405794f28617802ba7bd3586a5f50"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga974cf9ed84e54c78ee995b02cc605706"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga974cf9ed84e54c78ee995b02cc605706">FSMC_BWTR3_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga974cf9ed84e54c78ee995b02cc605706"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa32a792c0c93d854a90bfbc36fa1329b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa32a792c0c93d854a90bfbc36fa1329b">FSMC_BWTR3_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:gaa32a792c0c93d854a90bfbc36fa1329b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64d4e414ea73b47e07364e1a121af6a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga64d4e414ea73b47e07364e1a121af6a4">FSMC_BWTR3_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga64d4e414ea73b47e07364e1a121af6a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada733b2bda718299345fd0191b25b49f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada733b2bda718299345fd0191b25b49f">FSMC_BWTR3_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gada733b2bda718299345fd0191b25b49f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa8c3c14faf87768beced4e297edc7bfd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa8c3c14faf87768beced4e297edc7bfd">FSMC_BWTR4_ADDSET</a>   ((uint32_t)0x0000000F)</td></tr>
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<tr class="separator:gaa8c3c14faf87768beced4e297edc7bfd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65ba73495f6192e409cc00f3e26e27e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65ba73495f6192e409cc00f3e26e27e0">FSMC_BWTR4_ADDSET_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga65ba73495f6192e409cc00f3e26e27e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3cc9fa3c1ceae0724f5005bb1e101775"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3cc9fa3c1ceae0724f5005bb1e101775">FSMC_BWTR4_ADDSET_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga3cc9fa3c1ceae0724f5005bb1e101775"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad2007941f4869504bfef23edbcc18bfa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad2007941f4869504bfef23edbcc18bfa">FSMC_BWTR4_ADDSET_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gad2007941f4869504bfef23edbcc18bfa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabcde23639f64241d95b02f5b950ef3cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabcde23639f64241d95b02f5b950ef3cc">FSMC_BWTR4_ADDSET_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gabcde23639f64241d95b02f5b950ef3cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaafe1198e70d843c883260d354b7ce7b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaafe1198e70d843c883260d354b7ce7b5">FSMC_BWTR4_ADDHLD</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:gaafe1198e70d843c883260d354b7ce7b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac62786f538820baa3f0f8edb17ef1b74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac62786f538820baa3f0f8edb17ef1b74">FSMC_BWTR4_ADDHLD_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gac62786f538820baa3f0f8edb17ef1b74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa69aa2d9cafe8f952721c88083c8a94e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa69aa2d9cafe8f952721c88083c8a94e">FSMC_BWTR4_ADDHLD_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaa69aa2d9cafe8f952721c88083c8a94e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c6d991498c385991b461832fb093399"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c6d991498c385991b461832fb093399">FSMC_BWTR4_ADDHLD_2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga4c6d991498c385991b461832fb093399"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac744bdeb5b9ae048b1fa1a07ce9ce9d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac744bdeb5b9ae048b1fa1a07ce9ce9d1">FSMC_BWTR4_ADDHLD_3</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gac744bdeb5b9ae048b1fa1a07ce9ce9d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6656c89aac87fc226c0e80f8f753abeb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6656c89aac87fc226c0e80f8f753abeb">FSMC_BWTR4_DATAST</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga6656c89aac87fc226c0e80f8f753abeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5636aaec144530e1c46e819b62c95f09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5636aaec144530e1c46e819b62c95f09">FSMC_BWTR4_DATAST_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga5636aaec144530e1c46e819b62c95f09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19eb9fccff444a00caf75b9d20a143ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19eb9fccff444a00caf75b9d20a143ed">FSMC_BWTR4_DATAST_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga19eb9fccff444a00caf75b9d20a143ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa40f9fa60ddb69fdcdcdface743f2c26"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa40f9fa60ddb69fdcdcdface743f2c26">FSMC_BWTR4_DATAST_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaa40f9fa60ddb69fdcdcdface743f2c26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa173c5ff9a7d316cd67897f8e36dbf5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa173c5ff9a7d316cd67897f8e36dbf5">FSMC_BWTR4_DATAST_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gafa173c5ff9a7d316cd67897f8e36dbf5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace3c57c780586c96ef5756d642c3bd01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace3c57c780586c96ef5756d642c3bd01">FSMC_BWTR4_CLKDIV</a>   ((uint32_t)0x00F00000)</td></tr>
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<tr class="separator:gace3c57c780586c96ef5756d642c3bd01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8eae837a65cdce995c6fc43afd196e76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8eae837a65cdce995c6fc43afd196e76">FSMC_BWTR4_CLKDIV_0</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga8eae837a65cdce995c6fc43afd196e76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga265d50716e1b6ae2395f0da696b4d12a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga265d50716e1b6ae2395f0da696b4d12a">FSMC_BWTR4_CLKDIV_1</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga265d50716e1b6ae2395f0da696b4d12a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga095f121a1739bcc61e40f2fbb5e8b6a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga095f121a1739bcc61e40f2fbb5e8b6a0">FSMC_BWTR4_CLKDIV_2</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga095f121a1739bcc61e40f2fbb5e8b6a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11d5deb7f2aed21baeb4df3015440bc2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11d5deb7f2aed21baeb4df3015440bc2">FSMC_BWTR4_CLKDIV_3</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga11d5deb7f2aed21baeb4df3015440bc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa6f7e16866ecede5f4258c05d95f571b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa6f7e16866ecede5f4258c05d95f571b">FSMC_BWTR4_DATLAT</a>   ((uint32_t)0x0F000000)</td></tr>
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<tr class="separator:gaa6f7e16866ecede5f4258c05d95f571b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9841723700d2b9611be2e7a7b0f19c33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9841723700d2b9611be2e7a7b0f19c33">FSMC_BWTR4_DATLAT_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga9841723700d2b9611be2e7a7b0f19c33"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad628c523ceee80e41c02dd4502baee2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad628c523ceee80e41c02dd4502baee2c">FSMC_BWTR4_DATLAT_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gad628c523ceee80e41c02dd4502baee2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafee2951c0bea4329727767db1bb96a4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafee2951c0bea4329727767db1bb96a4f">FSMC_BWTR4_DATLAT_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gafee2951c0bea4329727767db1bb96a4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1020e605f8a52d9fd857d3b91d23bf7a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1020e605f8a52d9fd857d3b91d23bf7a">FSMC_BWTR4_DATLAT_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga1020e605f8a52d9fd857d3b91d23bf7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d13f46a945d5daf6ec339781d3926a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d13f46a945d5daf6ec339781d3926a9">FSMC_BWTR4_ACCMOD</a>   ((uint32_t)0x30000000)</td></tr>
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<tr class="separator:ga1d13f46a945d5daf6ec339781d3926a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e30f51c68b4ac4f9efee2cd5a45943c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e30f51c68b4ac4f9efee2cd5a45943c">FSMC_BWTR4_ACCMOD_0</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga5e30f51c68b4ac4f9efee2cd5a45943c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7ba26fb09f035addbe1e4c3b0d093c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7ba26fb09f035addbe1e4c3b0d093c9">FSMC_BWTR4_ACCMOD_1</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaf7ba26fb09f035addbe1e4c3b0d093c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26f3ae80c9bbede6929c20004804476d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26f3ae80c9bbede6929c20004804476d">FSMC_PCR2_PWAITEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga26f3ae80c9bbede6929c20004804476d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a2bfd8de14f8c726439ba8f494b38a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a2bfd8de14f8c726439ba8f494b38a1">FSMC_PCR2_PBKEN</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga2a2bfd8de14f8c726439ba8f494b38a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga175ab8f61bbc0bb5692fb62691db1ce3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga175ab8f61bbc0bb5692fb62691db1ce3">FSMC_PCR2_PTYP</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga175ab8f61bbc0bb5692fb62691db1ce3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga656155275dc1c2f690687d07717e017a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga656155275dc1c2f690687d07717e017a">FSMC_PCR2_PWID</a>   ((uint32_t)0x00000030)</td></tr>
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<tr class="separator:ga656155275dc1c2f690687d07717e017a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae36f67be67a473c318fa937246c6de17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae36f67be67a473c318fa937246c6de17">FSMC_PCR2_PWID_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gae36f67be67a473c318fa937246c6de17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6180d3899a37f7e518b1e4b8bf935baa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6180d3899a37f7e518b1e4b8bf935baa">FSMC_PCR2_PWID_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga6180d3899a37f7e518b1e4b8bf935baa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa528d578aec8bc0f77a2550d4e48438"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa528d578aec8bc0f77a2550d4e48438">FSMC_PCR2_ECCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gafa528d578aec8bc0f77a2550d4e48438"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4f2c6c5ed8cd459a0822c35ea9e6800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa4f2c6c5ed8cd459a0822c35ea9e6800">FSMC_PCR2_TCLR</a>   ((uint32_t)0x00001E00)</td></tr>
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<tr class="separator:gaa4f2c6c5ed8cd459a0822c35ea9e6800"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1edc7eec1b5a76a851175e5a7caa6c5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1edc7eec1b5a76a851175e5a7caa6c5c">FSMC_PCR2_TCLR_0</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga1edc7eec1b5a76a851175e5a7caa6c5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf8baae9949bd0f294a698721da24808f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf8baae9949bd0f294a698721da24808f">FSMC_PCR2_TCLR_1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf8baae9949bd0f294a698721da24808f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga01ba36d067efffcfe5ecea3af1411675"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga01ba36d067efffcfe5ecea3af1411675">FSMC_PCR2_TCLR_2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga01ba36d067efffcfe5ecea3af1411675"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4999b81ed8783cca5f3b25500183ff9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4999b81ed8783cca5f3b25500183ff9a">FSMC_PCR2_TCLR_3</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga4999b81ed8783cca5f3b25500183ff9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa6513b62e23afdbadc4b25697378a0f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa6513b62e23afdbadc4b25697378a0f2">FSMC_PCR2_TAR</a>   ((uint32_t)0x0001E000)</td></tr>
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<tr class="separator:gaa6513b62e23afdbadc4b25697378a0f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd7e456c24f5978e8cb1078c633f0d23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd7e456c24f5978e8cb1078c633f0d23">FSMC_PCR2_TAR_0</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gacd7e456c24f5978e8cb1078c633f0d23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f0b2191750ab21af10f009e1a97ca13"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f0b2191750ab21af10f009e1a97ca13">FSMC_PCR2_TAR_1</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga8f0b2191750ab21af10f009e1a97ca13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3de27b9eb559156b7ed87407206b7a17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3de27b9eb559156b7ed87407206b7a17">FSMC_PCR2_TAR_2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga3de27b9eb559156b7ed87407206b7a17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c70f852bb8809e8ea4800a7dd616266"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c70f852bb8809e8ea4800a7dd616266">FSMC_PCR2_TAR_3</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga1c70f852bb8809e8ea4800a7dd616266"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2adbc7b4149193452b69bc55a968cd1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2adbc7b4149193452b69bc55a968cd1">FSMC_PCR2_ECCPS</a>   ((uint32_t)0x000E0000)</td></tr>
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<tr class="separator:gaf2adbc7b4149193452b69bc55a968cd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0e06e76b0dd7cc1f6b765b4c3ecfacb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0e06e76b0dd7cc1f6b765b4c3ecfacb">FSMC_PCR2_ECCPS_0</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gae0e06e76b0dd7cc1f6b765b4c3ecfacb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b947299d05921085b531f12db860f41"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b947299d05921085b531f12db860f41">FSMC_PCR2_ECCPS_1</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga8b947299d05921085b531f12db860f41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga199db72eae8707aba0b22ff18bd8bcd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga199db72eae8707aba0b22ff18bd8bcd0">FSMC_PCR2_ECCPS_2</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga199db72eae8707aba0b22ff18bd8bcd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae3f15324eb8692ddf3f294f358b1d8c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae3f15324eb8692ddf3f294f358b1d8c">FSMC_PCR3_PWAITEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaae3f15324eb8692ddf3f294f358b1d8c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac1334587ebb2f313078aab2c2f76cf7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac1334587ebb2f313078aab2c2f76cf7">FSMC_PCR3_PBKEN</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaac1334587ebb2f313078aab2c2f76cf7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade562589d0572ba223d2f6df265fe5b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade562589d0572ba223d2f6df265fe5b8">FSMC_PCR3_PTYP</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gade562589d0572ba223d2f6df265fe5b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac6f9b4e4449f105aa9bd3630f0466b9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac6f9b4e4449f105aa9bd3630f0466b9f">FSMC_PCR3_PWID</a>   ((uint32_t)0x00000030)</td></tr>
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<tr class="separator:gac6f9b4e4449f105aa9bd3630f0466b9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae07191f4d5e3c3ec38b271b30cd1ee07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae07191f4d5e3c3ec38b271b30cd1ee07">FSMC_PCR3_PWID_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gae07191f4d5e3c3ec38b271b30cd1ee07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa8819a742324c0523f3dc6b8959bcdd5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa8819a742324c0523f3dc6b8959bcdd5">FSMC_PCR3_PWID_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaa8819a742324c0523f3dc6b8959bcdd5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga723c4c8c3b97cd1ce18c3b5c888e5b4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga723c4c8c3b97cd1ce18c3b5c888e5b4e">FSMC_PCR3_ECCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga723c4c8c3b97cd1ce18c3b5c888e5b4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga478e4371d8baf2a0b2675b3113edb071"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga478e4371d8baf2a0b2675b3113edb071">FSMC_PCR3_TCLR</a>   ((uint32_t)0x00001E00)</td></tr>
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<tr class="separator:ga478e4371d8baf2a0b2675b3113edb071"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadedb0d10b5b53656dc152b9264faffbd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadedb0d10b5b53656dc152b9264faffbd">FSMC_PCR3_TCLR_0</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gadedb0d10b5b53656dc152b9264faffbd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab5536285f03b1732aed999d20c0e25aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5536285f03b1732aed999d20c0e25aa">FSMC_PCR3_TCLR_1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gab5536285f03b1732aed999d20c0e25aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7d40ba9c0f0da58948ee2cc546b634c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7d40ba9c0f0da58948ee2cc546b634c">FSMC_PCR3_TCLR_2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gae7d40ba9c0f0da58948ee2cc546b634c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63f96a640afa85d7521b05458f590a19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga63f96a640afa85d7521b05458f590a19">FSMC_PCR3_TCLR_3</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga63f96a640afa85d7521b05458f590a19"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga199c4b0e690f0da0de46e372183da642"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga199c4b0e690f0da0de46e372183da642">FSMC_PCR3_TAR</a>   ((uint32_t)0x0001E000)</td></tr>
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<tr class="separator:ga199c4b0e690f0da0de46e372183da642"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada0f17bcc683a5a6249348a63004e225"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada0f17bcc683a5a6249348a63004e225">FSMC_PCR3_TAR_0</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gada0f17bcc683a5a6249348a63004e225"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad4afb373f6f1cb1bedd653d8ea1dca78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad4afb373f6f1cb1bedd653d8ea1dca78">FSMC_PCR3_TAR_1</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gad4afb373f6f1cb1bedd653d8ea1dca78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga597698c6059f70f61310456e83353738"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga597698c6059f70f61310456e83353738">FSMC_PCR3_TAR_2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga597698c6059f70f61310456e83353738"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bd7aaf7ffcad9f4477ac4f2927a0912"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bd7aaf7ffcad9f4477ac4f2927a0912">FSMC_PCR3_TAR_3</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga4bd7aaf7ffcad9f4477ac4f2927a0912"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf8d92853ca6f97f72682c2f53f686998"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf8d92853ca6f97f72682c2f53f686998">FSMC_PCR3_ECCPS</a>   ((uint32_t)0x000E0000)</td></tr>
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<tr class="separator:gaf8d92853ca6f97f72682c2f53f686998"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga506daa911151e1b9de3ed2b5030d1a5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga506daa911151e1b9de3ed2b5030d1a5a">FSMC_PCR3_ECCPS_0</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga506daa911151e1b9de3ed2b5030d1a5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6403c557bd93b5297fa7fbbf8dc49cc9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6403c557bd93b5297fa7fbbf8dc49cc9">FSMC_PCR3_ECCPS_1</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga6403c557bd93b5297fa7fbbf8dc49cc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf041e921fb9af07e9c709d79bbfaec89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf041e921fb9af07e9c709d79bbfaec89">FSMC_PCR3_ECCPS_2</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gaf041e921fb9af07e9c709d79bbfaec89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab07ce7c785eb296a615b2c50415de21b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab07ce7c785eb296a615b2c50415de21b">FSMC_PCR4_PWAITEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gab07ce7c785eb296a615b2c50415de21b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f4a72bae5da27f8da23c13a54fe9622"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f4a72bae5da27f8da23c13a54fe9622">FSMC_PCR4_PBKEN</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:gabe2d6f4e9bdef35436d521ebbdca5e40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe2d6f4e9bdef35436d521ebbdca5e40">FSMC_PCR4_PTYP</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gabe2d6f4e9bdef35436d521ebbdca5e40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9486b2b7346570ecc5715f1d551c168a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9486b2b7346570ecc5715f1d551c168a">FSMC_PCR4_PWID</a>   ((uint32_t)0x00000030)</td></tr>
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<tr class="separator:ga9486b2b7346570ecc5715f1d551c168a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0995cb320e6293ea435df275ce67359f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0995cb320e6293ea435df275ce67359f">FSMC_PCR4_PWID_0</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga0995cb320e6293ea435df275ce67359f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b6be32b3844a299a2c92089e81e27e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b6be32b3844a299a2c92089e81e27e9">FSMC_PCR4_PWID_1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga8b6be32b3844a299a2c92089e81e27e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga646509f8bebb0d662c730ed4cabe741f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga646509f8bebb0d662c730ed4cabe741f">FSMC_PCR4_ECCEN</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga646509f8bebb0d662c730ed4cabe741f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c7164974019263cacbc7dda2fc14126"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c7164974019263cacbc7dda2fc14126">FSMC_PCR4_TCLR</a>   ((uint32_t)0x00001E00)</td></tr>
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<tr class="separator:ga7c7164974019263cacbc7dda2fc14126"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0dd78ad0c755190a69b37ebac75a11dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0dd78ad0c755190a69b37ebac75a11dd">FSMC_PCR4_TCLR_0</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga0dd78ad0c755190a69b37ebac75a11dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0ea2e2287999d3c7d6583aab492514d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0ea2e2287999d3c7d6583aab492514d">FSMC_PCR4_TCLR_1</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf0ea2e2287999d3c7d6583aab492514d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34dd56ee892fc187e105e4d820ce3b9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34dd56ee892fc187e105e4d820ce3b9a">FSMC_PCR4_TCLR_2</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga34dd56ee892fc187e105e4d820ce3b9a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0eb8dc60a469cfa96b3b3b7fad25ac92"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0eb8dc60a469cfa96b3b3b7fad25ac92">FSMC_PCR4_TCLR_3</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga0eb8dc60a469cfa96b3b3b7fad25ac92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0c583f305906f19b15ce3dc177fa21bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0c583f305906f19b15ce3dc177fa21bd">FSMC_PCR4_TAR</a>   ((uint32_t)0x0001E000)</td></tr>
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<tr class="separator:ga0c583f305906f19b15ce3dc177fa21bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga62fe4ede4c658b788596e8ea6f325c9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62fe4ede4c658b788596e8ea6f325c9f">FSMC_PCR4_TAR_0</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga62fe4ede4c658b788596e8ea6f325c9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a9958cbf815ac97c3500a46aaf573f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a9958cbf815ac97c3500a46aaf573f5">FSMC_PCR4_TAR_1</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga2a9958cbf815ac97c3500a46aaf573f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga669e16ecd48c92f65bd66f2da63fe53f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga669e16ecd48c92f65bd66f2da63fe53f">FSMC_PCR4_TAR_2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga669e16ecd48c92f65bd66f2da63fe53f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad298ef64d36721696517ed0d4ac12d32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad298ef64d36721696517ed0d4ac12d32">FSMC_PCR4_TAR_3</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gad298ef64d36721696517ed0d4ac12d32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2308baba97f307b8beb6239702471038"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2308baba97f307b8beb6239702471038">FSMC_PCR4_ECCPS</a>   ((uint32_t)0x000E0000)</td></tr>
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<tr class="separator:ga2308baba97f307b8beb6239702471038"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76514698225c0734c1e9be46b6dbd298"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76514698225c0734c1e9be46b6dbd298">FSMC_PCR4_ECCPS_0</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga76514698225c0734c1e9be46b6dbd298"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c43076003bbf01f95765125e19ab94d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c43076003bbf01f95765125e19ab94d">FSMC_PCR4_ECCPS_1</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga1c43076003bbf01f95765125e19ab94d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4ba96304e6618d4eb7672cdc3bd8f01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4ba96304e6618d4eb7672cdc3bd8f01">FSMC_PCR4_ECCPS_2</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gac4ba96304e6618d4eb7672cdc3bd8f01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19f1b90b2da89b68aa754d0a89d60de9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19f1b90b2da89b68aa754d0a89d60de9">FSMC_SR2_IRS</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga19f1b90b2da89b68aa754d0a89d60de9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga664d6e1440c12e76dfa34f716af85ed1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga664d6e1440c12e76dfa34f716af85ed1">FSMC_SR2_ILS</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:ga664d6e1440c12e76dfa34f716af85ed1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad6492ad6afe175283d07de38978936dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad6492ad6afe175283d07de38978936dc">FSMC_SR2_IFS</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:gad6492ad6afe175283d07de38978936dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3216bd665a118239e6ef0b58ec5e8a8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3216bd665a118239e6ef0b58ec5e8a8e">FSMC_SR2_IREN</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:ga3216bd665a118239e6ef0b58ec5e8a8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e9df0edd35d0ad6a35ff3a3b045b47c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e9df0edd35d0ad6a35ff3a3b045b47c">FSMC_SR2_ILEN</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:ga1e9df0edd35d0ad6a35ff3a3b045b47c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga755c088c58b27f79108675f56ea9d196"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga755c088c58b27f79108675f56ea9d196">FSMC_SR2_IFEN</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:ga755c088c58b27f79108675f56ea9d196"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ae2e544a4a515303f49815cdbd5ebbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ae2e544a4a515303f49815cdbd5ebbb">FSMC_SR2_FEMPT</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:ga6ae2e544a4a515303f49815cdbd5ebbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad929e4a8c1fdb49ee6f690121336afea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad929e4a8c1fdb49ee6f690121336afea">FSMC_SR3_IRS</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:gad929e4a8c1fdb49ee6f690121336afea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9803b4ab5b8cce213a80abc11c751d21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9803b4ab5b8cce213a80abc11c751d21">FSMC_SR3_ILS</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:ga9803b4ab5b8cce213a80abc11c751d21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafadff6b6f9e6430ada2f56bc9921dd7d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafadff6b6f9e6430ada2f56bc9921dd7d">FSMC_SR3_IFS</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:gafadff6b6f9e6430ada2f56bc9921dd7d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12baad15533ecbc57db95ea4939bc782"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12baad15533ecbc57db95ea4939bc782">FSMC_SR3_IREN</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:ga12baad15533ecbc57db95ea4939bc782"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86ac8f1f9f99c81a26fb54b597b57f12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga86ac8f1f9f99c81a26fb54b597b57f12">FSMC_SR3_ILEN</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:ga86ac8f1f9f99c81a26fb54b597b57f12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa7355e5368013759dbfabfec8b609ca8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7355e5368013759dbfabfec8b609ca8">FSMC_SR3_IFEN</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:gaa7355e5368013759dbfabfec8b609ca8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga230562cf231dc79cd9354933b39ae7de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga230562cf231dc79cd9354933b39ae7de">FSMC_SR3_FEMPT</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:ga230562cf231dc79cd9354933b39ae7de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga163f7143d51b516af0d46b142222957f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga163f7143d51b516af0d46b142222957f">FSMC_SR4_IRS</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga163f7143d51b516af0d46b142222957f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e19feccd1553911d08be673c4af72ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e19feccd1553911d08be673c4af72ad">FSMC_SR4_ILS</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:ga0e19feccd1553911d08be673c4af72ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1e7d71b32a0b70d772fbdc85f7053fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1e7d71b32a0b70d772fbdc85f7053fc">FSMC_SR4_IFS</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:gaf1e7d71b32a0b70d772fbdc85f7053fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f5f17d22e07bb6674cbd68740b9708a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f5f17d22e07bb6674cbd68740b9708a">FSMC_SR4_IREN</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:ga6f5f17d22e07bb6674cbd68740b9708a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac9b8d7c7b68723a4ef01843d547d95bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9b8d7c7b68723a4ef01843d547d95bc">FSMC_SR4_ILEN</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:gac9b8d7c7b68723a4ef01843d547d95bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf97394e42be634cb441204f6bfffb504"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf97394e42be634cb441204f6bfffb504">FSMC_SR4_IFEN</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:gaf97394e42be634cb441204f6bfffb504"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae7081cdf26e75bccfac1b6a29c04124"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae7081cdf26e75bccfac1b6a29c04124">FSMC_SR4_FEMPT</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:gaae7081cdf26e75bccfac1b6a29c04124"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga50a34195ddb7ab7aebc2acac39b27536"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga50a34195ddb7ab7aebc2acac39b27536">FSMC_PMEM2_MEMSET2</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga50a34195ddb7ab7aebc2acac39b27536"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga529858550113070878ce680da0a6bf7d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga529858550113070878ce680da0a6bf7d">FSMC_PMEM2_MEMSET2_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:ga28517c1f5aeded21b3f0326247b0bbe1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga28517c1f5aeded21b3f0326247b0bbe1">FSMC_PMEM2_MEMSET2_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga28517c1f5aeded21b3f0326247b0bbe1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1f59339df091ad8a00d75c32b335b711"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f59339df091ad8a00d75c32b335b711">FSMC_PMEM2_MEMSET2_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga1f59339df091ad8a00d75c32b335b711"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7715c089272c9709e8f94590b46be609"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7715c089272c9709e8f94590b46be609">FSMC_PMEM2_MEMSET2_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga7715c089272c9709e8f94590b46be609"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31a0e44106c1ec87375054be15b1cb84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31a0e44106c1ec87375054be15b1cb84">FSMC_PMEM2_MEMSET2_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga31a0e44106c1ec87375054be15b1cb84"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga221edf50060c5dad91de3c0b877fdbfc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga221edf50060c5dad91de3c0b877fdbfc">FSMC_PMEM2_MEMSET2_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga221edf50060c5dad91de3c0b877fdbfc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5dc6beefe3ea22a84dbc44fd30843778"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5dc6beefe3ea22a84dbc44fd30843778">FSMC_PMEM2_MEMSET2_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga5dc6beefe3ea22a84dbc44fd30843778"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae14181cbd85100c2b3b104525c42ee6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae14181cbd85100c2b3b104525c42ee6c">FSMC_PMEM2_MEMSET2_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gae14181cbd85100c2b3b104525c42ee6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7affee760cfe5d04a58bda9cd7fc5f72"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7affee760cfe5d04a58bda9cd7fc5f72">FSMC_PMEM2_MEMWAIT2</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga7affee760cfe5d04a58bda9cd7fc5f72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ee1c7f3347678dff204e6ac8c6eaf4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ee1c7f3347678dff204e6ac8c6eaf4f">FSMC_PMEM2_MEMWAIT2_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga7ee1c7f3347678dff204e6ac8c6eaf4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56de464fa3f895e75f0ec2ff3f9e1e1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56de464fa3f895e75f0ec2ff3f9e1e1e">FSMC_PMEM2_MEMWAIT2_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga56de464fa3f895e75f0ec2ff3f9e1e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga922a823292054746923fb13b8f4c1b5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga922a823292054746923fb13b8f4c1b5c">FSMC_PMEM2_MEMWAIT2_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga922a823292054746923fb13b8f4c1b5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44f9c0141f457b0ef0ff42c1645d7337"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44f9c0141f457b0ef0ff42c1645d7337">FSMC_PMEM2_MEMWAIT2_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga44f9c0141f457b0ef0ff42c1645d7337"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d15645ffe422f3e35cc03efd93361cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d15645ffe422f3e35cc03efd93361cb">FSMC_PMEM2_MEMWAIT2_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga8d15645ffe422f3e35cc03efd93361cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga640d5866b22b11924b7e4c9bfc608624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga640d5866b22b11924b7e4c9bfc608624">FSMC_PMEM2_MEMWAIT2_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga640d5866b22b11924b7e4c9bfc608624"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51d69f501306eae03db719cb52065b3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51d69f501306eae03db719cb52065b3c">FSMC_PMEM2_MEMWAIT2_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga51d69f501306eae03db719cb52065b3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga127b0e01d15f1007cfa67247a99da26f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga127b0e01d15f1007cfa67247a99da26f">FSMC_PMEM2_MEMWAIT2_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga127b0e01d15f1007cfa67247a99da26f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad2c79ef9df8b619e93c15b506f4fd7d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad2c79ef9df8b619e93c15b506f4fd7d">FSMC_PMEM2_MEMHOLD2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gaad2c79ef9df8b619e93c15b506f4fd7d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd16a720c69fcac1f6b798cf6f9bbb7e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd16a720c69fcac1f6b798cf6f9bbb7e">FSMC_PMEM2_MEMHOLD2_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gadd16a720c69fcac1f6b798cf6f9bbb7e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4630e2bdb842914d0f7b53d4ed610122"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4630e2bdb842914d0f7b53d4ed610122">FSMC_PMEM2_MEMHOLD2_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga4630e2bdb842914d0f7b53d4ed610122"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf699fd414971d0c52159c21652f5e58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf699fd414971d0c52159c21652f5e58">FSMC_PMEM2_MEMHOLD2_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gacf699fd414971d0c52159c21652f5e58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3e1f50389b82f8737a12ef6d1683c4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3e1f50389b82f8737a12ef6d1683c4f">FSMC_PMEM2_MEMHOLD2_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gad3e1f50389b82f8737a12ef6d1683c4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00c7b1a8cbcbcbcc0495ebd7c877ca9e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00c7b1a8cbcbcbcc0495ebd7c877ca9e">FSMC_PMEM2_MEMHOLD2_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga00c7b1a8cbcbcbcc0495ebd7c877ca9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9cd7c5637824522c2bd0f2cd165ca218"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9cd7c5637824522c2bd0f2cd165ca218">FSMC_PMEM2_MEMHOLD2_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga9cd7c5637824522c2bd0f2cd165ca218"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52ee3806d174025ab98d6c9148f17ae2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52ee3806d174025ab98d6c9148f17ae2">FSMC_PMEM2_MEMHOLD2_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga52ee3806d174025ab98d6c9148f17ae2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad1afae5788b827aebc3df92c74754b38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad1afae5788b827aebc3df92c74754b38">FSMC_PMEM2_MEMHOLD2_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gad1afae5788b827aebc3df92c74754b38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a7783e155a688bf79e68ebf570421c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a7783e155a688bf79e68ebf570421c4">FSMC_PMEM2_MEMHIZ2</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga8a7783e155a688bf79e68ebf570421c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8bb51ecefa94c1ab3b91c7a14705b8c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8bb51ecefa94c1ab3b91c7a14705b8c8">FSMC_PMEM2_MEMHIZ2_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga8bb51ecefa94c1ab3b91c7a14705b8c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c0d8bf861d9918763b7391d4ad287b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c0d8bf861d9918763b7391d4ad287b0">FSMC_PMEM2_MEMHIZ2_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga4c0d8bf861d9918763b7391d4ad287b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaebd6a4457fa0ac4f1b98fdc58bef9999"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaebd6a4457fa0ac4f1b98fdc58bef9999">FSMC_PMEM2_MEMHIZ2_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaebd6a4457fa0ac4f1b98fdc58bef9999"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaded9a6b1b516fa2595988c84c5465f9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaded9a6b1b516fa2595988c84c5465f9b">FSMC_PMEM2_MEMHIZ2_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gaded9a6b1b516fa2595988c84c5465f9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9b1831fb25422c7a126a7d029223394"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9b1831fb25422c7a126a7d029223394">FSMC_PMEM2_MEMHIZ2_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gad9b1831fb25422c7a126a7d029223394"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae828a4dde56e15f78ab156feeb329af9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae828a4dde56e15f78ab156feeb329af9">FSMC_PMEM2_MEMHIZ2_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gae828a4dde56e15f78ab156feeb329af9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf5464a2e8aeec6eb06c58283168ef97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf5464a2e8aeec6eb06c58283168ef97">FSMC_PMEM2_MEMHIZ2_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gacf5464a2e8aeec6eb06c58283168ef97"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3c5ca1880a516478e1b8f1142066c004"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c5ca1880a516478e1b8f1142066c004">FSMC_PMEM2_MEMHIZ2_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga3c5ca1880a516478e1b8f1142066c004"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf69ac574f9be3c11ada1e2dc4c3abe4f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf69ac574f9be3c11ada1e2dc4c3abe4f">FSMC_PMEM3_MEMSET3</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gaf69ac574f9be3c11ada1e2dc4c3abe4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee68bc7ff3e4cf11c2ca826541858c6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaee68bc7ff3e4cf11c2ca826541858c6a">FSMC_PMEM3_MEMSET3_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaee68bc7ff3e4cf11c2ca826541858c6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa10132605ec4a4be1ab48ee6b36080e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa10132605ec4a4be1ab48ee6b36080e">FSMC_PMEM3_MEMSET3_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gafa10132605ec4a4be1ab48ee6b36080e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd867b06de7c7a49244b6a35570d2cd2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd867b06de7c7a49244b6a35570d2cd2">FSMC_PMEM3_MEMSET3_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gacd867b06de7c7a49244b6a35570d2cd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga292a8826723614aa2504a376f4a2e5d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga292a8826723614aa2504a376f4a2e5d5">FSMC_PMEM3_MEMSET3_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga292a8826723614aa2504a376f4a2e5d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98703fee6465ba580b052ef76f2c63f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga98703fee6465ba580b052ef76f2c63f2">FSMC_PMEM3_MEMSET3_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga98703fee6465ba580b052ef76f2c63f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaea28a64fc9a7e0df35826b4ec372361"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaea28a64fc9a7e0df35826b4ec372361">FSMC_PMEM3_MEMSET3_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaaea28a64fc9a7e0df35826b4ec372361"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea51bbe866574be10bdc1d2d16bb9810"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea51bbe866574be10bdc1d2d16bb9810">FSMC_PMEM3_MEMSET3_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:ga702eeb8c3930ea564af728cc3bb9044b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga702eeb8c3930ea564af728cc3bb9044b">FSMC_PMEM3_MEMSET3_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga702eeb8c3930ea564af728cc3bb9044b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4243cb8b53a10143621872c0d0ed318b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4243cb8b53a10143621872c0d0ed318b">FSMC_PMEM3_MEMWAIT3</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga4243cb8b53a10143621872c0d0ed318b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30d8aad77f584d1c380b6d04d4984ac5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30d8aad77f584d1c380b6d04d4984ac5">FSMC_PMEM3_MEMWAIT3_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga30d8aad77f584d1c380b6d04d4984ac5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacf4638838e3cf2dfa076ef795596967"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacf4638838e3cf2dfa076ef795596967">FSMC_PMEM3_MEMWAIT3_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaacf4638838e3cf2dfa076ef795596967"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1c65a1027062f3fff04dfdd24c33e64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1c65a1027062f3fff04dfdd24c33e64">FSMC_PMEM3_MEMWAIT3_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaa1c65a1027062f3fff04dfdd24c33e64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae23146168ddc8e06defd6e75390dde1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae23146168ddc8e06defd6e75390dde1d">FSMC_PMEM3_MEMWAIT3_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gae23146168ddc8e06defd6e75390dde1d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79640d63c03f94bd4f38859c46bad820"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79640d63c03f94bd4f38859c46bad820">FSMC_PMEM3_MEMWAIT3_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga79640d63c03f94bd4f38859c46bad820"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d36841fa1730bbbc825278cffd623f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d36841fa1730bbbc825278cffd623f3">FSMC_PMEM3_MEMWAIT3_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga8d36841fa1730bbbc825278cffd623f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2bd34f98ee23b7a58ac63cd195c00d70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bd34f98ee23b7a58ac63cd195c00d70">FSMC_PMEM3_MEMWAIT3_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga2bd34f98ee23b7a58ac63cd195c00d70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f485579592b7fdf2e480523ee220418"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f485579592b7fdf2e480523ee220418">FSMC_PMEM3_MEMWAIT3_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga0f485579592b7fdf2e480523ee220418"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8ef1e0f4db1e2792b0939f9058a149b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8ef1e0f4db1e2792b0939f9058a149b">FSMC_PMEM3_MEMHOLD3</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gac8ef1e0f4db1e2792b0939f9058a149b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1abd4698bb45c784b23b8d431eb90f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa1abd4698bb45c784b23b8d431eb90f1">FSMC_PMEM3_MEMHOLD3_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaa1abd4698bb45c784b23b8d431eb90f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0a93e71d784bdb1cd115805feac42d6b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a93e71d784bdb1cd115805feac42d6b">FSMC_PMEM3_MEMHOLD3_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga0a93e71d784bdb1cd115805feac42d6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20a5443b5236e71b8dfe0620abffbd68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20a5443b5236e71b8dfe0620abffbd68">FSMC_PMEM3_MEMHOLD3_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga20a5443b5236e71b8dfe0620abffbd68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b330eabb266b26cf6aa93b12bfe7b38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b330eabb266b26cf6aa93b12bfe7b38">FSMC_PMEM3_MEMHOLD3_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga3b330eabb266b26cf6aa93b12bfe7b38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac6d1864268bb87124d127d92e8db54dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac6d1864268bb87124d127d92e8db54dc">FSMC_PMEM3_MEMHOLD3_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gac6d1864268bb87124d127d92e8db54dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8968569a91c0b5d6c456074ddfc98aa3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8968569a91c0b5d6c456074ddfc98aa3">FSMC_PMEM3_MEMHOLD3_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga8968569a91c0b5d6c456074ddfc98aa3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf40967f9e19b41e2692b7fe1177b8629"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf40967f9e19b41e2692b7fe1177b8629">FSMC_PMEM3_MEMHOLD3_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaf40967f9e19b41e2692b7fe1177b8629"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0da29e1e300e47aebb0bd47bf5f0563"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0da29e1e300e47aebb0bd47bf5f0563">FSMC_PMEM3_MEMHOLD3_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gaf0da29e1e300e47aebb0bd47bf5f0563"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a77d54c66589f233792d30fc83e7f12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a77d54c66589f233792d30fc83e7f12">FSMC_PMEM3_MEMHIZ3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga3a77d54c66589f233792d30fc83e7f12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d8453ab8a7488ff13c681154bfd293c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d8453ab8a7488ff13c681154bfd293c">FSMC_PMEM3_MEMHIZ3_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga2d8453ab8a7488ff13c681154bfd293c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf023951ad4fd31a691cc26fc3c27ec46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf023951ad4fd31a691cc26fc3c27ec46">FSMC_PMEM3_MEMHIZ3_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaf023951ad4fd31a691cc26fc3c27ec46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf8d790834161e0224c878cd8eab190e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf8d790834161e0224c878cd8eab190e">FSMC_PMEM3_MEMHIZ3_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaaf8d790834161e0224c878cd8eab190e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26daeb039123824e2de5fdd64cb3a1ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26daeb039123824e2de5fdd64cb3a1ff">FSMC_PMEM3_MEMHIZ3_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga26daeb039123824e2de5fdd64cb3a1ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafd06d96e44933ce665b2af8c2a4098e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafd06d96e44933ce665b2af8c2a4098e4">FSMC_PMEM3_MEMHIZ3_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gafd06d96e44933ce665b2af8c2a4098e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef1254b2e2251da2b30aa297d1d0a1f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef1254b2e2251da2b30aa297d1d0a1f8">FSMC_PMEM3_MEMHIZ3_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaef1254b2e2251da2b30aa297d1d0a1f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf33c72c5ab0747d587a801835cf1a897"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf33c72c5ab0747d587a801835cf1a897">FSMC_PMEM3_MEMHIZ3_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gaf33c72c5ab0747d587a801835cf1a897"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa7304d0d28edd32a70be474e656fbf8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7304d0d28edd32a70be474e656fbf8e">FSMC_PMEM3_MEMHIZ3_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:gaa7304d0d28edd32a70be474e656fbf8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b5cb5385ce2cef772ee4493c25617aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b5cb5385ce2cef772ee4493c25617aa">FSMC_PMEM4_MEMSET4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga3b5cb5385ce2cef772ee4493c25617aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6df1a1190522593b71da113c7ea8cfab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6df1a1190522593b71da113c7ea8cfab">FSMC_PMEM4_MEMSET4_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga6df1a1190522593b71da113c7ea8cfab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6fa76a9c077f40e973df8fe6903c69c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fa76a9c077f40e973df8fe6903c69c4">FSMC_PMEM4_MEMSET4_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga6fa76a9c077f40e973df8fe6903c69c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03ddc1ecb61313593976bf70aec06e9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03ddc1ecb61313593976bf70aec06e9f">FSMC_PMEM4_MEMSET4_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga03ddc1ecb61313593976bf70aec06e9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4280253a6049c7739c6b70a6d7940998"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4280253a6049c7739c6b70a6d7940998">FSMC_PMEM4_MEMSET4_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga4280253a6049c7739c6b70a6d7940998"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga153d7b557dc40b797f93bf5593808279"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga153d7b557dc40b797f93bf5593808279">FSMC_PMEM4_MEMSET4_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga153d7b557dc40b797f93bf5593808279"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc8fc6eadc2e952227c121b6d6114834"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc8fc6eadc2e952227c121b6d6114834">FSMC_PMEM4_MEMSET4_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gabc8fc6eadc2e952227c121b6d6114834"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaecce633b6da6db82000f1d39dc23bb3b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaecce633b6da6db82000f1d39dc23bb3b">FSMC_PMEM4_MEMSET4_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaecce633b6da6db82000f1d39dc23bb3b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga04c68698ff6f47551244ae5a26893059"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga04c68698ff6f47551244ae5a26893059">FSMC_PMEM4_MEMSET4_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga04c68698ff6f47551244ae5a26893059"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9673f81abf15ad70d09520db9ddfc58d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9673f81abf15ad70d09520db9ddfc58d">FSMC_PMEM4_MEMWAIT4</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga9673f81abf15ad70d09520db9ddfc58d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c88b294c963e5be76da4bf3048af411"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c88b294c963e5be76da4bf3048af411">FSMC_PMEM4_MEMWAIT4_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga9c88b294c963e5be76da4bf3048af411"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga24d45891fa0a503d81f68f62f5fd18e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga24d45891fa0a503d81f68f62f5fd18e5">FSMC_PMEM4_MEMWAIT4_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga24d45891fa0a503d81f68f62f5fd18e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1fa35a7722b6339a7cef85b5be2280d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1fa35a7722b6339a7cef85b5be2280d">FSMC_PMEM4_MEMWAIT4_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:ga929f7f1066e3f2d69c72126615d06cb0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga929f7f1066e3f2d69c72126615d06cb0">FSMC_PMEM4_MEMWAIT4_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="memitem:ga5282e3d9205f778b67ef00c27beb2918"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5282e3d9205f778b67ef00c27beb2918">FSMC_PMEM4_MEMWAIT4_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga5282e3d9205f778b67ef00c27beb2918"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1eed44a0b89a9f14b08c4ab2578ca5cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1eed44a0b89a9f14b08c4ab2578ca5cc">FSMC_PMEM4_MEMWAIT4_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga1eed44a0b89a9f14b08c4ab2578ca5cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2429913d3b7993dfda75413f0a72bf4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2429913d3b7993dfda75413f0a72bf4">FSMC_PMEM4_MEMWAIT4_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gab2429913d3b7993dfda75413f0a72bf4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga247eb296ad16d1c7f2ebea0ca85619f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga247eb296ad16d1c7f2ebea0ca85619f9">FSMC_PMEM4_MEMWAIT4_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga247eb296ad16d1c7f2ebea0ca85619f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5028f0c2a642b7faedf602f0b2c0d64c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5028f0c2a642b7faedf602f0b2c0d64c">FSMC_PMEM4_MEMHOLD4</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga5028f0c2a642b7faedf602f0b2c0d64c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf07eef15a372886fda3182f49e2e912e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf07eef15a372886fda3182f49e2e912e">FSMC_PMEM4_MEMHOLD4_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gaf07eef15a372886fda3182f49e2e912e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa05a691ca81b6fe6df07adb1c5142597"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa05a691ca81b6fe6df07adb1c5142597">FSMC_PMEM4_MEMHOLD4_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gaa05a691ca81b6fe6df07adb1c5142597"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaafd4f50c33f4ec69e878983fb6065c73"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaafd4f50c33f4ec69e878983fb6065c73">FSMC_PMEM4_MEMHOLD4_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gaafd4f50c33f4ec69e878983fb6065c73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac3cf67d6699d41fc042aed2be6d6aef0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3cf67d6699d41fc042aed2be6d6aef0">FSMC_PMEM4_MEMHOLD4_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gac3cf67d6699d41fc042aed2be6d6aef0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga963acb8aef1a1e3f7f369421a3f9bfd9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga963acb8aef1a1e3f7f369421a3f9bfd9">FSMC_PMEM4_MEMHOLD4_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga963acb8aef1a1e3f7f369421a3f9bfd9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac3ca8c6eb5fde2be7d38bde8aedb5522"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3ca8c6eb5fde2be7d38bde8aedb5522">FSMC_PMEM4_MEMHOLD4_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gac3ca8c6eb5fde2be7d38bde8aedb5522"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0352f9aa02c4037d690b516d7385d27"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0352f9aa02c4037d690b516d7385d27">FSMC_PMEM4_MEMHOLD4_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gae0352f9aa02c4037d690b516d7385d27"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga880aa86c933687f7565b7ab79776923e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga880aa86c933687f7565b7ab79776923e">FSMC_PMEM4_MEMHOLD4_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga880aa86c933687f7565b7ab79776923e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b194500112e61e5dd41ded843bb08c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b194500112e61e5dd41ded843bb08c6">FSMC_PMEM4_MEMHIZ4</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga6b194500112e61e5dd41ded843bb08c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9298e847d13d24cbe87a3c477af9f02c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9298e847d13d24cbe87a3c477af9f02c">FSMC_PMEM4_MEMHIZ4_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga9298e847d13d24cbe87a3c477af9f02c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga591eb0822bbb91c4ba12f80d35424c4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga591eb0822bbb91c4ba12f80d35424c4c">FSMC_PMEM4_MEMHIZ4_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga591eb0822bbb91c4ba12f80d35424c4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6db858408154b3694bb1fdc995f7e069"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6db858408154b3694bb1fdc995f7e069">FSMC_PMEM4_MEMHIZ4_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga6db858408154b3694bb1fdc995f7e069"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e38ef7ec628928bea867de00af9b206"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e38ef7ec628928bea867de00af9b206">FSMC_PMEM4_MEMHIZ4_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga0e38ef7ec628928bea867de00af9b206"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81a86c24f41bd5363793953df972d941"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81a86c24f41bd5363793953df972d941">FSMC_PMEM4_MEMHIZ4_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga81a86c24f41bd5363793953df972d941"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga08a6ec2df1aa20cfcfacaed7e60417a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga08a6ec2df1aa20cfcfacaed7e60417a0">FSMC_PMEM4_MEMHIZ4_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga08a6ec2df1aa20cfcfacaed7e60417a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga443fff9e0a661cce0d3fe96886eceb0b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga443fff9e0a661cce0d3fe96886eceb0b">FSMC_PMEM4_MEMHIZ4_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga443fff9e0a661cce0d3fe96886eceb0b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga90cf92af2475f9f7cadbb9553225260d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga90cf92af2475f9f7cadbb9553225260d">FSMC_PMEM4_MEMHIZ4_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga90cf92af2475f9f7cadbb9553225260d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab6cd1418de73ee3b214be589912e45f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab6cd1418de73ee3b214be589912e45f">FSMC_PATT2_ATTSET2</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gaab6cd1418de73ee3b214be589912e45f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab4718770edfb1b9b96df7410a58f79b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab4718770edfb1b9b96df7410a58f79b">FSMC_PATT2_ATTSET2_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaab4718770edfb1b9b96df7410a58f79b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4cde8c8360b22a3fb63615b4274653c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4cde8c8360b22a3fb63615b4274653c9">FSMC_PATT2_ATTSET2_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga4cde8c8360b22a3fb63615b4274653c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae80034b8760da9dd1faaf7e326b6002a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae80034b8760da9dd1faaf7e326b6002a">FSMC_PATT2_ATTSET2_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae80034b8760da9dd1faaf7e326b6002a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11924ff951b3e939d2d20807901a82bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11924ff951b3e939d2d20807901a82bf">FSMC_PATT2_ATTSET2_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga11924ff951b3e939d2d20807901a82bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad1b81efbb998d5e86685075396fd83b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad1b81efbb998d5e86685075396fd83b0">FSMC_PATT2_ATTSET2_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gad1b81efbb998d5e86685075396fd83b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e89896b03049ad636484b44c7ecd670"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e89896b03049ad636484b44c7ecd670">FSMC_PATT2_ATTSET2_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga3e89896b03049ad636484b44c7ecd670"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac751391f5acb1f3229ca65a3424d316d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac751391f5acb1f3229ca65a3424d316d">FSMC_PATT2_ATTSET2_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gac751391f5acb1f3229ca65a3424d316d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb0f3115642332e5aef5cfa1b6b719d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb0f3115642332e5aef5cfa1b6b719d8">FSMC_PATT2_ATTSET2_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gabb0f3115642332e5aef5cfa1b6b719d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6fda97184969b04e909ac97d31da48e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fda97184969b04e909ac97d31da48e6">FSMC_PATT2_ATTWAIT2</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga6fda97184969b04e909ac97d31da48e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf43a2874230fbe9b87f9495a736b9363"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf43a2874230fbe9b87f9495a736b9363">FSMC_PATT2_ATTWAIT2_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaf43a2874230fbe9b87f9495a736b9363"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad30fbb45343ced8deb9bbc062dba46b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad30fbb45343ced8deb9bbc062dba46b">FSMC_PATT2_ATTWAIT2_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaad30fbb45343ced8deb9bbc062dba46b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae78c7794f66cd2063464ab2e6ef2bd07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae78c7794f66cd2063464ab2e6ef2bd07">FSMC_PATT2_ATTWAIT2_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gae78c7794f66cd2063464ab2e6ef2bd07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82c2de9009c75560a342122937b25853"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga82c2de9009c75560a342122937b25853">FSMC_PATT2_ATTWAIT2_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga82c2de9009c75560a342122937b25853"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae80b6a2fc197435f6b50b4ba035fb5fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae80b6a2fc197435f6b50b4ba035fb5fe">FSMC_PATT2_ATTWAIT2_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gae80b6a2fc197435f6b50b4ba035fb5fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac924773c5fcbee73186600247618d10b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac924773c5fcbee73186600247618d10b">FSMC_PATT2_ATTWAIT2_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gac924773c5fcbee73186600247618d10b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70b22c0b9a32e473f0eb56952ba58d95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga70b22c0b9a32e473f0eb56952ba58d95">FSMC_PATT2_ATTWAIT2_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga70b22c0b9a32e473f0eb56952ba58d95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2ade8feb15ddcef159ccf3ff55fb0c24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ade8feb15ddcef159ccf3ff55fb0c24">FSMC_PATT2_ATTWAIT2_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga2ade8feb15ddcef159ccf3ff55fb0c24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad007c3c6fbef432a5e6bb08bd6e0b1ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad007c3c6fbef432a5e6bb08bd6e0b1ce">FSMC_PATT2_ATTHOLD2</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="memitem:ga5b5e19eb38592e84b9c0f3f57df51892"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b5e19eb38592e84b9c0f3f57df51892">FSMC_PATT2_ATTHOLD2_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="memitem:ga13dface112bf1300689a4f00ba31abac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13dface112bf1300689a4f00ba31abac">FSMC_PATT2_ATTHOLD2_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="memitem:gaea0e1b34ac27f20c85db0f96eaeff994"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea0e1b34ac27f20c85db0f96eaeff994">FSMC_PATT2_ATTHOLD2_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="memitem:ga1582860673c5e72f9441095d5af7b8ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1582860673c5e72f9441095d5af7b8ad">FSMC_PATT2_ATTHOLD2_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga1582860673c5e72f9441095d5af7b8ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacdd679f3b80617291639cafcdd8f77d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacdd679f3b80617291639cafcdd8f77d1">FSMC_PATT2_ATTHOLD2_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gacdd679f3b80617291639cafcdd8f77d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34e89cd935ec26279bc9876d9dd07b07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34e89cd935ec26279bc9876d9dd07b07">FSMC_PATT2_ATTHOLD2_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga34e89cd935ec26279bc9876d9dd07b07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12c42d6d5746ef8d763d36b04f6e4644"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12c42d6d5746ef8d763d36b04f6e4644">FSMC_PATT2_ATTHOLD2_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga12c42d6d5746ef8d763d36b04f6e4644"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93558ba1372a3709316b4734160b3874"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93558ba1372a3709316b4734160b3874">FSMC_PATT2_ATTHOLD2_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga93558ba1372a3709316b4734160b3874"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2726cd505612675158551fd9eed763f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2726cd505612675158551fd9eed763f">FSMC_PATT2_ATTHIZ2</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:gae2726cd505612675158551fd9eed763f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae1ff9b8faa8372116ca931826d18a9c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1ff9b8faa8372116ca931826d18a9c7">FSMC_PATT2_ATTHIZ2_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gae1ff9b8faa8372116ca931826d18a9c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac4081b55783073164985488c9d4d6b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac4081b55783073164985488c9d4d6b8">FSMC_PATT2_ATTHIZ2_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaac4081b55783073164985488c9d4d6b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa3cc10b4217452bae11c69ed9f6f1844"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa3cc10b4217452bae11c69ed9f6f1844">FSMC_PATT2_ATTHIZ2_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gaa3cc10b4217452bae11c69ed9f6f1844"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93e2929a1bcde578f374bbebaa9482d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93e2929a1bcde578f374bbebaa9482d1">FSMC_PATT2_ATTHIZ2_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga93e2929a1bcde578f374bbebaa9482d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac536419b5ef258fa3f9140387e2f134f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac536419b5ef258fa3f9140387e2f134f">FSMC_PATT2_ATTHIZ2_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:gac536419b5ef258fa3f9140387e2f134f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5deab3153671ff06832dd651372f9ca7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5deab3153671ff06832dd651372f9ca7">FSMC_PATT2_ATTHIZ2_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga5deab3153671ff06832dd651372f9ca7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga047723a357976aca5bdf6575327986d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga047723a357976aca5bdf6575327986d2">FSMC_PATT2_ATTHIZ2_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga047723a357976aca5bdf6575327986d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga859a5af02e12a11e7548085e9e186547"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga859a5af02e12a11e7548085e9e186547">FSMC_PATT2_ATTHIZ2_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga859a5af02e12a11e7548085e9e186547"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0487c57e948411f16c3a35927e60dd5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0487c57e948411f16c3a35927e60dd5">FSMC_PATT3_ATTSET3</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gae0487c57e948411f16c3a35927e60dd5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e68a5b1bb5996422eac084d586359d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e68a5b1bb5996422eac084d586359d4">FSMC_PATT3_ATTSET3_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga0e68a5b1bb5996422eac084d586359d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d8bd09ad36ab8cae67f87cb930ea428"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d8bd09ad36ab8cae67f87cb930ea428">FSMC_PATT3_ATTSET3_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga2d8bd09ad36ab8cae67f87cb930ea428"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga29b9389601899ce2731c612ad05d9a96"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga29b9389601899ce2731c612ad05d9a96">FSMC_PATT3_ATTSET3_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga29b9389601899ce2731c612ad05d9a96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga97893656a7b65ec5420382de0b264a11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97893656a7b65ec5420382de0b264a11">FSMC_PATT3_ATTSET3_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga97893656a7b65ec5420382de0b264a11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a6993a1cc304b9300bdc365c2827d43"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a6993a1cc304b9300bdc365c2827d43">FSMC_PATT3_ATTSET3_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga9a6993a1cc304b9300bdc365c2827d43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8cf65f61ce823183c3866607cab6bd09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8cf65f61ce823183c3866607cab6bd09">FSMC_PATT3_ATTSET3_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga8cf65f61ce823183c3866607cab6bd09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2d5a3dd16094a6279766692694aa16b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2d5a3dd16094a6279766692694aa16b">FSMC_PATT3_ATTSET3_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gab2d5a3dd16094a6279766692694aa16b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7668853b7956cdb13fd73ed10faf4526"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7668853b7956cdb13fd73ed10faf4526">FSMC_PATT3_ATTSET3_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga7668853b7956cdb13fd73ed10faf4526"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8aaf4c77a663cab07ac6c365a271599"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8aaf4c77a663cab07ac6c365a271599">FSMC_PATT3_ATTWAIT3</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gad8aaf4c77a663cab07ac6c365a271599"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac5c5500a07e7885de5c372c55f147836"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac5c5500a07e7885de5c372c55f147836">FSMC_PATT3_ATTWAIT3_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gac5c5500a07e7885de5c372c55f147836"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddddbd0a403b2aeefcfdb28a7da56bf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaddddbd0a403b2aeefcfdb28a7da56bf0">FSMC_PATT3_ATTWAIT3_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaddddbd0a403b2aeefcfdb28a7da56bf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac34cbe7e282e1074e6c4b9645e48db2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac34cbe7e282e1074e6c4b9645e48db2f">FSMC_PATT3_ATTWAIT3_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gac34cbe7e282e1074e6c4b9645e48db2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga771f2a5acde98a9760eb8a1338f416a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga771f2a5acde98a9760eb8a1338f416a3">FSMC_PATT3_ATTWAIT3_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga771f2a5acde98a9760eb8a1338f416a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1bcc944836a379b2b878d5129ff94ddb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1bcc944836a379b2b878d5129ff94ddb">FSMC_PATT3_ATTWAIT3_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga1bcc944836a379b2b878d5129ff94ddb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf722482193ca6a1bf90f17af567e019"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf722482193ca6a1bf90f17af567e019">FSMC_PATT3_ATTWAIT3_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gacf722482193ca6a1bf90f17af567e019"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac2cc3ce135f309f7574f0c3d1a0ffe88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac2cc3ce135f309f7574f0c3d1a0ffe88">FSMC_PATT3_ATTWAIT3_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gac2cc3ce135f309f7574f0c3d1a0ffe88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa66342cc1db5dcad99153b5a2f22140e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa66342cc1db5dcad99153b5a2f22140e">FSMC_PATT3_ATTWAIT3_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:gaa66342cc1db5dcad99153b5a2f22140e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3a2e634d0f5e3c9716c0910e1efda60"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3a2e634d0f5e3c9716c0910e1efda60">FSMC_PATT3_ATTHOLD3</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gab3a2e634d0f5e3c9716c0910e1efda60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad34a9f1b84d670c4132c56fa30ca26f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad34a9f1b84d670c4132c56fa30ca26f0">FSMC_PATT3_ATTHOLD3_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gad34a9f1b84d670c4132c56fa30ca26f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b2ed392d654694fc330c6721bed5728"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b2ed392d654694fc330c6721bed5728">FSMC_PATT3_ATTHOLD3_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga5b2ed392d654694fc330c6721bed5728"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga679d3ea50788981dac810ec62bc372f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga679d3ea50788981dac810ec62bc372f0">FSMC_PATT3_ATTHOLD3_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga679d3ea50788981dac810ec62bc372f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75d74cf52f238826e87d3a3c27b52acc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75d74cf52f238826e87d3a3c27b52acc">FSMC_PATT3_ATTHOLD3_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga75d74cf52f238826e87d3a3c27b52acc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa8d656d40279e1655a6682dcc2762e92"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa8d656d40279e1655a6682dcc2762e92">FSMC_PATT3_ATTHOLD3_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="memitem:gafee75f2fcf37e20e983732f258f85371"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafee75f2fcf37e20e983732f258f85371">FSMC_PATT3_ATTHOLD3_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="memitem:ga777b93e1e3c802ede605644d3ff3bba7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga777b93e1e3c802ede605644d3ff3bba7">FSMC_PATT3_ATTHOLD3_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="memitem:ga39acada8d54a7a14d3838d042397bd74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39acada8d54a7a14d3838d042397bd74">FSMC_PATT3_ATTHOLD3_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="memitem:gaea9d34b131aa7db353eef060ca37788c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea9d34b131aa7db353eef060ca37788c">FSMC_PATT3_ATTHIZ3</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="memitem:ga5bc6736af23f6f033568e0085cd19964"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5bc6736af23f6f033568e0085cd19964">FSMC_PATT3_ATTHIZ3_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="memitem:ga41270d0ae8670f39b886b49e47e8195b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41270d0ae8670f39b886b49e47e8195b">FSMC_PATT3_ATTHIZ3_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="memitem:ga988ec453492aafacf205895c5398caf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga988ec453492aafacf205895c5398caf2">FSMC_PATT3_ATTHIZ3_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="memitem:ga48885375147c060687bbccc6a234ce39"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga48885375147c060687bbccc6a234ce39">FSMC_PATT3_ATTHIZ3_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga48885375147c060687bbccc6a234ce39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ea193881223470d7b6a6ca3e3474a84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ea193881223470d7b6a6ca3e3474a84">FSMC_PATT3_ATTHIZ3_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="memitem:ga7ab1f4cb68cfb8717d2b29e3a84987b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ab1f4cb68cfb8717d2b29e3a84987b1">FSMC_PATT3_ATTHIZ3_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="memitem:ga44fd348b342ec248b821123f3310f475"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44fd348b342ec248b821123f3310f475">FSMC_PATT3_ATTHIZ3_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="memitem:ga0ff1a3acc9bbab229000d48845ea1863"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff1a3acc9bbab229000d48845ea1863">FSMC_PATT3_ATTHIZ3_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="memitem:ga7f4d8fb0d47b4a3fddf55c2532dd3159"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f4d8fb0d47b4a3fddf55c2532dd3159">FSMC_PATT4_ATTSET4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga7f4d8fb0d47b4a3fddf55c2532dd3159"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1dac8bcf03610eb2d43b557f4d81532a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1dac8bcf03610eb2d43b557f4d81532a">FSMC_PATT4_ATTSET4_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga1dac8bcf03610eb2d43b557f4d81532a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac2576c2a95871cbf9babd0778372571"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaac2576c2a95871cbf9babd0778372571">FSMC_PATT4_ATTSET4_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="memitem:ga88e760bbe9714ac07f381de3af0abc36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88e760bbe9714ac07f381de3af0abc36">FSMC_PATT4_ATTSET4_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga88e760bbe9714ac07f381de3af0abc36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b472fd4848733a921998f0305b5bc02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b472fd4848733a921998f0305b5bc02">FSMC_PATT4_ATTSET4_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga4b472fd4848733a921998f0305b5bc02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7d0c69190a0d78fedc875c3dc6b9037"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7d0c69190a0d78fedc875c3dc6b9037">FSMC_PATT4_ATTSET4_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gae7d0c69190a0d78fedc875c3dc6b9037"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga168c6f16be9721a5ea0e31230bd1939b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga168c6f16be9721a5ea0e31230bd1939b">FSMC_PATT4_ATTSET4_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga168c6f16be9721a5ea0e31230bd1939b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga72fe744c036b2acc4fff8733ac48b0ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga72fe744c036b2acc4fff8733ac48b0ae">FSMC_PATT4_ATTSET4_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga72fe744c036b2acc4fff8733ac48b0ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4529b17de7cb4eeeff25496620978adc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4529b17de7cb4eeeff25496620978adc">FSMC_PATT4_ATTSET4_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga4529b17de7cb4eeeff25496620978adc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga01edeaedc31867997a188fa89cab2ec0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga01edeaedc31867997a188fa89cab2ec0">FSMC_PATT4_ATTWAIT4</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga01edeaedc31867997a188fa89cab2ec0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5da7db34cd23f3126f224a0b845a66a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5da7db34cd23f3126f224a0b845a66a8">FSMC_PATT4_ATTWAIT4_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga5da7db34cd23f3126f224a0b845a66a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga14644aa2ed55afe2094015d74843a994"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14644aa2ed55afe2094015d74843a994">FSMC_PATT4_ATTWAIT4_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga14644aa2ed55afe2094015d74843a994"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1023d5ae8fab70e7fdfbaff4ed46657"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1023d5ae8fab70e7fdfbaff4ed46657">FSMC_PATT4_ATTWAIT4_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaf1023d5ae8fab70e7fdfbaff4ed46657"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga906c9684ffcd8f0f9222cbfd0e21885a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga906c9684ffcd8f0f9222cbfd0e21885a">FSMC_PATT4_ATTWAIT4_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga906c9684ffcd8f0f9222cbfd0e21885a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8d341a7448f645a2f849e591515f020"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8d341a7448f645a2f849e591515f020">FSMC_PATT4_ATTWAIT4_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gae8d341a7448f645a2f849e591515f020"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf278272c5fdaa8fa7c84e1c095690632"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf278272c5fdaa8fa7c84e1c095690632">FSMC_PATT4_ATTWAIT4_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gaf278272c5fdaa8fa7c84e1c095690632"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3126347e126717a761af0b6e44b9d72d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3126347e126717a761af0b6e44b9d72d">FSMC_PATT4_ATTWAIT4_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga3126347e126717a761af0b6e44b9d72d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34afb78710ca450ac7065f0bc263075c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34afb78710ca450ac7065f0bc263075c">FSMC_PATT4_ATTWAIT4_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga34afb78710ca450ac7065f0bc263075c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bf06c395d55c775b4fbe202bac517a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bf06c395d55c775b4fbe202bac517a6">FSMC_PATT4_ATTHOLD4</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga0bf06c395d55c775b4fbe202bac517a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5c97b102bd1f2b61dcfb793c0d61d66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5c97b102bd1f2b61dcfb793c0d61d66">FSMC_PATT4_ATTHOLD4_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gad5c97b102bd1f2b61dcfb793c0d61d66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga738c8d87ebcdff68725a54ff7f39675d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga738c8d87ebcdff68725a54ff7f39675d">FSMC_PATT4_ATTHOLD4_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga738c8d87ebcdff68725a54ff7f39675d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d9610198e4710ca394e3aeb32aa229f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d9610198e4710ca394e3aeb32aa229f">FSMC_PATT4_ATTHOLD4_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga6d9610198e4710ca394e3aeb32aa229f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd14059e9f658f37b3a1f18786395717"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd14059e9f658f37b3a1f18786395717">FSMC_PATT4_ATTHOLD4_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gadd14059e9f658f37b3a1f18786395717"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a39fa40e2d4990097e31b47ad85283a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a39fa40e2d4990097e31b47ad85283a">FSMC_PATT4_ATTHOLD4_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga7a39fa40e2d4990097e31b47ad85283a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga239e412f20305d58416f10a79e253a87"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga239e412f20305d58416f10a79e253a87">FSMC_PATT4_ATTHOLD4_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga239e412f20305d58416f10a79e253a87"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaff1aac62acdf71077ee4a9e8e9e6d2d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaff1aac62acdf71077ee4a9e8e9e6d2d6">FSMC_PATT4_ATTHOLD4_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gaff1aac62acdf71077ee4a9e8e9e6d2d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga836fd2ad42b0c9f6d0eb651589d04123"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga836fd2ad42b0c9f6d0eb651589d04123">FSMC_PATT4_ATTHOLD4_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga836fd2ad42b0c9f6d0eb651589d04123"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35948e4e9e5ce9d674e9e70ca2aeafe3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga35948e4e9e5ce9d674e9e70ca2aeafe3">FSMC_PATT4_ATTHIZ4</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga35948e4e9e5ce9d674e9e70ca2aeafe3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b746d7b655f6379af4dd4d5ba842492"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b746d7b655f6379af4dd4d5ba842492">FSMC_PATT4_ATTHIZ4_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:ga5b746d7b655f6379af4dd4d5ba842492"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac2dd87929111fc0c888dd7c311f8eba3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac2dd87929111fc0c888dd7c311f8eba3">FSMC_PATT4_ATTHIZ4_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="memitem:ga353c0709e22a06998f05b908a597f525"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga353c0709e22a06998f05b908a597f525">FSMC_PATT4_ATTHIZ4_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="memitem:gaa777a5d42ac1e36044d7b18ffdd61a21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa777a5d42ac1e36044d7b18ffdd61a21">FSMC_PATT4_ATTHIZ4_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:gaa777a5d42ac1e36044d7b18ffdd61a21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65c1778d08bfe2a40961f6acf023b9d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65c1778d08bfe2a40961f6acf023b9d4">FSMC_PATT4_ATTHIZ4_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga65c1778d08bfe2a40961f6acf023b9d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaadb7001986c9a4c28052b46657ad7a7e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaadb7001986c9a4c28052b46657ad7a7e">FSMC_PATT4_ATTHIZ4_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gaadb7001986c9a4c28052b46657ad7a7e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa11a8d896354bd1c6645ac096db8e065"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa11a8d896354bd1c6645ac096db8e065">FSMC_PATT4_ATTHIZ4_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:gaa11a8d896354bd1c6645ac096db8e065"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a054f48705ec3fef0686c576f414f29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a054f48705ec3fef0686c576f414f29">FSMC_PATT4_ATTHIZ4_7</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga1a054f48705ec3fef0686c576f414f29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf14b77f09f496a1325b5384eef54dd4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf14b77f09f496a1325b5384eef54dd4a">FSMC_PIO4_IOSET4</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gaf14b77f09f496a1325b5384eef54dd4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga29c07a816f3065ae0c9287b6e3e0e967"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga29c07a816f3065ae0c9287b6e3e0e967">FSMC_PIO4_IOSET4_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga29c07a816f3065ae0c9287b6e3e0e967"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac31898a52e172935f354819c50d3ef8d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac31898a52e172935f354819c50d3ef8d">FSMC_PIO4_IOSET4_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gac31898a52e172935f354819c50d3ef8d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf35797347825725faef495c676269927"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf35797347825725faef495c676269927">FSMC_PIO4_IOSET4_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gaf35797347825725faef495c676269927"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae45109e3dcc3c3a15efd13eddffdd8c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae45109e3dcc3c3a15efd13eddffdd8c9">FSMC_PIO4_IOSET4_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gae45109e3dcc3c3a15efd13eddffdd8c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga349e3a58f832fbc9de16955521355c29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga349e3a58f832fbc9de16955521355c29">FSMC_PIO4_IOSET4_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga349e3a58f832fbc9de16955521355c29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3304545838a6e20742b0203e0cb023a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3304545838a6e20742b0203e0cb023a">FSMC_PIO4_IOSET4_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gaf3304545838a6e20742b0203e0cb023a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga800ab779078734ca86eedb6c9e77bc57"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga800ab779078734ca86eedb6c9e77bc57">FSMC_PIO4_IOSET4_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga800ab779078734ca86eedb6c9e77bc57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7e29b066726c486c6503d417d18904b1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e29b066726c486c6503d417d18904b1">FSMC_PIO4_IOSET4_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga7e29b066726c486c6503d417d18904b1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga035a0645caab3851714123302dd0af1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga035a0645caab3851714123302dd0af1c">FSMC_PIO4_IOWAIT4</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga035a0645caab3851714123302dd0af1c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb868a5bf3d33997c782f296440cabf7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb868a5bf3d33997c782f296440cabf7">FSMC_PIO4_IOWAIT4_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gafb868a5bf3d33997c782f296440cabf7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa48c96fedf31c6ab444828d60e471da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa48c96fedf31c6ab444828d60e471da">FSMC_PIO4_IOWAIT4_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gaaa48c96fedf31c6ab444828d60e471da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga342e42235a123ea11544b1a230b07a75"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga342e42235a123ea11544b1a230b07a75">FSMC_PIO4_IOWAIT4_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga342e42235a123ea11544b1a230b07a75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c012d7c41f51516580766d6ac36d82f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c012d7c41f51516580766d6ac36d82f">FSMC_PIO4_IOWAIT4_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga9c012d7c41f51516580766d6ac36d82f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5331b528505a31a2b39deca7a5ddba02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5331b528505a31a2b39deca7a5ddba02">FSMC_PIO4_IOWAIT4_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga5331b528505a31a2b39deca7a5ddba02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabbfbc377efde5170ac484795a0a4215"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaabbfbc377efde5170ac484795a0a4215">FSMC_PIO4_IOWAIT4_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gaabbfbc377efde5170ac484795a0a4215"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0be64ff24a6ccb7eef471ad2ad0e283b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0be64ff24a6ccb7eef471ad2ad0e283b">FSMC_PIO4_IOWAIT4_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga0be64ff24a6ccb7eef471ad2ad0e283b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e3fc1b8cfa57116c0521cafd7e733cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e3fc1b8cfa57116c0521cafd7e733cc">FSMC_PIO4_IOWAIT4_7</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga3e3fc1b8cfa57116c0521cafd7e733cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab55064df0d9fab8a072da6baa7b85878"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab55064df0d9fab8a072da6baa7b85878">FSMC_PIO4_IOHOLD4</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:gab55064df0d9fab8a072da6baa7b85878"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc1a288b385fcf83bfa95da479d387a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadc1a288b385fcf83bfa95da479d387a4">FSMC_PIO4_IOHOLD4_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gadc1a288b385fcf83bfa95da479d387a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga402d7221ee27ce71d1b8bb18539d8307"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga402d7221ee27ce71d1b8bb18539d8307">FSMC_PIO4_IOHOLD4_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga402d7221ee27ce71d1b8bb18539d8307"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga274c5b835ec95c97c4f1c6ebbf72a096"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga274c5b835ec95c97c4f1c6ebbf72a096">FSMC_PIO4_IOHOLD4_2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga274c5b835ec95c97c4f1c6ebbf72a096"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga519b9b4ae5b136769278eb98eb10c3a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga519b9b4ae5b136769278eb98eb10c3a6">FSMC_PIO4_IOHOLD4_3</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga519b9b4ae5b136769278eb98eb10c3a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2d013be2823d9ea9b81f8f76331c11d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2d013be2823d9ea9b81f8f76331c11d">FSMC_PIO4_IOHOLD4_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gab2d013be2823d9ea9b81f8f76331c11d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a14c965f1ff993e0976aaefe638e2f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a14c965f1ff993e0976aaefe638e2f6">FSMC_PIO4_IOHOLD4_5</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga5a14c965f1ff993e0976aaefe638e2f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49411f21445032ad8eaca19e89d204bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49411f21445032ad8eaca19e89d204bc">FSMC_PIO4_IOHOLD4_6</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga49411f21445032ad8eaca19e89d204bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga323dcc3be986d57d14b794cca0038953"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga323dcc3be986d57d14b794cca0038953">FSMC_PIO4_IOHOLD4_7</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga323dcc3be986d57d14b794cca0038953"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4cce93379430df64fd697ad772bc477d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4cce93379430df64fd697ad772bc477d">FSMC_PIO4_IOHIZ4</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:ga4cce93379430df64fd697ad772bc477d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf3b5c59e3eb4e259ddb722b1e536e5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf3b5c59e3eb4e259ddb722b1e536e5c">FSMC_PIO4_IOHIZ4_0</a>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gaaf3b5c59e3eb4e259ddb722b1e536e5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e8c66264d4ec7b69de613cb528cfee2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e8c66264d4ec7b69de613cb528cfee2">FSMC_PIO4_IOHIZ4_1</a>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:ga3e8c66264d4ec7b69de613cb528cfee2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab943b8acd274a8892e691ffab36a6a21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab943b8acd274a8892e691ffab36a6a21">FSMC_PIO4_IOHIZ4_2</a>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:gab943b8acd274a8892e691ffab36a6a21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4184c40fd57a850605ac12c73553b6ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4184c40fd57a850605ac12c73553b6ba">FSMC_PIO4_IOHIZ4_3</a>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga4184c40fd57a850605ac12c73553b6ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9f966bdf26f7fa0f52076438219df7ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9f966bdf26f7fa0f52076438219df7ee">FSMC_PIO4_IOHIZ4_4</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga9f966bdf26f7fa0f52076438219df7ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ba68883e73a331543a2990a76d1e91a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ba68883e73a331543a2990a76d1e91a">FSMC_PIO4_IOHIZ4_5</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga9ba68883e73a331543a2990a76d1e91a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b2c084a1dfbf7fb7bd922faa48bad8a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b2c084a1dfbf7fb7bd922faa48bad8a">FSMC_PIO4_IOHIZ4_6</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga8b2c084a1dfbf7fb7bd922faa48bad8a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc8aef29e6eaecd3ff2c13bae143b8b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc8aef29e6eaecd3ff2c13bae143b8b4">FSMC_PIO4_IOHIZ4_7</a>   ((uint32_t)0x80000000)</td></tr>
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||
<tr class="separator:gabc8aef29e6eaecd3ff2c13bae143b8b4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga43da355ad2eb7d974488a02921b1b2ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43da355ad2eb7d974488a02921b1b2ba">FSMC_ECCR2_ECC2</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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||
<tr class="separator:ga43da355ad2eb7d974488a02921b1b2ba"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga798b288a17d84edc99ff1f5f81cf70be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga798b288a17d84edc99ff1f5f81cf70be">FSMC_ECCR3_ECC3</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
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||
<tr class="memitem:ga7b64d47643f8d3c08c2be0722ff23b93"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b64d47643f8d3c08c2be0722ff23b93"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER0</b>   ((uint32_t)0x00000003)</td></tr>
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||
<tr class="separator:ga7b64d47643f8d3c08c2be0722ff23b93"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9547fc54057db093f9ee4b846fcc4723"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9547fc54057db093f9ee4b846fcc4723"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER0_0</b>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga9547fc54057db093f9ee4b846fcc4723"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9e77a3bc750fe2ea8e06da301c65d6ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e77a3bc750fe2ea8e06da301c65d6ef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER0_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9e77a3bc750fe2ea8e06da301c65d6ef"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2e0597b084c911728ee92b5fc4a2ae5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e0597b084c911728ee92b5fc4a2ae5a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER1</b>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga2e0597b084c911728ee92b5fc4a2ae5a"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5d85123ad7c77e052b542f2df47a1371"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d85123ad7c77e052b542f2df47a1371"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER1_0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5d85123ad7c77e052b542f2df47a1371"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad9f16759689b9ac61d9c68842ac49746"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9f16759689b9ac61d9c68842ac49746"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER1_1</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad9f16759689b9ac61d9c68842ac49746"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga06865341707bb4dd9671ce464d99ab2c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga06865341707bb4dd9671ce464d99ab2c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER2</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga06865341707bb4dd9671ce464d99ab2c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga06e9f9713b7a822784cd2c0fa79dcff0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga06e9f9713b7a822784cd2c0fa79dcff0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER2_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga06e9f9713b7a822784cd2c0fa79dcff0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga97f7959265384b2621288c8340990665"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97f7959265384b2621288c8340990665"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER2_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga97f7959265384b2621288c8340990665"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae06c9d07a091fb64ab53d0c899a9dda5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae06c9d07a091fb64ab53d0c899a9dda5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER3</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:gae06c9d07a091fb64ab53d0c899a9dda5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4aeeac804c07e25aeff31bebf3a639f6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4aeeac804c07e25aeff31bebf3a639f6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER3_0</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga4aeeac804c07e25aeff31bebf3a639f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafc09e4958f306ddcb6107942504b45e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafc09e4958f306ddcb6107942504b45e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER3_1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gafc09e4958f306ddcb6107942504b45e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga52cf9361d90c863c107cdeb859bd8b41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga52cf9361d90c863c107cdeb859bd8b41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER4</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:ga52cf9361d90c863c107cdeb859bd8b41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67276f1aa615d1af388fef7232483795"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67276f1aa615d1af388fef7232483795"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER4_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga67276f1aa615d1af388fef7232483795"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5203150980865199911d58af22f49567"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5203150980865199911d58af22f49567"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER4_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga5203150980865199911d58af22f49567"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae94ab55c126ff24572bbff0da5a3f360"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae94ab55c126ff24572bbff0da5a3f360"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER5</b>   ((uint32_t)0x00000C00)</td></tr>
|
||
<tr class="separator:gae94ab55c126ff24572bbff0da5a3f360"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga62665be9bddb711eedf99c85e37bb5ad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62665be9bddb711eedf99c85e37bb5ad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER5_0</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga62665be9bddb711eedf99c85e37bb5ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5096355e22b25bd4e6324399d5764630"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5096355e22b25bd4e6324399d5764630"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER5_1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga5096355e22b25bd4e6324399d5764630"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga97a85a1bb88cf8f730e0de38cb664282"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97a85a1bb88cf8f730e0de38cb664282"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER6</b>   ((uint32_t)0x00003000)</td></tr>
|
||
<tr class="separator:ga97a85a1bb88cf8f730e0de38cb664282"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf45f41af21a000ab66da5b99b998deb3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf45f41af21a000ab66da5b99b998deb3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER6_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaf45f41af21a000ab66da5b99b998deb3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41dfd1f39fe849fe3707ebf2ac0d8371"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41dfd1f39fe849fe3707ebf2ac0d8371"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER6_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga41dfd1f39fe849fe3707ebf2ac0d8371"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga22dc08ecc39bceba020d8e5949b658e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga22dc08ecc39bceba020d8e5949b658e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER7</b>   ((uint32_t)0x0000C000)</td></tr>
|
||
<tr class="separator:ga22dc08ecc39bceba020d8e5949b658e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga585ab6cb29e3763ab8c1e997c55f2b43"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga585ab6cb29e3763ab8c1e997c55f2b43"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER7_0</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga585ab6cb29e3763ab8c1e997c55f2b43"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b5cca014fc55f64cdbbb42ea0515e05"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b5cca014fc55f64cdbbb42ea0515e05"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER7_1</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga2b5cca014fc55f64cdbbb42ea0515e05"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac41f2174ef4444c685ea92da1258c678"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac41f2174ef4444c685ea92da1258c678"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER8</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:gac41f2174ef4444c685ea92da1258c678"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2cdb8e55aa223af568ae12d316a22f8d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2cdb8e55aa223af568ae12d316a22f8d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER8_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga2cdb8e55aa223af568ae12d316a22f8d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0729411ccd74a91cdd0f23adada25782"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0729411ccd74a91cdd0f23adada25782"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER8_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga0729411ccd74a91cdd0f23adada25782"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5d4ed9018bf72565bab1d08c476fed20"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d4ed9018bf72565bab1d08c476fed20"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER9</b>   ((uint32_t)0x000C0000)</td></tr>
|
||
<tr class="separator:ga5d4ed9018bf72565bab1d08c476fed20"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaea7c7ec787b1ee1ae7e0b4da216eb418"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaea7c7ec787b1ee1ae7e0b4da216eb418"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER9_0</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gaea7c7ec787b1ee1ae7e0b4da216eb418"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa5cd33689071b7af70ece64a371645df"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa5cd33689071b7af70ece64a371645df"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER9_1</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gaa5cd33689071b7af70ece64a371645df"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaacbdb241d7bebde85d7d0b42c2f35563"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaacbdb241d7bebde85d7d0b42c2f35563"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER10</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:gaacbdb241d7bebde85d7d0b42c2f35563"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f4d2b18e57e7b2f600e4f5d9b17bd95"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f4d2b18e57e7b2f600e4f5d9b17bd95"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER10_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga6f4d2b18e57e7b2f600e4f5d9b17bd95"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9dcae08e0f7afc002658a4ef4a764dc4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9dcae08e0f7afc002658a4ef4a764dc4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER10_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga9dcae08e0f7afc002658a4ef4a764dc4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf18bc295f7195fc050221287c4564474"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf18bc295f7195fc050221287c4564474"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER11</b>   ((uint32_t)0x00C00000)</td></tr>
|
||
<tr class="separator:gaf18bc295f7195fc050221287c4564474"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf4082cd576f50cd2687e45557b70d458"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf4082cd576f50cd2687e45557b70d458"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER11_0</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gaf4082cd576f50cd2687e45557b70d458"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1b2f611ae75f3441bad03866550f6263"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1b2f611ae75f3441bad03866550f6263"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER11_1</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga1b2f611ae75f3441bad03866550f6263"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga63101c5c410b55b668ec190422dc3597"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga63101c5c410b55b668ec190422dc3597"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER12</b>   ((uint32_t)0x03000000)</td></tr>
|
||
<tr class="separator:ga63101c5c410b55b668ec190422dc3597"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa89cd8ed328ed0116cbf51810fcd8788"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa89cd8ed328ed0116cbf51810fcd8788"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER12_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gaa89cd8ed328ed0116cbf51810fcd8788"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74f91bdd676e477e4c19d30d3ea5c4c8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga74f91bdd676e477e4c19d30d3ea5c4c8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER12_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga74f91bdd676e477e4c19d30d3ea5c4c8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga353af246bef5dca5aadfe6fe3fd695c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga353af246bef5dca5aadfe6fe3fd695c3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER13</b>   ((uint32_t)0x0C000000)</td></tr>
|
||
<tr class="separator:ga353af246bef5dca5aadfe6fe3fd695c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabc01e2e6cf45e8ec27d3a66ff36c2cfa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabc01e2e6cf45e8ec27d3a66ff36c2cfa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER13_0</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gabc01e2e6cf45e8ec27d3a66ff36c2cfa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga71a30088f5475ae8774404ae7d41872e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga71a30088f5475ae8774404ae7d41872e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER13_1</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga71a30088f5475ae8774404ae7d41872e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga18a722f9682045c1d2460fedf32b02b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga18a722f9682045c1d2460fedf32b02b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER14</b>   ((uint32_t)0x30000000)</td></tr>
|
||
<tr class="separator:ga18a722f9682045c1d2460fedf32b02b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad295063c22bd981239bc1b26f2e7f9c0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad295063c22bd981239bc1b26f2e7f9c0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER14_0</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:gad295063c22bd981239bc1b26f2e7f9c0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ff3a914796db9625d86996b6f6f5288"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ff3a914796db9625d86996b6f6f5288"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER14_1</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga0ff3a914796db9625d86996b6f6f5288"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaefc40e6fae78c1c5c857346793f9d4c8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaefc40e6fae78c1c5c857346793f9d4c8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER15</b>   ((uint32_t)0xC0000000)</td></tr>
|
||
<tr class="separator:gaefc40e6fae78c1c5c857346793f9d4c8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6c4b7f270eb99d851b84b9917fe49564"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c4b7f270eb99d851b84b9917fe49564"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER15_0</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga6c4b7f270eb99d851b84b9917fe49564"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9297c041f5f74aec73e6f4dd89ad819c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9297c041f5f74aec73e6f4dd89ad819c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_MODER_MODER15_1</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga9297c041f5f74aec73e6f4dd89ad819c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2f02eab04f88423789f532370680305"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2f02eab04f88423789f532370680305"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaf2f02eab04f88423789f532370680305"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8a842ad8f83c21f019f2e1e08f104a7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a842ad8f83c21f019f2e1e08f104a7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga8a842ad8f83c21f019f2e1e08f104a7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3d3a246b6320fc51b39123249e1e6817"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3d3a246b6320fc51b39123249e1e6817"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga3d3a246b6320fc51b39123249e1e6817"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaef881bb4fa6b2dd9cecd4ee1385b6361"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaef881bb4fa6b2dd9cecd4ee1385b6361"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaef881bb4fa6b2dd9cecd4ee1385b6361"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8c3cc7a0b2c9b99212879cc8d7455258"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8c3cc7a0b2c9b99212879cc8d7455258"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga8c3cc7a0b2c9b99212879cc8d7455258"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa0dd76857b25ae35a785cee97c8403d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa0dd76857b25ae35a785cee97c8403d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaaa0dd76857b25ae35a785cee97c8403d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1dbea639fd4ffe59a706a11fb1ee104b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1dbea639fd4ffe59a706a11fb1ee104b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga1dbea639fd4ffe59a706a11fb1ee104b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaacead96dc3377342af4aa18adf6453e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaacead96dc3377342af4aa18adf6453e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaaacead96dc3377342af4aa18adf6453e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a1f64fdf2ab84c634c0fa8cb060a65f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a1f64fdf2ab84c634c0fa8cb060a65f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga5a1f64fdf2ab84c634c0fa8cb060a65f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa5c7deea3d764bb3999578030e3158aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa5c7deea3d764bb3999578030e3158aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_9</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaa5c7deea3d764bb3999578030e3158aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadc1ef9cbe4226f9616c64bb641b44b3b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc1ef9cbe4226f9616c64bb641b44b3b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_10</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gadc1ef9cbe4226f9616c64bb641b44b3b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd4fc33a12439fdf4ada19c04227dea7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd4fc33a12439fdf4ada19c04227dea7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_11</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gafd4fc33a12439fdf4ada19c04227dea7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga24e978fcc3d4e87bed919511e1226f0c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga24e978fcc3d4e87bed919511e1226f0c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_12</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga24e978fcc3d4e87bed919511e1226f0c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7c5d7751cfdfaf58782f01692d8c88e8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7c5d7751cfdfaf58782f01692d8c88e8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_13</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga7c5d7751cfdfaf58782f01692d8c88e8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6c26938a0e8c03d90a966fc33f186e50"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c26938a0e8c03d90a966fc33f186e50"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_14</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga6c26938a0e8c03d90a966fc33f186e50"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51f153263d58a45fc2ef0734fc3f73eb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51f153263d58a45fc2ef0734fc3f73eb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_OT_15</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga51f153263d58a45fc2ef0734fc3f73eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86a137cc8e566a0da86e2fd4778938a6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86a137cc8e566a0da86e2fd4778938a6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR0</b>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga86a137cc8e566a0da86e2fd4778938a6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga95ff622f2b5941ce7202fe97a6e8c730"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95ff622f2b5941ce7202fe97a6e8c730"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR0_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga95ff622f2b5941ce7202fe97a6e8c730"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a8e561180cdfcb7440a017d2aa10f59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a8e561180cdfcb7440a017d2aa10f59"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR0_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga5a8e561180cdfcb7440a017d2aa10f59"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9aca2c7cf73dd7a08fee8ae9a675c1d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9aca2c7cf73dd7a08fee8ae9a675c1d5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR1</b>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga9aca2c7cf73dd7a08fee8ae9a675c1d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5dd10c0d3419e2d2fda1af77fbc28156"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5dd10c0d3419e2d2fda1af77fbc28156"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR1_0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5dd10c0d3419e2d2fda1af77fbc28156"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4ebe740312db53a7d49ff7f78436bcb6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4ebe740312db53a7d49ff7f78436bcb6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR1_1</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga4ebe740312db53a7d49ff7f78436bcb6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f3dd6eabaf2dee10a45718bf9214bff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f3dd6eabaf2dee10a45718bf9214bff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR2</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga9f3dd6eabaf2dee10a45718bf9214bff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga285b9f4328a29f624945f8fc57daab0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga285b9f4328a29f624945f8fc57daab0e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR2_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga285b9f4328a29f624945f8fc57daab0e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeb41ac1ecdc620a7888e9714f36611c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb41ac1ecdc620a7888e9714f36611c2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR2_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaeb41ac1ecdc620a7888e9714f36611c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3bd77104c298e2cc79608954ed8a81e6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3bd77104c298e2cc79608954ed8a81e6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR3</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:ga3bd77104c298e2cc79608954ed8a81e6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86ad8f39a6399526c2a06f5e481b7edd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86ad8f39a6399526c2a06f5e481b7edd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR3_0</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga86ad8f39a6399526c2a06f5e481b7edd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4cbbc6c634d9f64d2959bfce25e475e3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4cbbc6c634d9f64d2959bfce25e475e3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR3_1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga4cbbc6c634d9f64d2959bfce25e475e3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae993f7764c1e10e2f5022cba2a081f97"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae993f7764c1e10e2f5022cba2a081f97"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR4</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:gae993f7764c1e10e2f5022cba2a081f97"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e6579b81f162ca8d4b8ee6690b258e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e6579b81f162ca8d4b8ee6690b258e9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR4_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga1e6579b81f162ca8d4b8ee6690b258e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56650b0113cbb5ed50903e684abfdabc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56650b0113cbb5ed50903e684abfdabc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR4_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga56650b0113cbb5ed50903e684abfdabc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa6e84a83dd64be450a33a67c9ba44add"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa6e84a83dd64be450a33a67c9ba44add"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR5</b>   ((uint32_t)0x00000C00)</td></tr>
|
||
<tr class="separator:gaa6e84a83dd64be450a33a67c9ba44add"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ee63c65224da433a0f588bdd579c88d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ee63c65224da433a0f588bdd579c88d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR5_0</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga0ee63c65224da433a0f588bdd579c88d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9feeadb829cbfbcc7f5ff5aa614e35de"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9feeadb829cbfbcc7f5ff5aa614e35de"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR5_1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga9feeadb829cbfbcc7f5ff5aa614e35de"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa153220faa507b53170bd49dcffcfc76"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa153220faa507b53170bd49dcffcfc76"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR6</b>   ((uint32_t)0x00003000)</td></tr>
|
||
<tr class="separator:gaa153220faa507b53170bd49dcffcfc76"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga314fae4f204824abf26545482246eb46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga314fae4f204824abf26545482246eb46"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR6_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga314fae4f204824abf26545482246eb46"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad5502c629c3894c58a5e3e5e4398f92b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad5502c629c3894c58a5e3e5e4398f92b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR6_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gad5502c629c3894c58a5e3e5e4398f92b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga187b9c0a07272ef24ff4e579c2c724a9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga187b9c0a07272ef24ff4e579c2c724a9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR7</b>   ((uint32_t)0x0000C000)</td></tr>
|
||
<tr class="separator:ga187b9c0a07272ef24ff4e579c2c724a9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa351c9cc66134dd2077fe4936e10068e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa351c9cc66134dd2077fe4936e10068e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR7_0</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaa351c9cc66134dd2077fe4936e10068e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5824b9a56d3ab570c90c02e959f8e8a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5824b9a56d3ab570c90c02e959f8e8a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR7_1</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga5824b9a56d3ab570c90c02e959f8e8a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga57fdec64829712f410b7099168d03335"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga57fdec64829712f410b7099168d03335"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR8</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:ga57fdec64829712f410b7099168d03335"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga00e257135823303b40c2dfe2054c72e6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00e257135823303b40c2dfe2054c72e6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR8_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga00e257135823303b40c2dfe2054c72e6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab026b036652fcab5dbec7fcccd8ec117"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab026b036652fcab5dbec7fcccd8ec117"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR8_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gab026b036652fcab5dbec7fcccd8ec117"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2974e9de8b939e683976d3244f946c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2974e9de8b939e683976d3244f946c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR9</b>   ((uint32_t)0x000C0000)</td></tr>
|
||
<tr class="separator:gaf2974e9de8b939e683976d3244f946c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga922dc2241064ba91a32163b52dc979a1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga922dc2241064ba91a32163b52dc979a1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR9_0</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga922dc2241064ba91a32163b52dc979a1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8958bf41efda58bc0c216496c3523a95"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8958bf41efda58bc0c216496c3523a95"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR9_1</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga8958bf41efda58bc0c216496c3523a95"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f368a4fe9f84a2a1f75127cd92de706"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f368a4fe9f84a2a1f75127cd92de706"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR10</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:ga7f368a4fe9f84a2a1f75127cd92de706"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad24e2db3605c0510221a5d6cc18de45d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad24e2db3605c0510221a5d6cc18de45d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR10_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gad24e2db3605c0510221a5d6cc18de45d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac0b5fe166b79464e9419092b50a216e8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac0b5fe166b79464e9419092b50a216e8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR10_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gac0b5fe166b79464e9419092b50a216e8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f6fbff92ca95c7b4b49b773993af08f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f6fbff92ca95c7b4b49b773993af08f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR11</b>   ((uint32_t)0x00C00000)</td></tr>
|
||
<tr class="separator:ga6f6fbff92ca95c7b4b49b773993af08f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7413457e1249fedd60208f6d1fe66fec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7413457e1249fedd60208f6d1fe66fec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR11_0</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga7413457e1249fedd60208f6d1fe66fec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad5a0177db55f86818a42240bf188c0bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad5a0177db55f86818a42240bf188c0bc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR11_1</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gad5a0177db55f86818a42240bf188c0bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9928dcdc592ee959941c97aed702a99"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9928dcdc592ee959941c97aed702a99"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR12</b>   ((uint32_t)0x03000000)</td></tr>
|
||
<tr class="separator:gac9928dcdc592ee959941c97aed702a99"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68d9034e325bf95773f70a9cc94598af"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68d9034e325bf95773f70a9cc94598af"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR12_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga68d9034e325bf95773f70a9cc94598af"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga225f0a354cd3c2391ed922b08dbc0cae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga225f0a354cd3c2391ed922b08dbc0cae"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR12_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga225f0a354cd3c2391ed922b08dbc0cae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga09d3845b5e708a7636cddf01c5a30468"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga09d3845b5e708a7636cddf01c5a30468"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR13</b>   ((uint32_t)0x0C000000)</td></tr>
|
||
<tr class="separator:ga09d3845b5e708a7636cddf01c5a30468"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga93ce0e08aefefa639657d0ca1a169557"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga93ce0e08aefefa639657d0ca1a169557"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR13_0</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga93ce0e08aefefa639657d0ca1a169557"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fee18398176eeceef1a6a0229d81029"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fee18398176eeceef1a6a0229d81029"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR13_1</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga2fee18398176eeceef1a6a0229d81029"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae956b8918d07e914a3f9861de501623f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae956b8918d07e914a3f9861de501623f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR14</b>   ((uint32_t)0x30000000)</td></tr>
|
||
<tr class="separator:gae956b8918d07e914a3f9861de501623f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafcec6386ada8c016b4696b853a6d1ff1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafcec6386ada8c016b4696b853a6d1ff1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR14_0</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:gafcec6386ada8c016b4696b853a6d1ff1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae8fb23e47faf2dd2b69a22e36c4ea56d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae8fb23e47faf2dd2b69a22e36c4ea56d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR14_1</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gae8fb23e47faf2dd2b69a22e36c4ea56d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9b405fe1beed00abecfb3d83b9f94b65"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9b405fe1beed00abecfb3d83b9f94b65"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR15</b>   ((uint32_t)0xC0000000)</td></tr>
|
||
<tr class="separator:ga9b405fe1beed00abecfb3d83b9f94b65"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga782862d03460b05a56d3287c971aabc8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga782862d03460b05a56d3287c971aabc8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR15_0</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga782862d03460b05a56d3287c971aabc8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga929ae0a4ff8f30c45042715a73ab1ad7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga929ae0a4ff8f30c45042715a73ab1ad7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OSPEEDER_OSPEEDR15_1</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga929ae0a4ff8f30c45042715a73ab1ad7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga04d9e85c6ccb1c915142139b2fd40277"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04d9e85c6ccb1c915142139b2fd40277"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR0</b>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga04d9e85c6ccb1c915142139b2fd40277"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90ce7d30e6ae0b2faca4a6861ecc4cc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90ce7d30e6ae0b2faca4a6861ecc4cc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR0_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga90ce7d30e6ae0b2faca4a6861ecc4cc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafce37884b3fefd13f415d3d0e86cba54"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafce37884b3fefd13f415d3d0e86cba54"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR0_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gafce37884b3fefd13f415d3d0e86cba54"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fc992293f3aea2c0bfb5a04524a0f29"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fc992293f3aea2c0bfb5a04524a0f29"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR1</b>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga2fc992293f3aea2c0bfb5a04524a0f29"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf102b1b4f826fdc1febfeaf42a7d8a7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf102b1b4f826fdc1febfeaf42a7d8a7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR1_0</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf102b1b4f826fdc1febfeaf42a7d8a7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33e13010f729b9a9555c1af45ee42bf7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33e13010f729b9a9555c1af45ee42bf7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR1_1</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga33e13010f729b9a9555c1af45ee42bf7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga719f6a7905af1965aeb1d22053819ea4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga719f6a7905af1965aeb1d22053819ea4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR2</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga719f6a7905af1965aeb1d22053819ea4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae53f1f88362bc9d12367842b2c41ac5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae53f1f88362bc9d12367842b2c41ac5f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR2_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gae53f1f88362bc9d12367842b2c41ac5f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad00c76742cc343b8be0aef2b7a552b21"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad00c76742cc343b8be0aef2b7a552b21"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR2_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gad00c76742cc343b8be0aef2b7a552b21"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaae9d69d2db60b442144cc0f7427455d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaae9d69d2db60b442144cc0f7427455d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR3</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:gaaae9d69d2db60b442144cc0f7427455d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1fa0a8d6a6bfc0dd9d6cd2cf26a736a9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1fa0a8d6a6bfc0dd9d6cd2cf26a736a9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR3_0</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga1fa0a8d6a6bfc0dd9d6cd2cf26a736a9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bd409075d0271cfcf5f2a382f55af83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9bd409075d0271cfcf5f2a382f55af83"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR3_1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga9bd409075d0271cfcf5f2a382f55af83"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46b83340a77ca8575458294e095a1b3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46b83340a77ca8575458294e095a1b3e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR4</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:ga46b83340a77ca8575458294e095a1b3e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaaa42ab206386a753e8d57b76761d787"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaaa42ab206386a753e8d57b76761d787"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR4_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaaaa42ab206386a753e8d57b76761d787"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7c19b72c8d4ebff81d9e7a6bb292d9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa7c19b72c8d4ebff81d9e7a6bb292d9e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR4_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaa7c19b72c8d4ebff81d9e7a6bb292d9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga184f05795320c61aac7d5f99875aaaf3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga184f05795320c61aac7d5f99875aaaf3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR5</b>   ((uint32_t)0x00000C00)</td></tr>
|
||
<tr class="separator:ga184f05795320c61aac7d5f99875aaaf3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga407f836cfe9440c0a9346bae50593324"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga407f836cfe9440c0a9346bae50593324"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR5_0</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga407f836cfe9440c0a9346bae50593324"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6e969eee59eb13d03cecb10296f3cba3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6e969eee59eb13d03cecb10296f3cba3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR5_1</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga6e969eee59eb13d03cecb10296f3cba3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga867aff49673e9c790a7c07ffc94c9426"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga867aff49673e9c790a7c07ffc94c9426"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR6</b>   ((uint32_t)0x00003000)</td></tr>
|
||
<tr class="separator:ga867aff49673e9c790a7c07ffc94c9426"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa74c5941b0d588bfd8334c97dd16871e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa74c5941b0d588bfd8334c97dd16871e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR6_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaa74c5941b0d588bfd8334c97dd16871e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga84fe57689233ae16b9b38b3db0f8b31b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84fe57689233ae16b9b38b3db0f8b31b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR6_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga84fe57689233ae16b9b38b3db0f8b31b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa747a73c564fc74b1b7cf597b4df2e2f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa747a73c564fc74b1b7cf597b4df2e2f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR7</b>   ((uint32_t)0x0000C000)</td></tr>
|
||
<tr class="separator:gaa747a73c564fc74b1b7cf597b4df2e2f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7b75312f187bed2ef764a0f244b8cd1b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b75312f187bed2ef764a0f244b8cd1b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR7_0</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga7b75312f187bed2ef764a0f244b8cd1b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga284ea60cb769d74a000af43ddebfdbeb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga284ea60cb769d74a000af43ddebfdbeb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR7_1</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga284ea60cb769d74a000af43ddebfdbeb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1c9d14950ed3985ab81c13047ac0df81"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1c9d14950ed3985ab81c13047ac0df81"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR8</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:ga1c9d14950ed3985ab81c13047ac0df81"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga76b3b97a4a27a8bb2e942c0f95f7af31"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga76b3b97a4a27a8bb2e942c0f95f7af31"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR8_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga76b3b97a4a27a8bb2e942c0f95f7af31"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab9963e91e82f1059ec170793cbf32986"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab9963e91e82f1059ec170793cbf32986"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR8_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gab9963e91e82f1059ec170793cbf32986"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga35b41b7cab641de2538e1e1d21562bc8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga35b41b7cab641de2538e1e1d21562bc8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR9</b>   ((uint32_t)0x000C0000)</td></tr>
|
||
<tr class="separator:ga35b41b7cab641de2538e1e1d21562bc8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga45a4501a9b4ff20e5404a97031e02537"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga45a4501a9b4ff20e5404a97031e02537"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR9_0</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga45a4501a9b4ff20e5404a97031e02537"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaef8b9bad1bc1bb219f6b51bb12c48e67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaef8b9bad1bc1bb219f6b51bb12c48e67"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR9_1</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gaef8b9bad1bc1bb219f6b51bb12c48e67"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac3ea3497ce2e90ac0e709e7a99088b09"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3ea3497ce2e90ac0e709e7a99088b09"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR10</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:gac3ea3497ce2e90ac0e709e7a99088b09"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67fd34cdbc389ee49f5a9bf1271d7dd9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67fd34cdbc389ee49f5a9bf1271d7dd9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR10_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga67fd34cdbc389ee49f5a9bf1271d7dd9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga08ac8e25da27d1b6c97647fd18b3a335"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga08ac8e25da27d1b6c97647fd18b3a335"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR10_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga08ac8e25da27d1b6c97647fd18b3a335"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa93fd3e658c07a9daf9c8016fb4cf46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa93fd3e658c07a9daf9c8016fb4cf46"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR11</b>   ((uint32_t)0x00C00000)</td></tr>
|
||
<tr class="separator:gaaa93fd3e658c07a9daf9c8016fb4cf46"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga18b3ea6ccb52b072cb19d6677b610831"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga18b3ea6ccb52b072cb19d6677b610831"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR11_0</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga18b3ea6ccb52b072cb19d6677b610831"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78a3508e309b9acfa99c3a4301dfb0d8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga78a3508e309b9acfa99c3a4301dfb0d8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR11_1</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga78a3508e309b9acfa99c3a4301dfb0d8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ae4262e6f46de65ce93149a20e0d006"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9ae4262e6f46de65ce93149a20e0d006"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR12</b>   ((uint32_t)0x03000000)</td></tr>
|
||
<tr class="separator:ga9ae4262e6f46de65ce93149a20e0d006"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a0cd6d85037a7ae0d19806a7dc428a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a0cd6d85037a7ae0d19806a7dc428a0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR12_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga9a0cd6d85037a7ae0d19806a7dc428a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga460b8f9029d8703782110e118fd6ccdb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga460b8f9029d8703782110e118fd6ccdb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR12_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga460b8f9029d8703782110e118fd6ccdb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa63ee70f61bc9df40d9b38af69f93a7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa63ee70f61bc9df40d9b38af69f93a7e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR13</b>   ((uint32_t)0x0C000000)</td></tr>
|
||
<tr class="separator:gaa63ee70f61bc9df40d9b38af69f93a7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae29eccc9daf15c787ebfc26af3fb3194"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae29eccc9daf15c787ebfc26af3fb3194"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR13_0</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gae29eccc9daf15c787ebfc26af3fb3194"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga80eddbf0106ccf71413851269315125d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga80eddbf0106ccf71413851269315125d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR13_1</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga80eddbf0106ccf71413851269315125d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga62f533a38f324be7e3e68f5c0f2b3570"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga62f533a38f324be7e3e68f5c0f2b3570"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR14</b>   ((uint32_t)0x30000000)</td></tr>
|
||
<tr class="separator:ga62f533a38f324be7e3e68f5c0f2b3570"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad8521ddc4fa71b57540b61ec7803e77f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad8521ddc4fa71b57540b61ec7803e77f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR14_0</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:gad8521ddc4fa71b57540b61ec7803e77f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5bcc6307af9a6e5f578dfcb4fda49b3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5bcc6307af9a6e5f578dfcb4fda49b3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR14_1</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gac5bcc6307af9a6e5f578dfcb4fda49b3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac266bda493b96f1200bc0f7ae05a7475"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac266bda493b96f1200bc0f7ae05a7475"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR15</b>   ((uint32_t)0xC0000000)</td></tr>
|
||
<tr class="separator:gac266bda493b96f1200bc0f7ae05a7475"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b6f6a720852e3791433148aab8b722c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0b6f6a720852e3791433148aab8b722c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR15_0</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga0b6f6a720852e3791433148aab8b722c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d827196cbbdebdf82554c8c04a1db6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d827196cbbdebdf82554c8c04a1db6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_PUPDR_PUPDR15_1</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga0d827196cbbdebdf82554c8c04a1db6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7691154d734ec08089eb3dc28a369726"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7691154d734ec08089eb3dc28a369726"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga7691154d734ec08089eb3dc28a369726"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad4b3e9ceaa683b7cbc89f2507ef0f110"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4b3e9ceaa683b7cbc89f2507ef0f110"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gad4b3e9ceaa683b7cbc89f2507ef0f110"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf32691b8213a6b9c7ddb164bcc66af7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf32691b8213a6b9c7ddb164bcc66af7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf32691b8213a6b9c7ddb164bcc66af7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga172dc9a76f772c8e386ac0162e0a52fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga172dc9a76f772c8e386ac0162e0a52fa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga172dc9a76f772c8e386ac0162e0a52fa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5aded5247a4fa0834a311679c593fcd7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5aded5247a4fa0834a311679c593fcd7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga5aded5247a4fa0834a311679c593fcd7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e7bf44f34ab51218a24b6b9467e9166"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e7bf44f34ab51218a24b6b9467e9166"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga4e7bf44f34ab51218a24b6b9467e9166"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6aa5a3c8353ab0ce15d6500baf902e8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6aa5a3c8353ab0ce15d6500baf902e8b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga6aa5a3c8353ab0ce15d6500baf902e8b"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaeccc9232d1758570c7dd9d8733d9f5b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeccc9232d1758570c7dd9d8733d9f5b6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaeccc9232d1758570c7dd9d8733d9f5b6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2b5f3c629daa6d4dd3ace095a127f9e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b5f3c629daa6d4dd3ace095a127f9e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga2b5f3c629daa6d4dd3ace095a127f9e1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gacd452f85fa151363ffbf1d263185ef0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd452f85fa151363ffbf1d263185ef0d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_9</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gacd452f85fa151363ffbf1d263185ef0d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaff38e1078878bdd79375295e7ab829b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff38e1078878bdd79375295e7ab829b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_10</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gaff38e1078878bdd79375295e7ab829b5"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga84c3f48e386abf1f6d97e4fb86cbaa7c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84c3f48e386abf1f6d97e4fb86cbaa7c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_11</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga84c3f48e386abf1f6d97e4fb86cbaa7c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaec151d78711f0274d3ab5b239884e645"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec151d78711f0274d3ab5b239884e645"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_12</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaec151d78711f0274d3ab5b239884e645"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6771a14a3c52f397295737e509633b05"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6771a14a3c52f397295737e509633b05"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_13</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga6771a14a3c52f397295737e509633b05"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae0b8882f4473b5d65266792ed631f0bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0b8882f4473b5d65266792ed631f0bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_14</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gae0b8882f4473b5d65266792ed631f0bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5fa9b2bca3451f0be4560333692fb5a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5fa9b2bca3451f0be4560333692fb5a4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_IDR_IDR_15</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga5fa9b2bca3451f0be4560333692fb5a4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5485fbd720ed7ddb22eb3ec11245efbc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5485fbd720ed7ddb22eb3ec11245efbc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_0</b>   GPIO_IDR_IDR_0</td></tr>
|
||
<tr class="separator:ga5485fbd720ed7ddb22eb3ec11245efbc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf13669e5ac3f49834766cd99be03a0d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf13669e5ac3f49834766cd99be03a0d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_1</b>   GPIO_IDR_IDR_1</td></tr>
|
||
<tr class="separator:gaf13669e5ac3f49834766cd99be03a0d7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad3936b414ffd9d8a7a546ecf5bee71c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3936b414ffd9d8a7a546ecf5bee71c3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_2</b>   GPIO_IDR_IDR_2</td></tr>
|
||
<tr class="separator:gad3936b414ffd9d8a7a546ecf5bee71c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaba6136975598a69ca053a924534829f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba6136975598a69ca053a924534829f2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_3</b>   GPIO_IDR_IDR_3</td></tr>
|
||
<tr class="separator:gaba6136975598a69ca053a924534829f2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab4b22966bfccc5de30156b87a60db42a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab4b22966bfccc5de30156b87a60db42a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_4</b>   GPIO_IDR_IDR_4</td></tr>
|
||
<tr class="separator:gab4b22966bfccc5de30156b87a60db42a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga503034ab19d01c3c5535208dbdaa5160"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga503034ab19d01c3c5535208dbdaa5160"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_5</b>   GPIO_IDR_IDR_5</td></tr>
|
||
<tr class="separator:ga503034ab19d01c3c5535208dbdaa5160"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad6b972f5d1e519823d58098533346aa2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6b972f5d1e519823d58098533346aa2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_6</b>   GPIO_IDR_IDR_6</td></tr>
|
||
<tr class="separator:gad6b972f5d1e519823d58098533346aa2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1360495ee0a8ee3f1a6e858744b76693"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1360495ee0a8ee3f1a6e858744b76693"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_7</b>   GPIO_IDR_IDR_7</td></tr>
|
||
<tr class="separator:ga1360495ee0a8ee3f1a6e858744b76693"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0999b31939326c4558ff7383fb1d45c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0999b31939326c4558ff7383fb1d45c3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_8</b>   GPIO_IDR_IDR_8</td></tr>
|
||
<tr class="separator:ga0999b31939326c4558ff7383fb1d45c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86496faba77364680e3abb58b99636b3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86496faba77364680e3abb58b99636b3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_9</b>   GPIO_IDR_IDR_9</td></tr>
|
||
<tr class="separator:ga86496faba77364680e3abb58b99636b3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga38f82a10903250be4e628771b0276761"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38f82a10903250be4e628771b0276761"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_10</b>   GPIO_IDR_IDR_10</td></tr>
|
||
<tr class="separator:ga38f82a10903250be4e628771b0276761"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b3d81079aa482c4670efbe56da9c827"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b3d81079aa482c4670efbe56da9c827"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_11</b>   GPIO_IDR_IDR_11</td></tr>
|
||
<tr class="separator:ga4b3d81079aa482c4670efbe56da9c827"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf53e6338143d8457b3db5c6846349910"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf53e6338143d8457b3db5c6846349910"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_12</b>   GPIO_IDR_IDR_12</td></tr>
|
||
<tr class="separator:gaf53e6338143d8457b3db5c6846349910"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5afdc7a368dcf575096f85deaea5ef01"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5afdc7a368dcf575096f85deaea5ef01"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_13</b>   GPIO_IDR_IDR_13</td></tr>
|
||
<tr class="separator:ga5afdc7a368dcf575096f85deaea5ef01"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2ecbcd9d656d45bb5de5da1506ed1234"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2ecbcd9d656d45bb5de5da1506ed1234"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_14</b>   GPIO_IDR_IDR_14</td></tr>
|
||
<tr class="separator:ga2ecbcd9d656d45bb5de5da1506ed1234"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga63220a77d16ca7e1475c67cfdf1ad8fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga63220a77d16ca7e1475c67cfdf1ad8fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_IDR_15</b>   GPIO_IDR_IDR_15</td></tr>
|
||
<tr class="separator:ga63220a77d16ca7e1475c67cfdf1ad8fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga42386f40895bc86ff49eefe80708bbc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga42386f40895bc86ff49eefe80708bbc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga42386f40895bc86ff49eefe80708bbc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7680b11616859cd0f462703224511fb2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7680b11616859cd0f462703224511fb2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga7680b11616859cd0f462703224511fb2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae93b86fd4c1bfcfafc42bf820c17c019"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae93b86fd4c1bfcfafc42bf820c17c019"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gae93b86fd4c1bfcfafc42bf820c17c019"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3fffcd41fa6347ce4b61e6abbae55c7a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3fffcd41fa6347ce4b61e6abbae55c7a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga3fffcd41fa6347ce4b61e6abbae55c7a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9b5f55a1f9dda2285576a276d0fb0e2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9b5f55a1f9dda2285576a276d0fb0e2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gac9b5f55a1f9dda2285576a276d0fb0e2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6723e4adf0b6b333f74e15e00a60a4db"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6723e4adf0b6b333f74e15e00a60a4db"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga6723e4adf0b6b333f74e15e00a60a4db"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga202234d8f40086f6343e30597b52c838"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga202234d8f40086f6343e30597b52c838"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga202234d8f40086f6343e30597b52c838"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3c713b846aa56d5a31b2e4525d705679"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c713b846aa56d5a31b2e4525d705679"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga3c713b846aa56d5a31b2e4525d705679"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaabe9c0b33000bbfe71f107cce0af0eb2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaabe9c0b33000bbfe71f107cce0af0eb2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaabe9c0b33000bbfe71f107cce0af0eb2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga25f53481a7575ebb0eb5477950673188"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25f53481a7575ebb0eb5477950673188"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_9</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga25f53481a7575ebb0eb5477950673188"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e2817e62685ec81d3ca6674d8e75187"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e2817e62685ec81d3ca6674d8e75187"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_10</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga5e2817e62685ec81d3ca6674d8e75187"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6022058342e528d097d2d352ccb3210c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6022058342e528d097d2d352ccb3210c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_11</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga6022058342e528d097d2d352ccb3210c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6df2c7bfa97e4536c3c112fa6dc00992"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6df2c7bfa97e4536c3c112fa6dc00992"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_12</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga6df2c7bfa97e4536c3c112fa6dc00992"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7a51e706f1931e6ac3ddd117242da23"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7a51e706f1931e6ac3ddd117242da23"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_13</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gab7a51e706f1931e6ac3ddd117242da23"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga090cea405c38fd8c48f77e561deaaa07"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga090cea405c38fd8c48f77e561deaaa07"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_14</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga090cea405c38fd8c48f77e561deaaa07"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga527b7d78707f17edfe826be72aa59fdc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga527b7d78707f17edfe826be72aa59fdc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_ODR_ODR_15</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga527b7d78707f17edfe826be72aa59fdc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga29dbb08cef82cec8fac9a0044f80d31b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga29dbb08cef82cec8fac9a0044f80d31b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_0</b>   GPIO_ODR_ODR_0</td></tr>
|
||
<tr class="separator:ga29dbb08cef82cec8fac9a0044f80d31b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga94b10e532cafe20fe2c2e7afa91150b3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga94b10e532cafe20fe2c2e7afa91150b3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_1</b>   GPIO_ODR_ODR_1</td></tr>
|
||
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<tr class="memitem:gae0d55284e587dfd6357e124fc8ab4014"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0d55284e587dfd6357e124fc8ab4014"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_2</b>   GPIO_ODR_ODR_2</td></tr>
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||
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<tr class="memitem:ga00f7272497c2d79c2651812c716f5f00"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00f7272497c2d79c2651812c716f5f00"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_3</b>   GPIO_ODR_ODR_3</td></tr>
|
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<tr class="separator:ga00f7272497c2d79c2651812c716f5f00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d1b9031a6c8ae6e1c1b7f8affb5689e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4d1b9031a6c8ae6e1c1b7f8affb5689e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_4</b>   GPIO_ODR_ODR_4</td></tr>
|
||
<tr class="separator:ga4d1b9031a6c8ae6e1c1b7f8affb5689e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga8cd860ae29854fe80c9e410e7e6cc957"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8cd860ae29854fe80c9e410e7e6cc957"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_5</b>   GPIO_ODR_ODR_5</td></tr>
|
||
<tr class="separator:ga8cd860ae29854fe80c9e410e7e6cc957"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75b2cd9cf5cae35759f2b38cc0020a06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga75b2cd9cf5cae35759f2b38cc0020a06"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_6</b>   GPIO_ODR_ODR_6</td></tr>
|
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<tr class="separator:ga75b2cd9cf5cae35759f2b38cc0020a06"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga3a6427032856cd00e7a0b87279cf8e85"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3a6427032856cd00e7a0b87279cf8e85"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_7</b>   GPIO_ODR_ODR_7</td></tr>
|
||
<tr class="separator:ga3a6427032856cd00e7a0b87279cf8e85"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga3f30b73464b5d452c0217349b5294fe2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3f30b73464b5d452c0217349b5294fe2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_8</b>   GPIO_ODR_ODR_8</td></tr>
|
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<tr class="separator:ga3f30b73464b5d452c0217349b5294fe2"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga20b3f0dd86d1dd8edbe20c09412e2297"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga20b3f0dd86d1dd8edbe20c09412e2297"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_9</b>   GPIO_ODR_ODR_9</td></tr>
|
||
<tr class="separator:ga20b3f0dd86d1dd8edbe20c09412e2297"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaf471b28dec1fdf0916e7beaa87d902a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf471b28dec1fdf0916e7beaa87d902a4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_10</b>   GPIO_ODR_ODR_10</td></tr>
|
||
<tr class="separator:gaf471b28dec1fdf0916e7beaa87d902a4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3ac73a7dd714babf1ab5894b4460dacc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3ac73a7dd714babf1ab5894b4460dacc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_11</b>   GPIO_ODR_ODR_11</td></tr>
|
||
<tr class="separator:ga3ac73a7dd714babf1ab5894b4460dacc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaabcfc202ec3ee578aee32375a092a23d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaabcfc202ec3ee578aee32375a092a23d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_12</b>   GPIO_ODR_ODR_12</td></tr>
|
||
<tr class="separator:gaabcfc202ec3ee578aee32375a092a23d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad4f9a8a4dcf381e58a0ab84c3744d063"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4f9a8a4dcf381e58a0ab84c3744d063"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_13</b>   GPIO_ODR_ODR_13</td></tr>
|
||
<tr class="separator:gad4f9a8a4dcf381e58a0ab84c3744d063"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga38b35b661a670ae2afd11258398b7fb1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38b35b661a670ae2afd11258398b7fb1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_14</b>   GPIO_ODR_ODR_14</td></tr>
|
||
<tr class="separator:ga38b35b661a670ae2afd11258398b7fb1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga267734cd2559e9cbf5c4041720e16d1e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga267734cd2559e9cbf5c4041720e16d1e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_OTYPER_ODR_15</b>   GPIO_ODR_ODR_15</td></tr>
|
||
<tr class="separator:ga267734cd2559e9cbf5c4041720e16d1e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b69748fd2f5e2890e784bc0970b31d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b69748fd2f5e2890e784bc0970b31d5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga4b69748fd2f5e2890e784bc0970b31d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa887cd170c757a2954ae8384908d030a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa887cd170c757a2954ae8384908d030a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaa887cd170c757a2954ae8384908d030a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa59c6fcfc63587ebe3cbf640cc74776a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa59c6fcfc63587ebe3cbf640cc74776a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaa59c6fcfc63587ebe3cbf640cc74776a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac41aaeaf32b8837f8f6e29e09ed92152"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac41aaeaf32b8837f8f6e29e09ed92152"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gac41aaeaf32b8837f8f6e29e09ed92152"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga002773af2697ddca1bac26831cfbf231"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga002773af2697ddca1bac26831cfbf231"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga002773af2697ddca1bac26831cfbf231"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9f2671eae81f28d0054b62ca5e2f763"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9f2671eae81f28d0054b62ca5e2f763"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaf9f2671eae81f28d0054b62ca5e2f763"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5dab92d27518649b3807aa4c8ef376b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5dab92d27518649b3807aa4c8ef376b6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga5dab92d27518649b3807aa4c8ef376b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaac4945b022950bdb9570e744279a0dd6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaac4945b022950bdb9570e744279a0dd6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaac4945b022950bdb9570e744279a0dd6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga648026b2f11d992bb0e3383644be4eb9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga648026b2f11d992bb0e3383644be4eb9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga648026b2f11d992bb0e3383644be4eb9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9db2ccea6361f65c6bf156aa57cd4b88"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9db2ccea6361f65c6bf156aa57cd4b88"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_9</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga9db2ccea6361f65c6bf156aa57cd4b88"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa58e335b962fc81af70d19dbd09d9137"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa58e335b962fc81af70d19dbd09d9137"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_10</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gaa58e335b962fc81af70d19dbd09d9137"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5744153a68c73330e2ebe9a9a0ef8036"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5744153a68c73330e2ebe9a9a0ef8036"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_11</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga5744153a68c73330e2ebe9a9a0ef8036"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78652a72a05249db1d343735d1764208"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga78652a72a05249db1d343735d1764208"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_12</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga78652a72a05249db1d343735d1764208"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6367e64393bc954efa6fdce80e94f1be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6367e64393bc954efa6fdce80e94f1be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_13</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga6367e64393bc954efa6fdce80e94f1be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa8c5c56ab4bc16dd7341203c73899e41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa8c5c56ab4bc16dd7341203c73899e41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_14</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaa8c5c56ab4bc16dd7341203c73899e41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga66c0c77c304415bdccf47a0f08b58e4d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga66c0c77c304415bdccf47a0f08b58e4d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BS_15</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga66c0c77c304415bdccf47a0f08b58e4d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga831554de814ae2941c7f527ed6b0a742"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga831554de814ae2941c7f527ed6b0a742"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga831554de814ae2941c7f527ed6b0a742"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6cf488fcb38fc660f7e3d1820a12ae07"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6cf488fcb38fc660f7e3d1820a12ae07"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga6cf488fcb38fc660f7e3d1820a12ae07"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7fe0f9386b50b899fdf1f9008c54f893"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fe0f9386b50b899fdf1f9008c54f893"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga7fe0f9386b50b899fdf1f9008c54f893"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga42b377f0c5f564fb39480afe43ee8796"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga42b377f0c5f564fb39480afe43ee8796"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga42b377f0c5f564fb39480afe43ee8796"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab723c0327da5fb41fe366416b7d61d88"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab723c0327da5fb41fe366416b7d61d88"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_4</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gab723c0327da5fb41fe366416b7d61d88"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d6d8644953029e183eda4404fe9bd27"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d6d8644953029e183eda4404fe9bd27"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_5</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga0d6d8644953029e183eda4404fe9bd27"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga59e4a03667e8a750fd2e775edc44ecbe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga59e4a03667e8a750fd2e775edc44ecbe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_6</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga59e4a03667e8a750fd2e775edc44ecbe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafca85d377fe820e5099d870342d634a8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafca85d377fe820e5099d870342d634a8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_7</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gafca85d377fe820e5099d870342d634a8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab02c6e6e879085fd8912facf86d822cd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab02c6e6e879085fd8912facf86d822cd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_8</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gab02c6e6e879085fd8912facf86d822cd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga47ff03b3d52a7f40ae15cc167b34cc58"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga47ff03b3d52a7f40ae15cc167b34cc58"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_9</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga47ff03b3d52a7f40ae15cc167b34cc58"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7c14a1c84cc91ff1d21b6802cda7d7ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7c14a1c84cc91ff1d21b6802cda7d7ef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_10</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga7c14a1c84cc91ff1d21b6802cda7d7ef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga498185a76dcc2305113c5d168c2844d9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga498185a76dcc2305113c5d168c2844d9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_11</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga498185a76dcc2305113c5d168c2844d9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga222460b26eaba7d333bb4d4ae9426aff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga222460b26eaba7d333bb4d4ae9426aff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_12</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga222460b26eaba7d333bb4d4ae9426aff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca2dc3bd09745f8de6c6788fb1d106af"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaca2dc3bd09745f8de6c6788fb1d106af"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_13</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gaca2dc3bd09745f8de6c6788fb1d106af"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67c96f72bdd15516e22097a3a3dad5f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67c96f72bdd15516e22097a3a3dad5f1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_14</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga67c96f72bdd15516e22097a3a3dad5f1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6eaa59f6afa3fcebaf2a27c31ae38544"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6eaa59f6afa3fcebaf2a27c31ae38544"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>GPIO_BSRR_BR_15</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga6eaa59f6afa3fcebaf2a27c31ae38544"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7d828c238e95cab83f262fac028ec4e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7d828c238e95cab83f262fac028ec4e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_INIT</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad7d828c238e95cab83f262fac028ec4e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacffa826f34e3997c3288ed568b391cb1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacffa826f34e3997c3288ed568b391cb1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_DMAE</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gacffa826f34e3997c3288ed568b391cb1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5ad8c319a2f6bc2c050f18b370c495ee"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5ad8c319a2f6bc2c050f18b370c495ee"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_DATATYPE</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga5ad8c319a2f6bc2c050f18b370c495ee"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabaadf76762e211dc840e3bac1204a59a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabaadf76762e211dc840e3bac1204a59a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_DATATYPE_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gabaadf76762e211dc840e3bac1204a59a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b5f8d43cd72da03998d6557647bee9c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b5f8d43cd72da03998d6557647bee9c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_DATATYPE_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga6b5f8d43cd72da03998d6557647bee9c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8fe7196086d41218655e176591247a48"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8fe7196086d41218655e176591247a48"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_MODE</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga8fe7196086d41218655e176591247a48"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1790e5b64fce305c27c6bf50cdbd5fe9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1790e5b64fce305c27c6bf50cdbd5fe9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_ALGO</b>   ((uint32_t)0x00040080)</td></tr>
|
||
<tr class="separator:ga1790e5b64fce305c27c6bf50cdbd5fe9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7735ddc6318823e55e2711500363e08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7735ddc6318823e55e2711500363e08"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_ALGO_0</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gad7735ddc6318823e55e2711500363e08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga251f6a85e9f9642c58e9b6fdfe3345d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga251f6a85e9f9642c58e9b6fdfe3345d3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_ALGO_1</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga251f6a85e9f9642c58e9b6fdfe3345d3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa21688b9c592b70eabe9ed4b6eeeac12"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa21688b9c592b70eabe9ed4b6eeeac12"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_NBW</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:gaa21688b9c592b70eabe9ed4b6eeeac12"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab132d9ddeca0aacfd27ba5ea3b19cdc9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab132d9ddeca0aacfd27ba5ea3b19cdc9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_NBW_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gab132d9ddeca0aacfd27ba5ea3b19cdc9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee622ae1377f07d2419c360ae12ac563"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee622ae1377f07d2419c360ae12ac563"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_NBW_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaee622ae1377f07d2419c360ae12ac563"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac78ee752761beff6aba7294e5576c6a2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac78ee752761beff6aba7294e5576c6a2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_NBW_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gac78ee752761beff6aba7294e5576c6a2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad07fc5ec331992aec05c4b064400f250"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad07fc5ec331992aec05c4b064400f250"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_NBW_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gad07fc5ec331992aec05c4b064400f250"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f5948a6978b477adba2964e542775c9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0f5948a6978b477adba2964e542775c9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_DINNE</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga0f5948a6978b477adba2964e542775c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51177b66c52485050d090881c4e95e62"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51177b66c52485050d090881c4e95e62"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_MDMAT</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga51177b66c52485050d090881c4e95e62"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga476515115229baeb8ae7aa9996195e44"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga476515115229baeb8ae7aa9996195e44"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_CR_LKEY</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga476515115229baeb8ae7aa9996195e44"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7bf9d52ad29a5e3a891f533c04be625f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7bf9d52ad29a5e3a891f533c04be625f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW</b>   ((uint32_t)0x0000001F)</td></tr>
|
||
<tr class="separator:ga7bf9d52ad29a5e3a891f533c04be625f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5f5859fc7b0b2186423484cf79ff9c76"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5f5859fc7b0b2186423484cf79ff9c76"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga5f5859fc7b0b2186423484cf79ff9c76"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5bcd7ffbaa01da2e88a180c32bd4ddcb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5bcd7ffbaa01da2e88a180c32bd4ddcb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga5bcd7ffbaa01da2e88a180c32bd4ddcb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3442ec5aab7509a4e544b3067e7bf749"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3442ec5aab7509a4e544b3067e7bf749"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga3442ec5aab7509a4e544b3067e7bf749"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga038eee3a0a72e82555c0ed3eae038804"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga038eee3a0a72e82555c0ed3eae038804"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga038eee3a0a72e82555c0ed3eae038804"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0a131f1d3567bebcc782f38f5879f5eb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0a131f1d3567bebcc782f38f5879f5eb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_NBW_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga0a131f1d3567bebcc782f38f5879f5eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0728426e6f0324be8633a6b5a72ec185"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0728426e6f0324be8633a6b5a72ec185"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_STR_DCAL</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga0728426e6f0324be8633a6b5a72ec185"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga74b5495f1d0908e950ef88b8809f5762"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga74b5495f1d0908e950ef88b8809f5762"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_IMR_DINIM</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga74b5495f1d0908e950ef88b8809f5762"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b459bd9c09494f9a5c343b4e0d0476e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b459bd9c09494f9a5c343b4e0d0476e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_IMR_DCIM</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga2b459bd9c09494f9a5c343b4e0d0476e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8ea8072b709747ddb1a39818cb125d68"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ea8072b709747ddb1a39818cb125d68"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_SR_DINIS</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga8ea8072b709747ddb1a39818cb125d68"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab6784f29dbc4cc499725213509d3c453"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab6784f29dbc4cc499725213509d3c453"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_SR_DCIS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gab6784f29dbc4cc499725213509d3c453"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9273a6086423312265eebb04d9c33f6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9273a6086423312265eebb04d9c33f6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_SR_DMAS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaf9273a6086423312265eebb04d9c33f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga593ce96817f5a30039f32960fb82488d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga593ce96817f5a30039f32960fb82488d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>HASH_SR_BUSY</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga593ce96817f5a30039f32960fb82488d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga953b0d38414808db79da116842ed3262"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga953b0d38414808db79da116842ed3262">I2C_CR1_PE</a>   ((uint16_t)0x0001)</td></tr>
|
||
<tr class="separator:ga953b0d38414808db79da116842ed3262"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4cfee7b020a49bd037fa7cf27c796abc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4cfee7b020a49bd037fa7cf27c796abc">I2C_CR1_SMBUS</a>   ((uint16_t)0x0002)</td></tr>
|
||
<tr class="separator:ga4cfee7b020a49bd037fa7cf27c796abc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga001198ff898802888edf58f56d5371c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga001198ff898802888edf58f56d5371c9">I2C_CR1_SMBTYPE</a>   ((uint16_t)0x0008)</td></tr>
|
||
<tr class="separator:ga001198ff898802888edf58f56d5371c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4598185d9092edfbf943464bcbb342ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4598185d9092edfbf943464bcbb342ac">I2C_CR1_ENARP</a>   ((uint16_t)0x0010)</td></tr>
|
||
<tr class="separator:ga4598185d9092edfbf943464bcbb342ac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40d2eb849f9d55e6298035b61e84ca42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40d2eb849f9d55e6298035b61e84ca42">I2C_CR1_ENPEC</a>   ((uint16_t)0x0020)</td></tr>
|
||
<tr class="separator:ga40d2eb849f9d55e6298035b61e84ca42"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1d8c219193b11f8507d7b85831d14912"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d8c219193b11f8507d7b85831d14912">I2C_CR1_ENGC</a>   ((uint16_t)0x0040)</td></tr>
|
||
<tr class="separator:ga1d8c219193b11f8507d7b85831d14912"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga197aaca79f64e832af3a0a0864c2a08c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga197aaca79f64e832af3a0a0864c2a08c">I2C_CR1_NOSTRETCH</a>   ((uint16_t)0x0080)</td></tr>
|
||
<tr class="separator:ga197aaca79f64e832af3a0a0864c2a08c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2ca7f18dd5bc1130dbefae4ff8736143"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ca7f18dd5bc1130dbefae4ff8736143">I2C_CR1_START</a>   ((uint16_t)0x0100)</td></tr>
|
||
<tr class="separator:ga2ca7f18dd5bc1130dbefae4ff8736143"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gace70293f3dfa24d448b600fc58e45223"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace70293f3dfa24d448b600fc58e45223">I2C_CR1_STOP</a>   ((uint16_t)0x0200)</td></tr>
|
||
<tr class="separator:gace70293f3dfa24d448b600fc58e45223"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf933b105259a4bc46a957576adb8d96d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf933b105259a4bc46a957576adb8d96d">I2C_CR1_ACK</a>   ((uint16_t)0x0400)</td></tr>
|
||
<tr class="separator:gaf933b105259a4bc46a957576adb8d96d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga34721958229a5983f2e95dfeaa8e55c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34721958229a5983f2e95dfeaa8e55c3">I2C_CR1_POS</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="memitem:gab4d0119253d93a106b5ca704e5020c12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab4d0119253d93a106b5ca704e5020c12">I2C_CR1_PEC</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="memitem:ga56729ccf93c5d9f5b5b05002e3a2323c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56729ccf93c5d9f5b5b05002e3a2323c">I2C_CR1_ALERT</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="memitem:ga8dc661ef13da02e5bcb943f2003d576d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8dc661ef13da02e5bcb943f2003d576d">I2C_CR1_SWRST</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="memitem:ga293fbe15ed5fd1fc95915bd6437859e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga293fbe15ed5fd1fc95915bd6437859e7">I2C_CR2_FREQ</a>   ((uint16_t)0x003F)</td></tr>
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<tr class="memitem:ga09d944f5260f40a0eb714d41859e0d23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09d944f5260f40a0eb714d41859e0d23">I2C_CR2_FREQ_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga09d944f5260f40a0eb714d41859e0d23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25ab0ef2a7795e3326900b277479d89c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25ab0ef2a7795e3326900b277479d89c">I2C_CR2_FREQ_1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:ga657af5a02534cc900cbddc260319d845"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga657af5a02534cc900cbddc260319d845">I2C_CR2_FREQ_2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:ga655214f8327fd1322998c9d8bffe308d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga655214f8327fd1322998c9d8bffe308d">I2C_CR2_FREQ_3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="memitem:ga3382a7262743bc824985af7339449386"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3382a7262743bc824985af7339449386">I2C_CR2_FREQ_4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga3382a7262743bc824985af7339449386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3b1a2b777fcf158c9e4264485682a20"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3b1a2b777fcf158c9e4264485682a20">I2C_CR2_FREQ_5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gad3b1a2b777fcf158c9e4264485682a20"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f14ae48e4609c2b3645211234cba974"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f14ae48e4609c2b3645211234cba974">I2C_CR2_ITERREN</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga6f14ae48e4609c2b3645211234cba974"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b1ebaf8173090ec469b055b98e585d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b1ebaf8173090ec469b055b98e585d2">I2C_CR2_ITEVTEN</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga3b1ebaf8173090ec469b055b98e585d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2efbe5d96ed0ce447a45a62e8317a68a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2efbe5d96ed0ce447a45a62e8317a68a">I2C_CR2_ITBUFEN</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga2efbe5d96ed0ce447a45a62e8317a68a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb81d5c91486b873bd0bf279a4ffcf69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb81d5c91486b873bd0bf279a4ffcf69">I2C_CR2_DMAEN</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gadb81d5c91486b873bd0bf279a4ffcf69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a0955008cbabbb6b726ba0b4f8da609"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a0955008cbabbb6b726ba0b4f8da609">I2C_CR2_LAST</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga6a0955008cbabbb6b726ba0b4f8da609"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8250616a993a5f2bb04cd0f116005864"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8250616a993a5f2bb04cd0f116005864">I2C_OAR1_ADD1_7</a>   ((uint16_t)0x00FE)</td></tr>
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<tr class="memitem:gab8141dcd63a8429a64d488cc78ef3ec1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8141dcd63a8429a64d488cc78ef3ec1">I2C_OAR1_ADD8_9</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:gab8141dcd63a8429a64d488cc78ef3ec1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b7c20c81f79d17921718412b8fca6d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b7c20c81f79d17921718412b8fca6d7">I2C_OAR1_ADD0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga8b7c20c81f79d17921718412b8fca6d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga499a61f0013c5c6fe38b848901f58769"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga499a61f0013c5c6fe38b848901f58769">I2C_OAR1_ADD1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga499a61f0013c5c6fe38b848901f58769"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab44a263e36a7f34d922ff124aebd99c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab44a263e36a7f34d922ff124aebd99c3">I2C_OAR1_ADD2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gab44a263e36a7f34d922ff124aebd99c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9584dca3b1b414a63cf7ba75e557155b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9584dca3b1b414a63cf7ba75e557155b">I2C_OAR1_ADD3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga9584dca3b1b414a63cf7ba75e557155b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga110b915b907f4bf29ff03da1f077bd97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga110b915b907f4bf29ff03da1f077bd97">I2C_OAR1_ADD4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga110b915b907f4bf29ff03da1f077bd97"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0856dee2657cf0a04d79084da86988ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0856dee2657cf0a04d79084da86988ca">I2C_OAR1_ADD5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga0856dee2657cf0a04d79084da86988ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5507af6154f60125dadc4654f57776ca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5507af6154f60125dadc4654f57776ca">I2C_OAR1_ADD6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga5507af6154f60125dadc4654f57776ca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaca710515f0aac5abdac02a630e09097c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca710515f0aac5abdac02a630e09097c">I2C_OAR1_ADD7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="memitem:gab945eba8b842a253cc64cce722537264"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab945eba8b842a253cc64cce722537264">I2C_OAR1_ADD8</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="memitem:ga10cf2dfc6b1ed55413be06acca413430"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga10cf2dfc6b1ed55413be06acca413430">I2C_OAR1_ADD9</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga10cf2dfc6b1ed55413be06acca413430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d8df80cd27313c896e887aae81fa639"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d8df80cd27313c896e887aae81fa639">I2C_OAR1_ADDMODE</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga7d8df80cd27313c896e887aae81fa639"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab83ed1ee64439cb2734a708445f37e94"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab83ed1ee64439cb2734a708445f37e94">I2C_OAR2_ENDUAL</a>   ((uint8_t)0x01)</td></tr>
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<tr class="memitem:gadd3d8fd1de1f16d051efb52dd3d657c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd3d8fd1de1f16d051efb52dd3d657c4">I2C_OAR2_ADD2</a>   ((uint8_t)0xFE)</td></tr>
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<tr class="separator:gadd3d8fd1de1f16d051efb52dd3d657c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac43021a4a7f79672d27c36a469b301d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac43021a4a7f79672d27c36a469b301d5">I2C_DR_DR</a>   ((uint8_t)0xFF)</td></tr>
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<tr class="separator:gac43021a4a7f79672d27c36a469b301d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6935c920da59d755d0cf834548a70ec4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6935c920da59d755d0cf834548a70ec4">I2C_SR1_SB</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga6935c920da59d755d0cf834548a70ec4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3db361a4d9dd84b187085a11d933b45d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3db361a4d9dd84b187085a11d933b45d">I2C_SR1_ADDR</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga3db361a4d9dd84b187085a11d933b45d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb279f85d78cfe5abd3eeb0b40a65ab1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb279f85d78cfe5abd3eeb0b40a65ab1">I2C_SR1_BTF</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gafb279f85d78cfe5abd3eeb0b40a65ab1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6faaa55a1e48aa7c1f2b69669901445d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6faaa55a1e48aa7c1f2b69669901445d">I2C_SR1_ADD10</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga6faaa55a1e48aa7c1f2b69669901445d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaafcea4cdbe2f6da31566c897fa893a7c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaafcea4cdbe2f6da31566c897fa893a7c">I2C_SR1_STOPF</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gaafcea4cdbe2f6da31566c897fa893a7c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6ebe33c992611bc2e25bbb01c1441a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6ebe33c992611bc2e25bbb01c1441a5">I2C_SR1_RXNE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaf6ebe33c992611bc2e25bbb01c1441a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdc4da49c163910203255e384591b6f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdc4da49c163910203255e384591b6f7">I2C_SR1_TXE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:gafdc4da49c163910203255e384591b6f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d12990c90ab0757dcfea150ea50b227"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d12990c90ab0757dcfea150ea50b227">I2C_SR1_BERR</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga1d12990c90ab0757dcfea150ea50b227"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacbc52f6ec6172c71d8b026a22c2f69d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacbc52f6ec6172c71d8b026a22c2f69d2">I2C_SR1_ARLO</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gacbc52f6ec6172c71d8b026a22c2f69d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga62aa2496d4b3955214a16a7bd998fd88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62aa2496d4b3955214a16a7bd998fd88">I2C_SR1_AF</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga62aa2496d4b3955214a16a7bd998fd88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad42d2435d2e64bf710c701c9b17adfb4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad42d2435d2e64bf710c701c9b17adfb4">I2C_SR1_OVR</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="memitem:ga4b2976279024e832e53ad12796a7bb71"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b2976279024e832e53ad12796a7bb71">I2C_SR1_PECERR</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="memitem:gaef3a1e4921d7c509d1b639c67882c4c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef3a1e4921d7c509d1b639c67882c4c9">I2C_SR1_TIMEOUT</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="memitem:ga8df36c38deb8791d0ac3cb5881298c1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8df36c38deb8791d0ac3cb5881298c1c">I2C_SR1_SMBALERT</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="memitem:ga75cc361adf0e72e33d6771ebfa17b52d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75cc361adf0e72e33d6771ebfa17b52d">I2C_SR2_MSL</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="memitem:ga3b1e75a82da73ae2873cff1cd27c3179"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b1e75a82da73ae2873cff1cd27c3179">I2C_SR2_BUSY</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:ga288b20416b42a79e591aa80d9a690fca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga288b20416b42a79e591aa80d9a690fca">I2C_SR2_TRA</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:gaf3aeb79cbe04f7ec1e3c2615921c4fab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3aeb79cbe04f7ec1e3c2615921c4fab">I2C_SR2_GENCALL</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:gafcf50334903013177a8c6f4e36b8d6fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafcf50334903013177a8c6f4e36b8d6fe">I2C_SR2_SMBDEFAULT</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="memitem:gaa07cf3e404f9f57e98d1ba3793079c80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa07cf3e404f9f57e98d1ba3793079c80">I2C_SR2_SMBHOST</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="memitem:ga79a6a21835e06d9bc48009f4269b7798"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79a6a21835e06d9bc48009f4269b7798">I2C_SR2_DUALF</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="memitem:ga4a4fd5d9c9e2593be920d19a5f6ae732"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a4fd5d9c9e2593be920d19a5f6ae732">I2C_SR2_PEC</a>   ((uint16_t)0xFF00)</td></tr>
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<tr class="memitem:ga5c8cb2bd83dd7dbdcf6ca4bbf4a841de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c8cb2bd83dd7dbdcf6ca4bbf4a841de">I2C_CCR_CCR</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:ga5c8cb2bd83dd7dbdcf6ca4bbf4a841de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga851c8a6b598d54c1a805b1632a4078e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga851c8a6b598d54c1a805b1632a4078e5">I2C_CCR_DUTY</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga851c8a6b598d54c1a805b1632a4078e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea64e5d7eba609ac9a84964bc0bc2def"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea64e5d7eba609ac9a84964bc0bc2def">I2C_CCR_FS</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="memitem:gaff77a39aba630647af62dc7f1a5dc218"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaff77a39aba630647af62dc7f1a5dc218">I2C_TRISE_TRISE</a>   ((uint8_t)0x3F)</td></tr>
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<tr class="separator:gaff77a39aba630647af62dc7f1a5dc218"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffe4c34d459e53d73c92e0a6fd383795"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffe4c34d459e53d73c92e0a6fd383795">I2C_FLTR_DNF</a>   ((uint8_t)0x0F)</td></tr>
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<tr class="separator:gaffe4c34d459e53d73c92e0a6fd383795"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f312cebb37d3e5d0a690dc6fda86f32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f312cebb37d3e5d0a690dc6fda86f32">I2C_FLTR_ANOFF</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:ga7f312cebb37d3e5d0a690dc6fda86f32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga957f7d5f8a0ec1a6956a7f05cfbd97c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga957f7d5f8a0ec1a6956a7f05cfbd97c2">IWDG_KR_KEY</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga957f7d5f8a0ec1a6956a7f05cfbd97c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4de39c5672f17d326fceb5adc9adc090"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4de39c5672f17d326fceb5adc9adc090">IWDG_PR_PR</a>   ((uint8_t)0x07)</td></tr>
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<tr class="separator:ga4de39c5672f17d326fceb5adc9adc090"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9b727e7882603df1684cbf230520ca76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9b727e7882603df1684cbf230520ca76">IWDG_PR_PR_0</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga9b727e7882603df1684cbf230520ca76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafba2551b90c68d95c736a116224b473e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafba2551b90c68d95c736a116224b473e">IWDG_PR_PR_1</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:gafba2551b90c68d95c736a116224b473e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga55a1d7fde4e3e724a8644652ba9bb2b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga55a1d7fde4e3e724a8644652ba9bb2b9">IWDG_PR_PR_2</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:ga55a1d7fde4e3e724a8644652ba9bb2b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga87024bbb19f26def4c4c1510b22d3033"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga87024bbb19f26def4c4c1510b22d3033">IWDG_RLR_RL</a>   ((uint16_t)0x0FFF)</td></tr>
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<tr class="separator:ga87024bbb19f26def4c4c1510b22d3033"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga269bd5618ba773d32275b93be004c554"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga269bd5618ba773d32275b93be004c554">IWDG_SR_PVU</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga269bd5618ba773d32275b93be004c554"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadffb8339e556a3b10120b15f0dacc232"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadffb8339e556a3b10120b15f0dacc232">IWDG_SR_RVU</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:gadffb8339e556a3b10120b15f0dacc232"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab89c121ca98d7b5ccc3f0f7febf4eece"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab89c121ca98d7b5ccc3f0f7febf4eece">LTDC_SSCR_VSH</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="separator:gab89c121ca98d7b5ccc3f0f7febf4eece"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga907f3558ae8795a88438115a0f4b9ea5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga907f3558ae8795a88438115a0f4b9ea5">LTDC_SSCR_HSW</a>   ((uint32_t)0x0FFF0000)</td></tr>
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<tr class="separator:ga907f3558ae8795a88438115a0f4b9ea5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga535b0212401c5e7d4ed501432785cdc6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga535b0212401c5e7d4ed501432785cdc6">LTDC_BPCR_AVBP</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="separator:ga535b0212401c5e7d4ed501432785cdc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6935a2c30e44ad5c705ae26199f60782"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6935a2c30e44ad5c705ae26199f60782">LTDC_BPCR_AHBP</a>   ((uint32_t)0x0FFF0000)</td></tr>
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<tr class="memitem:ga9fcf5508c9feeec2a3e17380a3a2f55e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9fcf5508c9feeec2a3e17380a3a2f55e">LTDC_AWCR_AAH</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="separator:ga9fcf5508c9feeec2a3e17380a3a2f55e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a2a074b96e4a6f856d34efa93265baa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a2a074b96e4a6f856d34efa93265baa">LTDC_AWCR_AAW</a>   ((uint32_t)0x0FFF0000)</td></tr>
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<tr class="separator:ga7a2a074b96e4a6f856d34efa93265baa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab222ec4adc24cb96ba19ac718657980d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab222ec4adc24cb96ba19ac718657980d">LTDC_TWCR_TOTALH</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="memitem:gaca9cb93332d3b62207e86bb7f3e126e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca9cb93332d3b62207e86bb7f3e126e0">LTDC_TWCR_TOTALW</a>   ((uint32_t)0x0FFF0000)</td></tr>
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<tr class="separator:gaca9cb93332d3b62207e86bb7f3e126e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf55426883a15eeb7222f2afdb474078c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf55426883a15eeb7222f2afdb474078c">LTDC_GCR_LTDCEN</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:ga1686ca70b7713b92388428cec667f3e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1686ca70b7713b92388428cec667f3e1">LTDC_GCR_DBW</a>   ((uint32_t)0x00000070)</td></tr>
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<tr class="memitem:gaaeda36ed8fd82123f98869492dfa44ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaeda36ed8fd82123f98869492dfa44ac">LTDC_GCR_DGW</a>   ((uint32_t)0x00000700)</td></tr>
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<tr class="separator:gaaeda36ed8fd82123f98869492dfa44ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0240de6352abcfc4efb15b7ebf576822"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0240de6352abcfc4efb15b7ebf576822">LTDC_GCR_DRW</a>   ((uint32_t)0x00007000)</td></tr>
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<tr class="memitem:gae926ae4dfa16282de074099da8b22647"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae926ae4dfa16282de074099da8b22647">LTDC_GCR_DTEN</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="memitem:ga3718fea213202d0fd836bfa24b744a10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3718fea213202d0fd836bfa24b744a10">LTDC_GCR_PCPOL</a>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga3718fea213202d0fd836bfa24b744a10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b52f55ad6c0d4755ea7555661362bd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b52f55ad6c0d4755ea7555661362bd0">LTDC_GCR_DEPOL</a>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:ga5b52f55ad6c0d4755ea7555661362bd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga997a434c558ff322253a50f971176433"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga997a434c558ff322253a50f971176433">LTDC_GCR_VSPOL</a>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga997a434c558ff322253a50f971176433"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8773e0967763b93c618099e9d173936e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8773e0967763b93c618099e9d173936e">LTDC_GCR_HSPOL</a>   ((uint32_t)0x80000000)</td></tr>
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<tr class="memitem:ga2bee9f0d3252c465422ad42a3e748c33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bee9f0d3252c465422ad42a3e748c33">LTDC_SRCR_IMR</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga2bee9f0d3252c465422ad42a3e748c33"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a469ec4989f09bd45c0fa1bcd8fbb0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a469ec4989f09bd45c0fa1bcd8fbb0a">LTDC_SRCR_VBR</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga6a469ec4989f09bd45c0fa1bcd8fbb0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17515cc05bb25a491a9f27d6740c0169"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17515cc05bb25a491a9f27d6740c0169">LTDC_BCCR_BCBLUE</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga17515cc05bb25a491a9f27d6740c0169"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc8b89287c8bd118c951bf9466741561"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc8b89287c8bd118c951bf9466741561">LTDC_BCCR_BCGREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gabc8b89287c8bd118c951bf9466741561"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5cdd228eaac63eafbb44f5402f772495"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5cdd228eaac63eafbb44f5402f772495">LTDC_BCCR_BCRED</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga5cdd228eaac63eafbb44f5402f772495"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga986f9c276c5c09d609099fb9df0466f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga986f9c276c5c09d609099fb9df0466f0">LTDC_IER_LIE</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga986f9c276c5c09d609099fb9df0466f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59e996a111de2bfbc7353ad721d23b62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59e996a111de2bfbc7353ad721d23b62">LTDC_IER_FUIE</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga59e996a111de2bfbc7353ad721d23b62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae31521896ca3734d4ea2d8b0a8c53e6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae31521896ca3734d4ea2d8b0a8c53e6c">LTDC_IER_TERRIE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae31521896ca3734d4ea2d8b0a8c53e6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8b81bb2975282a8c97904fb27f379b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8b81bb2975282a8c97904fb27f379b6">LTDC_IER_RRIE</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gad8b81bb2975282a8c97904fb27f379b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1430a5052fa2be26d885e6019326f374"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1430a5052fa2be26d885e6019326f374">LTDC_ISR_LIF</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga1430a5052fa2be26d885e6019326f374"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad25511dce2346382813fbb8f38ed0afe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad25511dce2346382813fbb8f38ed0afe">LTDC_ISR_FUIF</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gad25511dce2346382813fbb8f38ed0afe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78d78d256e92cc8fd7c9180c16fe845b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78d78d256e92cc8fd7c9180c16fe845b">LTDC_ISR_TERRIF</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga78d78d256e92cc8fd7c9180c16fe845b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8735819d356373cd4ee6f5fdb4889fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8735819d356373cd4ee6f5fdb4889fc">LTDC_ISR_RRIF</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gac8735819d356373cd4ee6f5fdb4889fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15295bfc88388bbb0472e718dbb2e5e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15295bfc88388bbb0472e718dbb2e5e9">LTDC_ICR_CLIF</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga15295bfc88388bbb0472e718dbb2e5e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga36d2e96e5ac6c5a269131c6eadf5f552"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36d2e96e5ac6c5a269131c6eadf5f552">LTDC_ICR_CFUIF</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga36d2e96e5ac6c5a269131c6eadf5f552"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45dfff9d309c4a9b094930d8a2ae259a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45dfff9d309c4a9b094930d8a2ae259a">LTDC_ICR_CTERRIF</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga45dfff9d309c4a9b094930d8a2ae259a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45709c66c8322628434d48bacdc9f92d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45709c66c8322628434d48bacdc9f92d">LTDC_ICR_CRRIF</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga45709c66c8322628434d48bacdc9f92d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1818ec63a734052e0b3652eb492a9cf3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1818ec63a734052e0b3652eb492a9cf3">LTDC_LIPCR_LIPOS</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="separator:ga1818ec63a734052e0b3652eb492a9cf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5688f0180e7bacd368194e582eea441d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5688f0180e7bacd368194e582eea441d">LTDC_CPSR_CYPOS</a>   ((uint32_t)0x0000FFFF)</td></tr>
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<tr class="separator:ga5688f0180e7bacd368194e582eea441d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1056b9d14adcc3a2bd1057fcb71eec9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1056b9d14adcc3a2bd1057fcb71eec9">LTDC_CPSR_CXPOS</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gac1056b9d14adcc3a2bd1057fcb71eec9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e4c498e3baf6490c83ae67b7859b1ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e4c498e3baf6490c83ae67b7859b1ce">LTDC_CDSR_VDES</a>   ((uint32_t)0x00000001)</td></tr>
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||
<tr class="separator:ga5e4c498e3baf6490c83ae67b7859b1ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaea3bfe7426e5ee59e4a136f408a09716"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaea3bfe7426e5ee59e4a136f408a09716">LTDC_CDSR_HDES</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gaea3bfe7426e5ee59e4a136f408a09716"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1cb94c249cec7aaa63803eb9e4d56863"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1cb94c249cec7aaa63803eb9e4d56863">LTDC_CDSR_VSYNCS</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga1cb94c249cec7aaa63803eb9e4d56863"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9556e6ff6318d564c481fb022b9f254e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9556e6ff6318d564c481fb022b9f254e">LTDC_CDSR_HSYNCS</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga9556e6ff6318d564c481fb022b9f254e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4137ed7793f1e0399d2d4184f73eceb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab4137ed7793f1e0399d2d4184f73eceb">LTDC_LxCR_LEN</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gab4137ed7793f1e0399d2d4184f73eceb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20578c97851c63d3c356bd3452e447f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20578c97851c63d3c356bd3452e447f3">LTDC_LxCR_COLKEN</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga20578c97851c63d3c356bd3452e447f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3ed020e503cd29e946528c9ac63846d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ed020e503cd29e946528c9ac63846d5">LTDC_LxCR_CLUTEN</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga3ed020e503cd29e946528c9ac63846d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b9b7b4e2f5f9ea9d3ee20186d13623e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6b9b7b4e2f5f9ea9d3ee20186d13623e">LTDC_LxWHPCR_WHSTPOS</a>   ((uint32_t)0x00000FFF)</td></tr>
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<tr class="separator:ga6b9b7b4e2f5f9ea9d3ee20186d13623e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad75b147ab755274aa4baca5541a6993e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad75b147ab755274aa4baca5541a6993e">LTDC_LxWHPCR_WHSPPOS</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gad75b147ab755274aa4baca5541a6993e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa83711c9cfc27570784e119b69f5acd2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa83711c9cfc27570784e119b69f5acd2">LTDC_LxWVPCR_WVSTPOS</a>   ((uint32_t)0x00000FFF)</td></tr>
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<tr class="separator:gaa83711c9cfc27570784e119b69f5acd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8339caa7759f7159bb2aec90f6af49f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8339caa7759f7159bb2aec90f6af49f9">LTDC_LxWVPCR_WVSPPOS</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:ga8339caa7759f7159bb2aec90f6af49f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8fec067b174a76fcf8ee14b86addc7fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8fec067b174a76fcf8ee14b86addc7fa">LTDC_LxCKCR_CKBLUE</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga8fec067b174a76fcf8ee14b86addc7fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga979f0d91c15471854b39dced9923631a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga979f0d91c15471854b39dced9923631a">LTDC_LxCKCR_CKGREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:ga979f0d91c15471854b39dced9923631a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d0da8eeba215cd5327332a557b77c87"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d0da8eeba215cd5327332a557b77c87">LTDC_LxCKCR_CKRED</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga8d0da8eeba215cd5327332a557b77c87"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6badb297e740d959d1971c6109a7f417"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6badb297e740d959d1971c6109a7f417">LTDC_LxPFCR_PF</a>   ((uint32_t)0x00000007)</td></tr>
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<tr class="separator:ga6badb297e740d959d1971c6109a7f417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad538e4df55b9d97c61bca14d93346a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad538e4df55b9d97c61bca14d93346a3">LTDC_LxCACR_CONSTA</a>   ((uint32_t)0x000000FF)</td></tr>
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||
<tr class="separator:gaad538e4df55b9d97c61bca14d93346a3"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga91f017addde6d63278ed0872f95e9978"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91f017addde6d63278ed0872f95e9978">LTDC_LxDCCR_DCBLUE</a>   ((uint32_t)0x000000FF)</td></tr>
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||
<tr class="separator:ga91f017addde6d63278ed0872f95e9978"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabab49201f0db066d5578b6a5e9cd3753"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabab49201f0db066d5578b6a5e9cd3753">LTDC_LxDCCR_DCGREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
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||
<tr class="separator:gabab49201f0db066d5578b6a5e9cd3753"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga87bd39aae738ca9d3003a1fdb1805267"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga87bd39aae738ca9d3003a1fdb1805267">LTDC_LxDCCR_DCRED</a>   ((uint32_t)0x00FF0000)</td></tr>
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||
<tr class="separator:ga87bd39aae738ca9d3003a1fdb1805267"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaacd6b290af2380f0e6d952200cc7b541"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaacd6b290af2380f0e6d952200cc7b541">LTDC_LxDCCR_DCALPHA</a>   ((uint32_t)0xFF000000)</td></tr>
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||
<tr class="separator:gaacd6b290af2380f0e6d952200cc7b541"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad28cd200b3c7cb36eeccff2c56fdd649"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad28cd200b3c7cb36eeccff2c56fdd649">LTDC_LxBFCR_BF2</a>   ((uint32_t)0x00000007)</td></tr>
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||
<tr class="separator:gad28cd200b3c7cb36eeccff2c56fdd649"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6a130d060626796428774293042188f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a130d060626796428774293042188f2">LTDC_LxBFCR_BF1</a>   ((uint32_t)0x00000700)</td></tr>
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||
<tr class="separator:ga6a130d060626796428774293042188f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga533aa67a63316950180faf61ef5b72a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga533aa67a63316950180faf61ef5b72a9">LTDC_LxCFBAR_CFBADD</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga533aa67a63316950180faf61ef5b72a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga010df13cba684fbf65e8d4e0200bc8b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga010df13cba684fbf65e8d4e0200bc8b8">LTDC_LxCFBLR_CFBLL</a>   ((uint32_t)0x00001FFF)</td></tr>
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<tr class="separator:ga010df13cba684fbf65e8d4e0200bc8b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga08649b490876b957949df5334c9bdafe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga08649b490876b957949df5334c9bdafe">LTDC_LxCFBLR_CFBP</a>   ((uint32_t)0x1FFF0000)</td></tr>
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<tr class="separator:ga08649b490876b957949df5334c9bdafe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5209baf02f3685749b1f22ea9de5532"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5209baf02f3685749b1f22ea9de5532">LTDC_LxCFBLNR_CFBLNBR</a>   ((uint32_t)0x000007FF)</td></tr>
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<tr class="separator:gaf5209baf02f3685749b1f22ea9de5532"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae00786e8173c10ab75d240557a384590"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae00786e8173c10ab75d240557a384590">LTDC_LxCLUTWR_BLUE</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:gae00786e8173c10ab75d240557a384590"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad69ebaef3fa5e207583c452383902745"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad69ebaef3fa5e207583c452383902745">LTDC_LxCLUTWR_GREEN</a>   ((uint32_t)0x0000FF00)</td></tr>
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<tr class="separator:gad69ebaef3fa5e207583c452383902745"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga94a21e31959c31fcf180c38bb6090043"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga94a21e31959c31fcf180c38bb6090043">LTDC_LxCLUTWR_RED</a>   ((uint32_t)0x00FF0000)</td></tr>
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<tr class="separator:ga94a21e31959c31fcf180c38bb6090043"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5b936eefb3a3b537f4914a745d94a41"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5b936eefb3a3b537f4914a745d94a41">LTDC_LxCLUTWR_CLUTADD</a>   ((uint32_t)0xFF000000)</td></tr>
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<tr class="separator:gad5b936eefb3a3b537f4914a745d94a41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3aeb8d6f2539b0a3a4b851aeba0eea66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3aeb8d6f2539b0a3a4b851aeba0eea66">PWR_CR_LPDS</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga3aeb8d6f2539b0a3a4b851aeba0eea66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c8075e98772470804c9e3fe74984115"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8c8075e98772470804c9e3fe74984115">PWR_CR_PDDS</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga8c8075e98772470804c9e3fe74984115"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3928de64f633b84770b1cfecea702fa7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3928de64f633b84770b1cfecea702fa7">PWR_CR_CWUF</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga3928de64f633b84770b1cfecea702fa7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab44484cacc35c80cf82eb011d6cbe13a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab44484cacc35c80cf82eb011d6cbe13a">PWR_CR_CSBF</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gab44484cacc35c80cf82eb011d6cbe13a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05d5c39759e69a294c0ab9bea8f142e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05d5c39759e69a294c0ab9bea8f142e5">PWR_CR_PVDE</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga05d5c39759e69a294c0ab9bea8f142e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac73c24d43953c7598e42acdd4c4e7435"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac73c24d43953c7598e42acdd4c4e7435">PWR_CR_PLS</a>   ((uint32_t)0x000000E0)</td></tr>
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<tr class="separator:gac73c24d43953c7598e42acdd4c4e7435"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacef447510818c468c202e3b4991ea08e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacef447510818c468c202e3b4991ea08e">PWR_CR_PLS_0</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gacef447510818c468c202e3b4991ea08e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafcd19d78943514a2f695a39b45594623"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafcd19d78943514a2f695a39b45594623">PWR_CR_PLS_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gafcd19d78943514a2f695a39b45594623"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a8986ee557f443d4a8eebf68026bd52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1a8986ee557f443d4a8eebf68026bd52">PWR_CR_PLS_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga1a8986ee557f443d4a8eebf68026bd52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb6b904b20d7e4fff958c75748861216"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb6b904b20d7e4fff958c75748861216">PWR_CR_PLS_LEV0</a>   ((uint32_t)0x00000000)</td></tr>
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<tr class="separator:gacb6b904b20d7e4fff958c75748861216"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15b71263f73f0c4e53ca91fc8d096818"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15b71263f73f0c4e53ca91fc8d096818">PWR_CR_PLS_LEV1</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga15b71263f73f0c4e53ca91fc8d096818"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2ea128abc2fc4252b53d09ca2850e69e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ea128abc2fc4252b53d09ca2850e69e">PWR_CR_PLS_LEV2</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga2ea128abc2fc4252b53d09ca2850e69e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c1782980a2fb12de80058729a74f174"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c1782980a2fb12de80058729a74f174">PWR_CR_PLS_LEV3</a>   ((uint32_t)0x00000060)</td></tr>
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<tr class="separator:ga9c1782980a2fb12de80058729a74f174"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0fe79f097ea6c30a4ccf69ed3e177f85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0fe79f097ea6c30a4ccf69ed3e177f85">PWR_CR_PLS_LEV4</a>   ((uint32_t)0x00000080)</td></tr>
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||
<tr class="separator:ga0fe79f097ea6c30a4ccf69ed3e177f85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga326781d09a07b4d215424fbbae11b7b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga326781d09a07b4d215424fbbae11b7b2">PWR_CR_PLS_LEV5</a>   ((uint32_t)0x000000A0)</td></tr>
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<tr class="separator:ga326781d09a07b4d215424fbbae11b7b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaff17e9c7fe7d837523b1e9a2f4e9baf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaff17e9c7fe7d837523b1e9a2f4e9baf">PWR_CR_PLS_LEV6</a>   ((uint32_t)0x000000C0)</td></tr>
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||
<tr class="separator:gaaff17e9c7fe7d837523b1e9a2f4e9baf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga95e3b301b5470ae94d32c53a9fbdfc8b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95e3b301b5470ae94d32c53a9fbdfc8b">PWR_CR_PLS_LEV7</a>   ((uint32_t)0x000000E0)</td></tr>
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||
<tr class="separator:ga95e3b301b5470ae94d32c53a9fbdfc8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5c65ab845794ef48f09faa2ee44f718"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf5c65ab845794ef48f09faa2ee44f718">PWR_CR_DBP</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gaf5c65ab845794ef48f09faa2ee44f718"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc01f8b6d4bd0294f745fde6d8e57002"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc01f8b6d4bd0294f745fde6d8e57002">PWR_CR_FPDS</a>   ((uint32_t)0x00000200)</td></tr>
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||
<tr class="separator:gafc01f8b6d4bd0294f745fde6d8e57002"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1c7718e2c1a57985f79776683bb5464"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1c7718e2c1a57985f79776683bb5464">PWR_CR_LPUDS</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:gac1c7718e2c1a57985f79776683bb5464"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59c516cad11a310e8c5b560b00220d45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59c516cad11a310e8c5b560b00220d45">PWR_CR_MRUDS</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga59c516cad11a310e8c5b560b00220d45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e37ea5ff0bd06d0d5aa7b2f15d63495"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e37ea5ff0bd06d0d5aa7b2f15d63495">PWR_CR_LPLVDS</a>   ((uint32_t)0x00000400)</td></tr>
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||
<tr class="separator:ga6e37ea5ff0bd06d0d5aa7b2f15d63495"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga40e8c390899e9e836f1c52d90b64488d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40e8c390899e9e836f1c52d90b64488d">PWR_CR_MRLVDS</a>   ((uint32_t)0x00000800)</td></tr>
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||
<tr class="separator:ga40e8c390899e9e836f1c52d90b64488d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga977b89f2739e32b704194a6995d3d33d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga977b89f2739e32b704194a6995d3d33d">PWR_CR_ADCDC1</a>   ((uint32_t)0x00002000)</td></tr>
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||
<tr class="separator:ga977b89f2739e32b704194a6995d3d33d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaccc33f1ba4e374e116ffa50f3a503030"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaccc33f1ba4e374e116ffa50f3a503030">PWR_CR_VOS</a>   ((uint32_t)0x0000C000)</td></tr>
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||
<tr class="separator:gaccc33f1ba4e374e116ffa50f3a503030"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27b4e08a8936aa9828c5d683fde2fb59"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27b4e08a8936aa9828c5d683fde2fb59">PWR_CR_VOS_0</a>   ((uint32_t)0x00004000)</td></tr>
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||
<tr class="separator:ga27b4e08a8936aa9828c5d683fde2fb59"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac3093c26b256c965cebec3b2e388a3b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3093c26b256c965cebec3b2e388a3b4">PWR_CR_VOS_1</a>   ((uint32_t)0x00008000)</td></tr>
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||
<tr class="separator:gac3093c26b256c965cebec3b2e388a3b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbb849c6c4908d6f08f4fdc28d702522"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbb849c6c4908d6f08f4fdc28d702522">PWR_CR_ODEN</a>   ((uint32_t)0x00010000)</td></tr>
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||
<tr class="separator:gadbb849c6c4908d6f08f4fdc28d702522"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1e865d13e084ed53bded37c3cdea173"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1e865d13e084ed53bded37c3cdea173">PWR_CR_ODSWEN</a>   ((uint32_t)0x00020000)</td></tr>
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||
<tr class="separator:gaf1e865d13e084ed53bded37c3cdea173"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga150acdf90bcc4c040af0d1f5e1055f4a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga150acdf90bcc4c040af0d1f5e1055f4a">PWR_CR_UDEN</a>   ((uint32_t)0x000C0000)</td></tr>
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||
<tr class="separator:ga150acdf90bcc4c040af0d1f5e1055f4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac9c44f47475e9bf0bd6feae67b1cb12b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9c44f47475e9bf0bd6feae67b1cb12b">PWR_CR_UDEN_0</a>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gac9c44f47475e9bf0bd6feae67b1cb12b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab974d921fa98b211719002f5830bbae4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab974d921fa98b211719002f5830bbae4">PWR_CR_UDEN_1</a>   ((uint32_t)0x00080000)</td></tr>
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||
<tr class="separator:gab974d921fa98b211719002f5830bbae4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a4454070b891307e331c97d342e35db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a4454070b891307e331c97d342e35db">PWR_CR_FMSSR</a>   ((uint32_t)0x00100000)</td></tr>
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||
<tr class="separator:ga7a4454070b891307e331c97d342e35db"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga36967ef7baeaedfc30f125092ee59b30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga36967ef7baeaedfc30f125092ee59b30">PWR_CR_FISSR</a>   ((uint32_t)0x00200000)</td></tr>
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||
<tr class="separator:ga36967ef7baeaedfc30f125092ee59b30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56b78f2f76a841d2e8ddd56299b8d3e2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56b78f2f76a841d2e8ddd56299b8d3e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>PWR_CR_PMODE</b>   <a class="el" href="group___peripheral___registers___bits___definition.html#gaccc33f1ba4e374e116ffa50f3a503030">PWR_CR_VOS</a></td></tr>
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<tr class="separator:ga56b78f2f76a841d2e8ddd56299b8d3e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9465bb7ad9ca936688344e2a077539e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9465bb7ad9ca936688344e2a077539e6">PWR_CSR_WUF</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga9465bb7ad9ca936688344e2a077539e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4fd42f153660593cad6f4fe22ff76bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab4fd42f153660593cad6f4fe22ff76bb">PWR_CSR_SBF</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gab4fd42f153660593cad6f4fe22ff76bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3535ce181895cc00afeb28dcac68d04c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3535ce181895cc00afeb28dcac68d04c">PWR_CSR_PVDO</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga3535ce181895cc00afeb28dcac68d04c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga939410de980c5bc297ff04bcf30875cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga939410de980c5bc297ff04bcf30875cc">PWR_CSR_BRR</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga939410de980c5bc297ff04bcf30875cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ac8c15a08bbee754ea720b0d4a4f580"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ac8c15a08bbee754ea720b0d4a4f580">PWR_CSR_EWUP</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga7ac8c15a08bbee754ea720b0d4a4f580"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f99becaceb185431dbf46fb22718d0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f99becaceb185431dbf46fb22718d0a">PWR_CSR_BRE</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga0f99becaceb185431dbf46fb22718d0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4126ed19cce54a5411ff8dd440171695"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4126ed19cce54a5411ff8dd440171695">PWR_CSR_VOSRDY</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga4126ed19cce54a5411ff8dd440171695"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae35dfabd53bc335d95d330442cdfac6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae35dfabd53bc335d95d330442cdfac6d">PWR_CSR_ODRDY</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gae35dfabd53bc335d95d330442cdfac6d"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gabb55eb15d71248b59e36a158039f9b54"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb55eb15d71248b59e36a158039f9b54">PWR_CSR_ODSWRDY</a>   ((uint32_t)0x00020000)</td></tr>
|
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<tr class="separator:gabb55eb15d71248b59e36a158039f9b54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31f0172b9dcefa55d772d4cb0eed6687"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31f0172b9dcefa55d772d4cb0eed6687">PWR_CSR_UDSWRDY</a>   ((uint32_t)0x000C0000)</td></tr>
|
||
<tr class="separator:ga31f0172b9dcefa55d772d4cb0eed6687"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga017220a84cc5ab813eee18edd6309827"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga017220a84cc5ab813eee18edd6309827"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>PWR_CSR_REGRDY</b>   <a class="el" href="group___peripheral___registers___bits___definition.html#ga4126ed19cce54a5411ff8dd440171695">PWR_CSR_VOSRDY</a></td></tr>
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||
<tr class="separator:ga017220a84cc5ab813eee18edd6309827"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4fcacf94a97f7d49a70e089b39cf474"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf4fcacf94a97f7d49a70e089b39cf474"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSION</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaf4fcacf94a97f7d49a70e089b39cf474"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9dbac3f2bc04f04ebafe1e66ae3fcf0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9dbac3f2bc04f04ebafe1e66ae3fcf0d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSIRDY</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9dbac3f2bc04f04ebafe1e66ae3fcf0d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5cb4397b2095c31660a01b748386aa70"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5cb4397b2095c31660a01b748386aa70"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSITRIM</b>   ((uint32_t)0x000000F8)</td></tr>
|
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<tr class="separator:ga5cb4397b2095c31660a01b748386aa70"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaab999bbbc1d365d0100d34eaa9f426eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab999bbbc1d365d0100d34eaa9f426eb">RCC_CR_HSITRIM_0</a>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gaab999bbbc1d365d0100d34eaa9f426eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga569d6a29d774e0f125b0c2b3671fae3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga569d6a29d774e0f125b0c2b3671fae3c">RCC_CR_HSITRIM_1</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga569d6a29d774e0f125b0c2b3671fae3c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga10d80d64137e36f5183f6aa7002de6f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga10d80d64137e36f5183f6aa7002de6f5">RCC_CR_HSITRIM_2</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga10d80d64137e36f5183f6aa7002de6f5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe20245d2d971238dba9ee371a299ba9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe20245d2d971238dba9ee371a299ba9">RCC_CR_HSITRIM_3</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gafe20245d2d971238dba9ee371a299ba9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1f9ab2e93a0b9b70d33812bcc5e920c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f9ab2e93a0b9b70d33812bcc5e920c1">RCC_CR_HSITRIM_4</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga1f9ab2e93a0b9b70d33812bcc5e920c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67ae770db9851f14ad7c14a693f0f6d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67ae770db9851f14ad7c14a693f0f6d3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSICAL</b>   ((uint32_t)0x0000FF00)</td></tr>
|
||
<tr class="separator:ga67ae770db9851f14ad7c14a693f0f6d3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7daa7754e54d65916ddc54f37274d3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7daa7754e54d65916ddc54f37274d3a">RCC_CR_HSICAL_0</a>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gad7daa7754e54d65916ddc54f37274d3a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78054087161dee567cadbb4b4b96fb08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78054087161dee567cadbb4b4b96fb08">RCC_CR_HSICAL_1</a>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga78054087161dee567cadbb4b4b96fb08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab0c4bac85beb7de5916897f88150dc3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0c4bac85beb7de5916897f88150dc3f">RCC_CR_HSICAL_2</a>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gab0c4bac85beb7de5916897f88150dc3f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga03f71cd53f075e9d35fcbfe7ed3f6e12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03f71cd53f075e9d35fcbfe7ed3f6e12">RCC_CR_HSICAL_3</a>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga03f71cd53f075e9d35fcbfe7ed3f6e12"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf26eb00e1872a3754f200a3c32019e50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf26eb00e1872a3754f200a3c32019e50">RCC_CR_HSICAL_4</a>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaf26eb00e1872a3754f200a3c32019e50"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4c5b733061a3c4c6d69a7a15cbcb0b87"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c5b733061a3c4c6d69a7a15cbcb0b87">RCC_CR_HSICAL_5</a>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga4c5b733061a3c4c6d69a7a15cbcb0b87"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee2d6b30ee4bf41d2b171adf273a6ee7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaee2d6b30ee4bf41d2b171adf273a6ee7">RCC_CR_HSICAL_6</a>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaee2d6b30ee4bf41d2b171adf273a6ee7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab42d5e412867df093ec2ea4b8dc2bf29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab42d5e412867df093ec2ea4b8dc2bf29">RCC_CR_HSICAL_7</a>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gab42d5e412867df093ec2ea4b8dc2bf29"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb8228c9020595b4cf9995137b8c9a7d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadb8228c9020595b4cf9995137b8c9a7d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSEON</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gadb8228c9020595b4cf9995137b8c9a7d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86a34e00182c83409d89ff566cb02cc4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86a34e00182c83409d89ff566cb02cc4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSERDY</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga86a34e00182c83409d89ff566cb02cc4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa3288090671af5a959aae4d7f7696d55"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa3288090671af5a959aae4d7f7696d55"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_HSEBYP</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gaa3288090671af5a959aae4d7f7696d55"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacc05308869ad055e1e6f2c32d738aecd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacc05308869ad055e1e6f2c32d738aecd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_CSSON</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gacc05308869ad055e1e6f2c32d738aecd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad0e73d5b0a4883e074d40029b49ee47e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0e73d5b0a4883e074d40029b49ee47e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLON</b>   ((uint32_t)0x01000000)</td></tr>
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||
<tr class="separator:gad0e73d5b0a4883e074d40029b49ee47e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafa12d7ac6a7f0f91d066aeb2c6071888"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafa12d7ac6a7f0f91d066aeb2c6071888"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLRDY</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:gafa12d7ac6a7f0f91d066aeb2c6071888"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3ccb8964b640530f1080f9ea549d8133"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3ccb8964b640530f1080f9ea549d8133"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLI2SON</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga3ccb8964b640530f1080f9ea549d8133"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7354703f289244a71753debf3ae26e46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7354703f289244a71753debf3ae26e46"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLI2SRDY</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga7354703f289244a71753debf3ae26e46"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe6e58efc5730641fd3282ba749e4d1b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe6e58efc5730641fd3282ba749e4d1b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLSAION</b>   ((uint32_t)0x10000000)</td></tr>
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||
<tr class="separator:gafe6e58efc5730641fd3282ba749e4d1b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab57d64642fb17fa0f3d90db47c7fb95d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab57d64642fb17fa0f3d90db47c7fb95d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CR_PLLSAIRDY</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gab57d64642fb17fa0f3d90db47c7fb95d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a42e8b9ee60126976d9be056e5e66b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a42e8b9ee60126976d9be056e5e66b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM</b>   ((uint32_t)0x0000003F)</td></tr>
|
||
<tr class="separator:ga9a42e8b9ee60126976d9be056e5e66b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga813e3d6b41b4338ae5aea47a2bdbab01"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga813e3d6b41b4338ae5aea47a2bdbab01"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga813e3d6b41b4338ae5aea47a2bdbab01"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga84ae6e7405926717249a9852acda1f10"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84ae6e7405926717249a9852acda1f10"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga84ae6e7405926717249a9852acda1f10"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga989f5ea1ac0275a2c15bf09408c8a4c6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga989f5ea1ac0275a2c15bf09408c8a4c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_2</b>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:ga9cdeab6a08889692656228ab1186e28c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9cdeab6a08889692656228ab1186e28c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_3</b>   ((uint32_t)0x00000008)</td></tr>
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<tr class="memitem:ga20af5f07ceef21b957db9391fd8bd898"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga20af5f07ceef21b957db9391fd8bd898"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_4</b>   ((uint32_t)0x00000010)</td></tr>
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<tr class="memitem:ga195dfe1b9b158aa00996867bebd9c225"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga195dfe1b9b158aa00996867bebd9c225"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLM_5</b>   ((uint32_t)0x00000020)</td></tr>
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<tr class="memitem:ga4b571901d7cdc93ca1ecc1531f26ba6a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b571901d7cdc93ca1ecc1531f26ba6a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN</b>   ((uint32_t)0x00007FC0)</td></tr>
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<tr class="separator:ga4b571901d7cdc93ca1ecc1531f26ba6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade84dfb497ed82c0cbbc40049ef3da2c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gade84dfb497ed82c0cbbc40049ef3da2c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_0</b>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:gad54b80f8edb3a1f34d390382580edaf3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad54b80f8edb3a1f34d390382580edaf3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_1</b>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gad54b80f8edb3a1f34d390382580edaf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c165a47d134f31f9dff12d1e6f709f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c165a47d134f31f9dff12d1e6f709f3"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_2</b>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga6c165a47d134f31f9dff12d1e6f709f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b19e3e1f2dbe4c2327ebee7e9647365"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5b19e3e1f2dbe4c2327ebee7e9647365"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_3</b>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga5b19e3e1f2dbe4c2327ebee7e9647365"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaeb4707942496f45d3cf85acfdeb37475"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb4707942496f45d3cf85acfdeb37475"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_4</b>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gaeb4707942496f45d3cf85acfdeb37475"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaefb9ac3678faab95ddc7d42b2316b8ab"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaefb9ac3678faab95ddc7d42b2316b8ab"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_5</b>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gaefb9ac3678faab95ddc7d42b2316b8ab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaddfba8f0f4b9b772986a0d214dcced39"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaddfba8f0f4b9b772986a0d214dcced39"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_6</b>   ((uint32_t)0x00001000)</td></tr>
|
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<tr class="separator:gaddfba8f0f4b9b772986a0d214dcced39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0df4b12cec2263d6acec32015035fe54"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0df4b12cec2263d6acec32015035fe54"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_7</b>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga0df4b12cec2263d6acec32015035fe54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaff473b6dc417ef6fa361017b2f107c06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff473b6dc417ef6fa361017b2f107c06"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLN_8</b>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gaff473b6dc417ef6fa361017b2f107c06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2561745be271ee828e26de601f72162d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2561745be271ee828e26de601f72162d"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLP</b>   ((uint32_t)0x00030000)</td></tr>
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<tr class="separator:ga2561745be271ee828e26de601f72162d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga46e5cb0fc1122e12425c26b5ed91bcfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46e5cb0fc1122e12425c26b5ed91bcfd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLP_0</b>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga46e5cb0fc1122e12425c26b5ed91bcfd"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaba4ddc9eb3b629852127551eeae77f73"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba4ddc9eb3b629852127551eeae77f73"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLP_1</b>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gaba4ddc9eb3b629852127551eeae77f73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga92cb53ea81d2c47537eb217cc6659a2e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92cb53ea81d2c47537eb217cc6659a2e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLSRC</b>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:ga92cb53ea81d2c47537eb217cc6659a2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3a86c3918526efe2258ecbb34b91587"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae3a86c3918526efe2258ecbb34b91587"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLSRC_HSE</b>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gae3a86c3918526efe2258ecbb34b91587"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gadf688c4f038f29247cc0280dbdda24a7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf688c4f038f29247cc0280dbdda24a7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLSRC_HSI</b>   ((uint32_t)0x00000000)</td></tr>
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<tr class="separator:gadf688c4f038f29247cc0280dbdda24a7"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga546495f69f570cb4b81d4a59054c7ed1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga546495f69f570cb4b81d4a59054c7ed1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLQ</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga546495f69f570cb4b81d4a59054c7ed1"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga56fe140a22f66d2dd7250bb1f39ab451"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56fe140a22f66d2dd7250bb1f39ab451"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLQ_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga56fe140a22f66d2dd7250bb1f39ab451"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga7703def670b8ef3ec634f8f09a56ce00"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7703def670b8ef3ec634f8f09a56ce00"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLQ_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga7703def670b8ef3ec634f8f09a56ce00"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga45ab5c1d1a26d34915a53de7013f6cf6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga45ab5c1d1a26d34915a53de7013f6cf6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLQ_2</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga45ab5c1d1a26d34915a53de7013f6cf6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga182a9e6e5d5e1c63a1d20daf9b1874b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga182a9e6e5d5e1c63a1d20daf9b1874b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLCFGR_PLLQ_3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga182a9e6e5d5e1c63a1d20daf9b1874b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0eea5e5f7743a7e8995b8beeb18355c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0eea5e5f7743a7e8995b8beeb18355c1">RCC_CFGR_SW</a>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga0eea5e5f7743a7e8995b8beeb18355c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga99f08d86fd41824058a7fdf817f7e2fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99f08d86fd41824058a7fdf817f7e2fd">RCC_CFGR_SW_0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga99f08d86fd41824058a7fdf817f7e2fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga72d51cb5d66ee1aa4d2c6f14796a072f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga72d51cb5d66ee1aa4d2c6f14796a072f">RCC_CFGR_SW_1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga72d51cb5d66ee1aa4d2c6f14796a072f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacbac8bae4f0808b3c3a5185aa10081fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacbac8bae4f0808b3c3a5185aa10081fb">RCC_CFGR_SW_HSI</a>   ((uint32_t)0x00000000)</td></tr>
|
||
<tr class="separator:gacbac8bae4f0808b3c3a5185aa10081fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb563f217242d969f4355d0818fde705"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb563f217242d969f4355d0818fde705">RCC_CFGR_SW_HSE</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gafb563f217242d969f4355d0818fde705"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga87389cacb2eaf53730da13a2a33cd487"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga87389cacb2eaf53730da13a2a33cd487">RCC_CFGR_SW_PLL</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga87389cacb2eaf53730da13a2a33cd487"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga15bf2269500dc97e137315f44aa015c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15bf2269500dc97e137315f44aa015c9">RCC_CFGR_SWS</a>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:ga15bf2269500dc97e137315f44aa015c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1eae59112c51def51979e31e8695b39f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1eae59112c51def51979e31e8695b39f">RCC_CFGR_SWS_0</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga1eae59112c51def51979e31e8695b39f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaad3a5718999d7259f216137a23c2a379"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad3a5718999d7259f216137a23c2a379">RCC_CFGR_SWS_1</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaad3a5718999d7259f216137a23c2a379"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6764639cf221e1ebc0b5448dcaed590a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6764639cf221e1ebc0b5448dcaed590a">RCC_CFGR_SWS_HSI</a>   ((uint32_t)0x00000000)</td></tr>
|
||
<tr class="separator:ga6764639cf221e1ebc0b5448dcaed590a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae09a0202f441c1a43e69c62331d50a08"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae09a0202f441c1a43e69c62331d50a08">RCC_CFGR_SWS_HSE</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gae09a0202f441c1a43e69c62331d50a08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2c67e2279804a83ef24438267d9d4a6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c67e2279804a83ef24438267d9d4a6c">RCC_CFGR_SWS_PLL</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga2c67e2279804a83ef24438267d9d4a6c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe10e66938644ee8054a2426ff23efea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe10e66938644ee8054a2426ff23efea">RCC_CFGR_HPRE</a>   ((uint32_t)0x000000F0)</td></tr>
|
||
<tr class="separator:gafe10e66938644ee8054a2426ff23efea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga88ece6ca270b3ecf6f63bf20893bc172"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga88ece6ca270b3ecf6f63bf20893bc172">RCC_CFGR_HPRE_0</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga88ece6ca270b3ecf6f63bf20893bc172"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacbdd3a02814178ba02b8ebbaccd91599"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacbdd3a02814178ba02b8ebbaccd91599">RCC_CFGR_HPRE_1</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gacbdd3a02814178ba02b8ebbaccd91599"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadac734bddb507eed4a62a0af4cef74a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadac734bddb507eed4a62a0af4cef74a3">RCC_CFGR_HPRE_2</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gadac734bddb507eed4a62a0af4cef74a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a1180512cc5f3dde7895040a9037286"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a1180512cc5f3dde7895040a9037286">RCC_CFGR_HPRE_3</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga5a1180512cc5f3dde7895040a9037286"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b7d7f29b09a49c31404fc0d44645c84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b7d7f29b09a49c31404fc0d44645c84">RCC_CFGR_HPRE_DIV1</a>   ((uint32_t)0x00000000)</td></tr>
|
||
<tr class="separator:ga2b7d7f29b09a49c31404fc0d44645c84"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa9eeb5e38e53e79b08a4ac438497ebea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa9eeb5e38e53e79b08a4ac438497ebea">RCC_CFGR_HPRE_DIV2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaa9eeb5e38e53e79b08a4ac438497ebea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffe860867ae4b1b6d28473ded1546d91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffe860867ae4b1b6d28473ded1546d91">RCC_CFGR_HPRE_DIV4</a>   ((uint32_t)0x00000090)</td></tr>
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<tr class="separator:gaffe860867ae4b1b6d28473ded1546d91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaca71d6b42bdb83b5ff5320578869a058"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaca71d6b42bdb83b5ff5320578869a058">RCC_CFGR_HPRE_DIV8</a>   ((uint32_t)0x000000A0)</td></tr>
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<tr class="separator:gaca71d6b42bdb83b5ff5320578869a058"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3806da4f1afc9e5be0fca001c8c57815"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3806da4f1afc9e5be0fca001c8c57815">RCC_CFGR_HPRE_DIV16</a>   ((uint32_t)0x000000B0)</td></tr>
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<tr class="separator:ga3806da4f1afc9e5be0fca001c8c57815"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1caeba8dc2b4c0bb11be600e983e3370"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1caeba8dc2b4c0bb11be600e983e3370">RCC_CFGR_HPRE_DIV64</a>   ((uint32_t)0x000000C0)</td></tr>
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<tr class="separator:ga1caeba8dc2b4c0bb11be600e983e3370"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga280da821f0da1bec1f4c0e132ddf8eab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga280da821f0da1bec1f4c0e132ddf8eab">RCC_CFGR_HPRE_DIV128</a>   ((uint32_t)0x000000D0)</td></tr>
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<tr class="separator:ga280da821f0da1bec1f4c0e132ddf8eab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga089930cedd5b2cb201e717438f29d25b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga089930cedd5b2cb201e717438f29d25b">RCC_CFGR_HPRE_DIV256</a>   ((uint32_t)0x000000E0)</td></tr>
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<tr class="separator:ga089930cedd5b2cb201e717438f29d25b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae5088dcbaefc55d4b6693e9b1e595ed0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5088dcbaefc55d4b6693e9b1e595ed0">RCC_CFGR_HPRE_DIV512</a>   ((uint32_t)0x000000F0)</td></tr>
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<tr class="separator:gae5088dcbaefc55d4b6693e9b1e595ed0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga50b2423a5fea74a47b9eb8ab51869412"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga50b2423a5fea74a47b9eb8ab51869412">RCC_CFGR_PPRE1</a>   ((uint32_t)0x00001C00)</td></tr>
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<tr class="separator:ga50b2423a5fea74a47b9eb8ab51869412"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d37c20686faa340a77021117f5908b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d37c20686faa340a77021117f5908b7">RCC_CFGR_PPRE1_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga2d37c20686faa340a77021117f5908b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad41049f8a28fdced6bb4d9267845ffa2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad41049f8a28fdced6bb4d9267845ffa2">RCC_CFGR_PPRE1_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gad41049f8a28fdced6bb4d9267845ffa2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5fcb524f6ca203ddff1862c124d4f89f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fcb524f6ca203ddff1862c124d4f89f">RCC_CFGR_PPRE1_2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga5fcb524f6ca203ddff1862c124d4f89f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8f6562bb2ecf65055a2f42cbb48ef11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8f6562bb2ecf65055a2f42cbb48ef11">RCC_CFGR_PPRE1_DIV1</a>   ((uint32_t)0x00000000)</td></tr>
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<tr class="separator:gac8f6562bb2ecf65055a2f42cbb48ef11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf832ad6844c907d9bb37c1536defcb0d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf832ad6844c907d9bb37c1536defcb0d">RCC_CFGR_PPRE1_DIV2</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:gaf832ad6844c907d9bb37c1536defcb0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0e340725f46e9462d9b02a079b9fa8ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e340725f46e9462d9b02a079b9fa8ae">RCC_CFGR_PPRE1_DIV4</a>   ((uint32_t)0x00001400)</td></tr>
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<tr class="separator:ga0e340725f46e9462d9b02a079b9fa8ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ddd6d657837e1971bb86e3bf1c15e72"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ddd6d657837e1971bb86e3bf1c15e72">RCC_CFGR_PPRE1_DIV8</a>   ((uint32_t)0x00001800)</td></tr>
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<tr class="separator:ga9ddd6d657837e1971bb86e3bf1c15e72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c38ba326bde7c7a18c4f7f2aacf823f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c38ba326bde7c7a18c4f7f2aacf823f">RCC_CFGR_PPRE1_DIV16</a>   ((uint32_t)0x00001C00)</td></tr>
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<tr class="separator:ga5c38ba326bde7c7a18c4f7f2aacf823f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad61bd4f9f345ba41806813b0bfff1311"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad61bd4f9f345ba41806813b0bfff1311">RCC_CFGR_PPRE2</a>   ((uint32_t)0x0000E000)</td></tr>
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<tr class="separator:gad61bd4f9f345ba41806813b0bfff1311"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82ca63155494ed59eb5e34bec1e5f4e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga82ca63155494ed59eb5e34bec1e5f4e9">RCC_CFGR_PPRE2_0</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga82ca63155494ed59eb5e34bec1e5f4e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdb19c9e76fe8e8a7c991714c92e937f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdb19c9e76fe8e8a7c991714c92e937f">RCC_CFGR_PPRE2_1</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gafdb19c9e76fe8e8a7c991714c92e937f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9adc802687eab5b6ece99a20793219db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9adc802687eab5b6ece99a20793219db">RCC_CFGR_PPRE2_2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga9adc802687eab5b6ece99a20793219db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga247aebf1999a38ea07785558d277bb1a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga247aebf1999a38ea07785558d277bb1a">RCC_CFGR_PPRE2_DIV1</a>   ((uint32_t)0x00000000)</td></tr>
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<tr class="separator:ga247aebf1999a38ea07785558d277bb1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99d9c91eaad122460d324a71cc939d1b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99d9c91eaad122460d324a71cc939d1b">RCC_CFGR_PPRE2_DIV2</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga99d9c91eaad122460d324a71cc939d1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4340fc3fc52eca36eb302959fbecb715"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4340fc3fc52eca36eb302959fbecb715">RCC_CFGR_PPRE2_DIV4</a>   ((uint32_t)0x0000A000)</td></tr>
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<tr class="separator:ga4340fc3fc52eca36eb302959fbecb715"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga412b382a1134e0ee5614e0f4bcf97552"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga412b382a1134e0ee5614e0f4bcf97552">RCC_CFGR_PPRE2_DIV8</a>   ((uint32_t)0x0000C000)</td></tr>
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<tr class="separator:ga412b382a1134e0ee5614e0f4bcf97552"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaece3ee58d4138f7452733bfa1ad37eb9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaece3ee58d4138f7452733bfa1ad37eb9">RCC_CFGR_PPRE2_DIV16</a>   ((uint32_t)0x0000E000)</td></tr>
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<tr class="separator:gaece3ee58d4138f7452733bfa1ad37eb9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7c067c52ecd135252c691aad32c0b83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7c067c52ecd135252c691aad32c0b83"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_RTCPRE</b>   ((uint32_t)0x001F0000)</td></tr>
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<tr class="separator:gad7c067c52ecd135252c691aad32c0b83"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga702f887571365eeb42d74b9b9cc6fe0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga702f887571365eeb42d74b9b9cc6fe0d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_RTCPRE_0</b>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga702f887571365eeb42d74b9b9cc6fe0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1191ba4a2e089f9921d77be57394dec4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1191ba4a2e089f9921d77be57394dec4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_RTCPRE_1</b>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga1191ba4a2e089f9921d77be57394dec4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae62885f29418cc83a57964fe631282cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae62885f29418cc83a57964fe631282cb"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_RTCPRE_2</b>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:gae62885f29418cc83a57964fe631282cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c703b8d9827f58e7ea783c6a9b74e41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c703b8d9827f58e7ea783c6a9b74e41"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_RTCPRE_3</b>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga9c703b8d9827f58e7ea783c6a9b74e41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga02b93e5154259a1a201bbb9c9b903c0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga02b93e5154259a1a201bbb9c9b903c0a">RCC_CFGR_RTCPRE_4</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga02b93e5154259a1a201bbb9c9b903c0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26eb4a66eeff0ba17e9d2a06cf937ca4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga26eb4a66eeff0ba17e9d2a06cf937ca4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1</b>   ((uint32_t)0x00600000)</td></tr>
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<tr class="separator:ga26eb4a66eeff0ba17e9d2a06cf937ca4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe73b3ad484eeecfa1556021677ecf4a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe73b3ad484eeecfa1556021677ecf4a"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1_0</b>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gafe73b3ad484eeecfa1556021677ecf4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c7e8d1da534f052ce835f06227a9b7a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1c7e8d1da534f052ce835f06227a9b7a"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1_1</b>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga1c7e8d1da534f052ce835f06227a9b7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d43413fd6b17bd988ccae9e34296412"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d43413fd6b17bd988ccae9e34296412"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_I2SSRC</b>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga5d43413fd6b17bd988ccae9e34296412"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23171ca70972a106109a6e0804385ec5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga23171ca70972a106109a6e0804385ec5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1PRE</b>   ((uint32_t)0x07000000)</td></tr>
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<tr class="separator:ga23171ca70972a106109a6e0804385ec5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8007a9d6ee3fd88912aaf290746ae0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8007a9d6ee3fd88912aaf290746ae0e"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1PRE_0</b>   ((uint32_t)0x01000000)</td></tr>
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<tr class="separator:gac8007a9d6ee3fd88912aaf290746ae0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf7c1280f61d56b4897f9c876987e092"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf7c1280f61d56b4897f9c876987e092"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1PRE_1</b>   ((uint32_t)0x02000000)</td></tr>
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<tr class="separator:gaaf7c1280f61d56b4897f9c876987e092"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11e1d10d1b55e0d88d24212ea2c8ba6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga11e1d10d1b55e0d88d24212ea2c8ba6e"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO1PRE_2</b>   ((uint32_t)0x04000000)</td></tr>
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<tr class="separator:ga11e1d10d1b55e0d88d24212ea2c8ba6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae387252f29b6f98cc1fffc4fa0719b6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae387252f29b6f98cc1fffc4fa0719b6e"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2PRE</b>   ((uint32_t)0x38000000)</td></tr>
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<tr class="separator:gae387252f29b6f98cc1fffc4fa0719b6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83dfcd5a1ce89869c82723f7eb9223ed"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga83dfcd5a1ce89869c82723f7eb9223ed"></a>
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||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2PRE_0</b>   ((uint32_t)0x08000000)</td></tr>
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<tr class="separator:ga83dfcd5a1ce89869c82723f7eb9223ed"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0e8d7cb746efc7511fa97ddfef2df793"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e8d7cb746efc7511fa97ddfef2df793"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2PRE_1</b>   ((uint32_t)0x10000000)</td></tr>
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<tr class="separator:ga0e8d7cb746efc7511fa97ddfef2df793"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8773dfae91e6576d490fbee4aa2a639"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8773dfae91e6576d490fbee4aa2a639"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2PRE_2</b>   ((uint32_t)0x20000000)</td></tr>
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<tr class="separator:gac8773dfae91e6576d490fbee4aa2a639"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga022248a1167714f4d847b89243dc5244"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga022248a1167714f4d847b89243dc5244"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2</b>   ((uint32_t)0xC0000000)</td></tr>
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<tr class="separator:ga022248a1167714f4d847b89243dc5244"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga203156a3f57e2c4498999c7901e0defd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga203156a3f57e2c4498999c7901e0defd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2_0</b>   ((uint32_t)0x40000000)</td></tr>
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<tr class="separator:ga203156a3f57e2c4498999c7901e0defd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2fdba9682ff474255248f84e6851932a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fdba9682ff474255248f84e6851932a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CFGR_MCO2_1</b>   ((uint32_t)0x80000000)</td></tr>
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<tr class="separator:ga2fdba9682ff474255248f84e6851932a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb94ccfe6a212f020e732d1dd787a6fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacb94ccfe6a212f020e732d1dd787a6fb"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSIRDYF</b>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gacb94ccfe6a212f020e732d1dd787a6fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabfc100e7ae673dfcec7be79af0d91dfe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabfc100e7ae673dfcec7be79af0d91dfe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSERDYF</b>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gabfc100e7ae673dfcec7be79af0d91dfe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad38877547c4cbbb94659d5726f377163"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad38877547c4cbbb94659d5726f377163"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSIRDYF</b>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gad38877547c4cbbb94659d5726f377163"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11ea196450aac9ac35e283a66afc3da6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga11ea196450aac9ac35e283a66afc3da6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSERDYF</b>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga11ea196450aac9ac35e283a66afc3da6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0f007895a17e668f22f7b8b24ca90aec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0f007895a17e668f22f7b8b24ca90aec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLRDYF</b>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga0f007895a17e668f22f7b8b24ca90aec"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad338d8663c078cf3d73e4bfaa44da093"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad338d8663c078cf3d73e4bfaa44da093"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLI2SRDYF</b>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gad338d8663c078cf3d73e4bfaa44da093"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga33085822ed319bf2549742043e56f55f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33085822ed319bf2549742043e56f55f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLSAIRDYF</b>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga33085822ed319bf2549742043e56f55f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad66b719e4061294de35af58cc27aba7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad66b719e4061294de35af58cc27aba7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_CSSF</b>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gad66b719e4061294de35af58cc27aba7f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga872ba937149a7372138df06f8188ab56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga872ba937149a7372138df06f8188ab56"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSIRDYIE</b>   ((uint32_t)0x00000100)</td></tr>
|
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<tr class="separator:ga872ba937149a7372138df06f8188ab56"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6a0ad2672c9ba1b26012cbc6d423dff8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a0ad2672c9ba1b26012cbc6d423dff8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSERDYIE</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga6a0ad2672c9ba1b26012cbc6d423dff8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac714351a6f9dab4741354fb017638580"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac714351a6f9dab4741354fb017638580"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSIRDYIE</b>   ((uint32_t)0x00000400)</td></tr>
|
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<tr class="separator:gac714351a6f9dab4741354fb017638580"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga5492f9b58600cf66616eb931b48b3c11"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5492f9b58600cf66616eb931b48b3c11"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSERDYIE</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga5492f9b58600cf66616eb931b48b3c11"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1b70927cab2ba9cf82d1620cf88b0f95"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1b70927cab2ba9cf82d1620cf88b0f95"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLRDYIE</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga1b70927cab2ba9cf82d1620cf88b0f95"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1ca3cbf69c7cce53e974316dbf38d3dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1ca3cbf69c7cce53e974316dbf38d3dc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLI2SRDYIE</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga1ca3cbf69c7cce53e974316dbf38d3dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaea7017a347f40972bc457594991a5470"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaea7017a347f40972bc457594991a5470"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLSAIRDYIE</b>   ((uint32_t)0x00004000)</td></tr>
|
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<tr class="separator:gaea7017a347f40972bc457594991a5470"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga982989563f1a95c89bf7f4a25d99f704"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga982989563f1a95c89bf7f4a25d99f704"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSIRDYC</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga982989563f1a95c89bf7f4a25d99f704"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga144b5147f3a8d0bfda04618e301986aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga144b5147f3a8d0bfda04618e301986aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_LSERDYC</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga144b5147f3a8d0bfda04618e301986aa"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad1b58377908e5c31a684747d0a80ecb2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad1b58377908e5c31a684747d0a80ecb2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSIRDYC</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gad1b58377908e5c31a684747d0a80ecb2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9464e8188d717902990b467a9396d238"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9464e8188d717902990b467a9396d238"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_HSERDYC</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga9464e8188d717902990b467a9396d238"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga245af864b194f0c2b2389ea1ee49a396"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga245af864b194f0c2b2389ea1ee49a396"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLRDYC</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga245af864b194f0c2b2389ea1ee49a396"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga73e79cc7236f5f76cb97c8012771e6bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73e79cc7236f5f76cb97c8012771e6bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLI2SRDYC</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga73e79cc7236f5f76cb97c8012771e6bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga425b11a624411ace33a1884128175f4f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga425b11a624411ace33a1884128175f4f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_PLLSAIRDYC</b>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:ga425b11a624411ace33a1884128175f4f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga46edb2b9568f002feba7b4312ed92c1f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46edb2b9568f002feba7b4312ed92c1f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CIR_CSSC</b>   ((uint32_t)0x00800000)</td></tr>
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||
<tr class="separator:ga46edb2b9568f002feba7b4312ed92c1f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6c171937e46c2b9a58f16ee82010509e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c171937e46c2b9a58f16ee82010509e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOARST</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga6c171937e46c2b9a58f16ee82010509e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga8e60d32cb67768339fc47a2ba11b7a97"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8e60d32cb67768339fc47a2ba11b7a97"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOBRST</b>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga8e60d32cb67768339fc47a2ba11b7a97"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga8d02a09e1dafda744c7b27dca99fa3ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d02a09e1dafda744c7b27dca99fa3ef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOCRST</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga8d02a09e1dafda744c7b27dca99fa3ef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad16f3ce75bba03d8de4f5bc89c561337"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad16f3ce75bba03d8de4f5bc89c561337"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIODRST</b>   ((uint32_t)0x00000008)</td></tr>
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||
<tr class="separator:gad16f3ce75bba03d8de4f5bc89c561337"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad9baeb0fd247300501274a9259a4b184"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9baeb0fd247300501274a9259a4b184"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOERST</b>   ((uint32_t)0x00000010)</td></tr>
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||
<tr class="separator:gad9baeb0fd247300501274a9259a4b184"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gab00b21dc4408295d374a4970ea5ae751"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab00b21dc4408295d374a4970ea5ae751"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOFRST</b>   ((uint32_t)0x00000020)</td></tr>
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||
<tr class="separator:gab00b21dc4408295d374a4970ea5ae751"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50322b0db25b2204aa114c4c29847051"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50322b0db25b2204aa114c4c29847051"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOGRST</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga50322b0db25b2204aa114c4c29847051"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga587e3e32701cbd127d2afb19b9bff5fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga587e3e32701cbd127d2afb19b9bff5fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOHRST</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga587e3e32701cbd127d2afb19b9bff5fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab5180658a02a87b501ab3f250593905b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5180658a02a87b501ab3f250593905b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOIRST</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gab5180658a02a87b501ab3f250593905b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac7fbf13bedd2885311c00811bbfbf2fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7fbf13bedd2885311c00811bbfbf2fa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOJRST</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gac7fbf13bedd2885311c00811bbfbf2fa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac47d8007c0dd310682062de13518751b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac47d8007c0dd310682062de13518751b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_GPIOKRST</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gac47d8007c0dd310682062de13518751b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga94f45f591e5e217833c6ab36a958543b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga94f45f591e5e217833c6ab36a958543b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_CRCRST</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga94f45f591e5e217833c6ab36a958543b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4d1655ddfb777fce28b1d6b9a9c2d0e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4d1655ddfb777fce28b1d6b9a9c2d0e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_DMA1RST</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga4d1655ddfb777fce28b1d6b9a9c2d0e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga827aea44c35a0c3eb815a5d7d8546c7b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga827aea44c35a0c3eb815a5d7d8546c7b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_DMA2RST</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga827aea44c35a0c3eb815a5d7d8546c7b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga25aa9e4bf01883c7fbc224b925ee4fc7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25aa9e4bf01883c7fbc224b925ee4fc7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_DMA2DRST</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga25aa9e4bf01883c7fbc224b925ee4fc7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e1dca7f08a971d2c3bf39a928c49586"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e1dca7f08a971d2c3bf39a928c49586"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_ETHMACRST</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga1e1dca7f08a971d2c3bf39a928c49586"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga236682929d2641e851f175ab3aa1f520"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga236682929d2641e851f175ab3aa1f520"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1RSTR_OTGHRST</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga236682929d2641e851f175ab3aa1f520"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae909f90338c129e116b7d49bebfb31c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae909f90338c129e116b7d49bebfb31c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_DCMIRST</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gae909f90338c129e116b7d49bebfb31c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d6e7104329464a06beff679cc6988f8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d6e7104329464a06beff679cc6988f8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_CRYPRST</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga0d6e7104329464a06beff679cc6988f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga76abe5748945ac7fdcb1b7803156e9d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga76abe5748945ac7fdcb1b7803156e9d0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_HASHRST</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga76abe5748945ac7fdcb1b7803156e9d0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga002b712908eb99e0292afe35687773e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga002b712908eb99e0292afe35687773e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_HSAHRST</b>   RCC_AHB2RSTR_HASHRST</td></tr>
|
||
<tr class="separator:ga002b712908eb99e0292afe35687773e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gace46c6461c8b4ddd78510bc2c529c91b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gace46c6461c8b4ddd78510bc2c529c91b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_RNGRST</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gace46c6461c8b4ddd78510bc2c529c91b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae1b8b894a2f1ea24b4799c7a30abbb5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae1b8b894a2f1ea24b4799c7a30abbb5a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2RSTR_OTGFSRST</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gae1b8b894a2f1ea24b4799c7a30abbb5a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga915aa42b819649f5ee7abdf5319d6bb8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga915aa42b819649f5ee7abdf5319d6bb8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB3RSTR_FSMCRST</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga915aa42b819649f5ee7abdf5319d6bb8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51ca4659706d0e00333d4abff049dc0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51ca4659706d0e00333d4abff049dc0d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM2RST</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga51ca4659706d0e00333d4abff049dc0d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8680c562fd372b494a160594525d7ce9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8680c562fd372b494a160594525d7ce9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM3RST</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga8680c562fd372b494a160594525d7ce9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6a720364de988965b6d2f91ed6519570"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a720364de988965b6d2f91ed6519570"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM4RST</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga6a720364de988965b6d2f91ed6519570"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1d1233dd5266ba55d9951e3b1a334552"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1d1233dd5266ba55d9951e3b1a334552"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM5RST</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga1d1233dd5266ba55d9951e3b1a334552"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8d64bd82cf47a209afebc7d663e28383"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d64bd82cf47a209afebc7d663e28383"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM6RST</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga8d64bd82cf47a209afebc7d663e28383"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40b1d355ee76ad9a044ad37f1629e760"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40b1d355ee76ad9a044ad37f1629e760"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM7RST</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga40b1d355ee76ad9a044ad37f1629e760"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga067deb756dd4100c901c6b25229678e4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga067deb756dd4100c901c6b25229678e4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM12RST</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga067deb756dd4100c901c6b25229678e4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad59f66b35bdc0953428eb8c345397a7f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad59f66b35bdc0953428eb8c345397a7f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM13RST</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gad59f66b35bdc0953428eb8c345397a7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga773e6d5b419eb2d4b6291c862e04b002"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga773e6d5b419eb2d4b6291c862e04b002"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_TIM14RST</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga773e6d5b419eb2d4b6291c862e04b002"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0d2591ac0655a8798f4c16cef97e6f94"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d2591ac0655a8798f4c16cef97e6f94"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_WWDGRST</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga0d2591ac0655a8798f4c16cef97e6f94"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0a6289a35547cf0d5300706f9baa18ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0a6289a35547cf0d5300706f9baa18ea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_SPI2RST</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga0a6289a35547cf0d5300706f9baa18ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga261e0f1b39cd1cab41ec6bf40c21867b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga261e0f1b39cd1cab41ec6bf40c21867b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_SPI3RST</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga261e0f1b39cd1cab41ec6bf40c21867b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga195c39f08384ca1fa13b53a31d65d0a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga195c39f08384ca1fa13b53a31d65d0a5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_USART2RST</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga195c39f08384ca1fa13b53a31d65d0a5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga766478ebdcbb647eb3f32962543bd194"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga766478ebdcbb647eb3f32962543bd194"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_USART3RST</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga766478ebdcbb647eb3f32962543bd194"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0802e99fa9eb9388393af3135ca2cb2b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0802e99fa9eb9388393af3135ca2cb2b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_UART4RST</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga0802e99fa9eb9388393af3135ca2cb2b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e4d54359192c58725e5ece2b539f8ee"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e4d54359192c58725e5ece2b539f8ee"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_UART5RST</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga5e4d54359192c58725e5ece2b539f8ee"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadcd25346a7d7b0009090adfbca899b93"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadcd25346a7d7b0009090adfbca899b93"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_I2C1RST</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gadcd25346a7d7b0009090adfbca899b93"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga412d59407e5dad43cf8ae1ea6f8bc5c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga412d59407e5dad43cf8ae1ea6f8bc5c3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_I2C2RST</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga412d59407e5dad43cf8ae1ea6f8bc5c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8dd6bd89cdf6b6b7affee5594bda87f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8dd6bd89cdf6b6b7affee5594bda87f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_I2C3RST</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gab8dd6bd89cdf6b6b7affee5594bda87f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga23f9a8bfc02baedd992d13e489234242"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga23f9a8bfc02baedd992d13e489234242"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_CAN1RST</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga23f9a8bfc02baedd992d13e489234242"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga86b5d7042e23d54c7ecfcef2fbedad6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86b5d7042e23d54c7ecfcef2fbedad6e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_CAN2RST</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga86b5d7042e23d54c7ecfcef2fbedad6e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga274d8cb48f0e89831efabea66d64af2a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga274d8cb48f0e89831efabea66d64af2a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_PWRRST</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga274d8cb48f0e89831efabea66d64af2a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7fb9c125237cfe5b6436ca795e7f3564"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fb9c125237cfe5b6436ca795e7f3564"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_DACRST</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga7fb9c125237cfe5b6436ca795e7f3564"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae8082ea21d27919bf78784f4f5be8734"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae8082ea21d27919bf78784f4f5be8734"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_UART7RST</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:gae8082ea21d27919bf78784f4f5be8734"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6667dd4c4cd43641139966d6d455d71f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6667dd4c4cd43641139966d6d455d71f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1RSTR_UART8RST</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga6667dd4c4cd43641139966d6d455d71f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5bd060cbefaef05487963bbd6c48d7c6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5bd060cbefaef05487963bbd6c48d7c6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_TIM1RST</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga5bd060cbefaef05487963bbd6c48d7c6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa129b34dbaf6c5301f751410ab4668ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa129b34dbaf6c5301f751410ab4668ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_TIM8RST</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaa129b34dbaf6c5301f751410ab4668ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae7ae8e338b3b42ad037e9e5b6eeb2c41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae7ae8e338b3b42ad037e9e5b6eeb2c41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_USART1RST</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gae7ae8e338b3b42ad037e9e5b6eeb2c41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gada1df682293e15ed44b081d626220178"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gada1df682293e15ed44b081d626220178"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_USART6RST</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gada1df682293e15ed44b081d626220178"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1374d6eae8e7d02d1ad457b65f374a67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1374d6eae8e7d02d1ad457b65f374a67"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_ADCRST</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga1374d6eae8e7d02d1ad457b65f374a67"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga754451a96f4c4faf63a29ca1a132c64d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga754451a96f4c4faf63a29ca1a132c64d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SDIORST</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga754451a96f4c4faf63a29ca1a132c64d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga345f05d3508a9fd5128208761feb29fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga345f05d3508a9fd5128208761feb29fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SPI1RST</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga345f05d3508a9fd5128208761feb29fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6029eb5c0288f48ef8de5f88ca7c7e08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6029eb5c0288f48ef8de5f88ca7c7e08"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SPI4RST</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga6029eb5c0288f48ef8de5f88ca7c7e08"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga813d42b8d48ae6379c053a44870af49d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga813d42b8d48ae6379c053a44870af49d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SYSCFGRST</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga813d42b8d48ae6379c053a44870af49d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3aa588d4814a289d939e111492724af"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab3aa588d4814a289d939e111492724af"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_TIM9RST</b>   ((uint32_t)0x00010000)</td></tr>
|
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<tr class="separator:gab3aa588d4814a289d939e111492724af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac76155acdc99c8c6502ba3beba818f42"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac76155acdc99c8c6502ba3beba818f42"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_TIM10RST</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gac76155acdc99c8c6502ba3beba818f42"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9651c8201d42ba03bb1bf89d9d39e60c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9651c8201d42ba03bb1bf89d9d39e60c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_TIM11RST</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga9651c8201d42ba03bb1bf89d9d39e60c"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2a739f8154dffb6b14aa3338de8d2cfe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a739f8154dffb6b14aa3338de8d2cfe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SPI5RST</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga2a739f8154dffb6b14aa3338de8d2cfe"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga4e554201b98c7594e5e59e93a6dff4b8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e554201b98c7594e5e59e93a6dff4b8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SPI6RST</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga4e554201b98c7594e5e59e93a6dff4b8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad9d8a170e7d5198bcb82b35af0e38395"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9d8a170e7d5198bcb82b35af0e38395"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SAI1RST</b>   ((uint32_t)0x00400000)</td></tr>
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||
<tr class="separator:gad9d8a170e7d5198bcb82b35af0e38395"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2f3f9f5166053bfd3bd193ce9d97b4c8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2f3f9f5166053bfd3bd193ce9d97b4c8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_LTDCRST</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga2f3f9f5166053bfd3bd193ce9d97b4c8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga38f676c6c842fc9471d51a50584fbe91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38f676c6c842fc9471d51a50584fbe91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2RSTR_SPI1</b>   RCC_APB2RSTR_SPI1RST</td></tr>
|
||
<tr class="separator:ga38f676c6c842fc9471d51a50584fbe91"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6ff46fb3b30fc6792e4fd18fcb0941b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ff46fb3b30fc6792e4fd18fcb0941b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOAEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga6ff46fb3b30fc6792e4fd18fcb0941b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7f408f92e7fd49b0957b8cb4ff31ca5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7f408f92e7fd49b0957b8cb4ff31ca5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOBEN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gad7f408f92e7fd49b0957b8cb4ff31ca5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae8a8b42e33aef2a7bc2d41ad9d231733"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae8a8b42e33aef2a7bc2d41ad9d231733"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOCEN</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gae8a8b42e33aef2a7bc2d41ad9d231733"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaebd8146e91c76f14af8dfe78a1c2d916"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaebd8146e91c76f14af8dfe78a1c2d916"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIODEN</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gaebd8146e91c76f14af8dfe78a1c2d916"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67a9094e0e464eaa8e25f854f90abfc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67a9094e0e464eaa8e25f854f90abfc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOEEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga67a9094e0e464eaa8e25f854f90abfc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaefa8e0fbecedb4167a4d7ef51e2a48b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaefa8e0fbecedb4167a4d7ef51e2a48b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOFEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaefa8e0fbecedb4167a4d7ef51e2a48b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5304e897036391c916ef82258919a08b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5304e897036391c916ef82258919a08b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOGEN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga5304e897036391c916ef82258919a08b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb16afc550121895822ebb22108196b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadb16afc550121895822ebb22108196b6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOHEN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gadb16afc550121895822ebb22108196b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadee44347a6a62429ee74753fe1dea5d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadee44347a6a62429ee74753fe1dea5d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOIEN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gadee44347a6a62429ee74753fe1dea5d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41171e8e5a809e65856d4011c19f05c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41171e8e5a809e65856d4011c19f05c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOJEN</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga41171e8e5a809e65856d4011c19f05c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa96ed213c5662ddd36feb20480137979"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa96ed213c5662ddd36feb20480137979"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_GPIOKEN</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gaa96ed213c5662ddd36feb20480137979"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafa3d41f31401e812f839defee241df83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafa3d41f31401e812f839defee241df83"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_CRCEN</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gafa3d41f31401e812f839defee241df83"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee10e5e11a2043e4ff865c3d7b804233"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee10e5e11a2043e4ff865c3d7b804233"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_BKPSRAMEN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gaee10e5e11a2043e4ff865c3d7b804233"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga29bbdcc191708a9e6a46ef197a3b2c65"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga29bbdcc191708a9e6a46ef197a3b2c65"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_CCMDATARAMEN</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga29bbdcc191708a9e6a46ef197a3b2c65"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae07b00778a51a4e52b911aeccb897aba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae07b00778a51a4e52b911aeccb897aba"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_DMA1EN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gae07b00778a51a4e52b911aeccb897aba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga664a5d572a39a0c084e4ee7c1cf7df0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga664a5d572a39a0c084e4ee7c1cf7df0d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_DMA2EN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga664a5d572a39a0c084e4ee7c1cf7df0d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bef4fb42adb3343f4f22b298cb9b1fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9bef4fb42adb3343f4f22b298cb9b1fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_DMA2DEN</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga9bef4fb42adb3343f4f22b298cb9b1fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga507020c3c3945dfbf3d628ffa42afdba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga507020c3c3945dfbf3d628ffa42afdba"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_ETHMACEN</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga507020c3c3945dfbf3d628ffa42afdba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga001f617c29d950ee1aa91773331ae6f6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga001f617c29d950ee1aa91773331ae6f6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_ETHMACTXEN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga001f617c29d950ee1aa91773331ae6f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8933482a90a769d0cdd332b170132b77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8933482a90a769d0cdd332b170132b77"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_ETHMACRXEN</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga8933482a90a769d0cdd332b170132b77"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2bf11a8d105bc59e4f509d91cbf05e0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2bf11a8d105bc59e4f509d91cbf05e0e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_ETHMACPTPEN</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga2bf11a8d105bc59e4f509d91cbf05e0e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab18d15ea68876f7a42ee7350074b05f4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab18d15ea68876f7a42ee7350074b05f4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_OTGHSEN</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gab18d15ea68876f7a42ee7350074b05f4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga784be313f54862d3670723f2334fa51f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga784be313f54862d3670723f2334fa51f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1ENR_OTGHSULPIEN</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga784be313f54862d3670723f2334fa51f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe6b7edde44307072327fcae3c15c8d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe6b7edde44307072327fcae3c15c8d0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2ENR_DCMIEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gafe6b7edde44307072327fcae3c15c8d0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga82cbf1146f6135045d8c22db44ff2c12"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82cbf1146f6135045d8c22db44ff2c12"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2ENR_CRYPEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga82cbf1146f6135045d8c22db44ff2c12"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga67062297a8451ac49f18b44c974b4492"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga67062297a8451ac49f18b44c974b4492"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2ENR_HASHEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga67062297a8451ac49f18b44c974b4492"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadea5123ece7df53e695697e3a7d11a6b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadea5123ece7df53e695697e3a7d11a6b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2ENR_RNGEN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gadea5123ece7df53e695697e3a7d11a6b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga22576caeba7c7a1e6afdd0b90394c76d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga22576caeba7c7a1e6afdd0b90394c76d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2ENR_OTGFSEN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga22576caeba7c7a1e6afdd0b90394c76d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga30d723abc39a230a71760dff91bb6d7b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga30d723abc39a230a71760dff91bb6d7b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB3ENR_FSMCEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga30d723abc39a230a71760dff91bb6d7b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd3966a4d6ae47f06b3c095eaf26a610"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd3966a4d6ae47f06b3c095eaf26a610"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM2EN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gacd3966a4d6ae47f06b3c095eaf26a610"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga75bfa33eb00ee30c6e22f7ceea464ac7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga75bfa33eb00ee30c6e22f7ceea464ac7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM3EN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga75bfa33eb00ee30c6e22f7ceea464ac7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad4fbbf6b1beeec92c7d80e9e05bd1461"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4fbbf6b1beeec92c7d80e9e05bd1461"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM4EN</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad4fbbf6b1beeec92c7d80e9e05bd1461"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga49abbbc8fd297c544df2d337b28f80e4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga49abbbc8fd297c544df2d337b28f80e4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM5EN</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga49abbbc8fd297c544df2d337b28f80e4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb0279b1f0ff35c2df728d9653cabc0c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb0279b1f0ff35c2df728d9653cabc0c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM6EN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gafb0279b1f0ff35c2df728d9653cabc0c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab595fbaf4167297d8fe2825e41f41990"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab595fbaf4167297d8fe2825e41f41990"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM7EN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gab595fbaf4167297d8fe2825e41f41990"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaecd88b56485ee4ee3e406b1d6c062081"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaecd88b56485ee4ee3e406b1d6c062081"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM12EN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gaecd88b56485ee4ee3e406b1d6c062081"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a95079e68e7c76584ef0b3de371288a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a95079e68e7c76584ef0b3de371288a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM13EN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga1a95079e68e7c76584ef0b3de371288a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca040bd66d4a54d4d9e9b261c8102799"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaca040bd66d4a54d4d9e9b261c8102799"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_TIM14EN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaca040bd66d4a54d4d9e9b261c8102799"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf712b922ee776a972d2efa3da0ea4733"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf712b922ee776a972d2efa3da0ea4733"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_WWDGEN</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gaf712b922ee776a972d2efa3da0ea4733"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafdce64692c44bf95efbf2fed054e59be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafdce64692c44bf95efbf2fed054e59be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_SPI2EN</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gafdce64692c44bf95efbf2fed054e59be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8757f8d1e1ff1447e08e5abea4615083"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8757f8d1e1ff1447e08e5abea4615083"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_SPI3EN</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga8757f8d1e1ff1447e08e5abea4615083"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab840af4f735ec36419d61c7db3cfa00d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab840af4f735ec36419d61c7db3cfa00d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_USART2EN</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gab840af4f735ec36419d61c7db3cfa00d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8033e0312aea02ae7eb2d57da13e8298"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8033e0312aea02ae7eb2d57da13e8298"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_USART3EN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga8033e0312aea02ae7eb2d57da13e8298"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae6b0fe571aa29ed30389f87bdbf37b46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae6b0fe571aa29ed30389f87bdbf37b46"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_UART4EN</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gae6b0fe571aa29ed30389f87bdbf37b46"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga24a9eea153892405f53007f521efee2e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga24a9eea153892405f53007f521efee2e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_UART5EN</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga24a9eea153892405f53007f521efee2e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5ca3afe0c517702b2d1366b692c8db0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5ca3afe0c517702b2d1366b692c8db0e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_I2C1EN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga5ca3afe0c517702b2d1366b692c8db0e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd7d1c3c7dbe20aea87a694ae15840f6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd7d1c3c7dbe20aea87a694ae15840f6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_I2C2EN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gafd7d1c3c7dbe20aea87a694ae15840f6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96621806b8fb96891efa9364e370f3f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga96621806b8fb96891efa9364e370f3f7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_I2C3EN</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga96621806b8fb96891efa9364e370f3f7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga66b5172158cf0170d29091064ea63a29"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga66b5172158cf0170d29091064ea63a29"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_CAN1EN</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga66b5172158cf0170d29091064ea63a29"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae64f792b7a3401cff4d95e31d3867422"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae64f792b7a3401cff4d95e31d3867422"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_CAN2EN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gae64f792b7a3401cff4d95e31d3867422"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5c19997ccd28464b80a7c3325da0ca60"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5c19997ccd28464b80a7c3325da0ca60"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_PWREN</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga5c19997ccd28464b80a7c3325da0ca60"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga087968e2786321fb8645c46b22eea132"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga087968e2786321fb8645c46b22eea132"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_DACEN</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga087968e2786321fb8645c46b22eea132"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b7a022fda0cc030a4450f16243711eb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0b7a022fda0cc030a4450f16243711eb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_UART7EN</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga0b7a022fda0cc030a4450f16243711eb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6c2f21176461a0d7c96fc6d80bee4b02"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c2f21176461a0d7c96fc6d80bee4b02"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1ENR_UART8EN</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga6c2f21176461a0d7c96fc6d80bee4b02"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga25852ad4ebc09edc724814de967816bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25852ad4ebc09edc724814de967816bc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_TIM1EN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga25852ad4ebc09edc724814de967816bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3669393b3538bc4543184d4bccd0b292"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3669393b3538bc4543184d4bccd0b292"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_TIM8EN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga3669393b3538bc4543184d4bccd0b292"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4666bb90842e8134b32e6a34a0f165f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4666bb90842e8134b32e6a34a0f165f3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_USART1EN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga4666bb90842e8134b32e6a34a0f165f3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0569d91f3b18ae130b7a09e0100c4459"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0569d91f3b18ae130b7a09e0100c4459"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_USART6EN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga0569d91f3b18ae130b7a09e0100c4459"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga57b9f50cb96a2e4ceba37728b4a32a42"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga57b9f50cb96a2e4ceba37728b4a32a42"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_ADC1EN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga57b9f50cb96a2e4ceba37728b4a32a42"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga11a9732e1cef24f107e815caecdbb445"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga11a9732e1cef24f107e815caecdbb445"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_ADC2EN</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga11a9732e1cef24f107e815caecdbb445"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5df23f931ddad97274ce7e2050b90a5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5df23f931ddad97274ce7e2050b90a5a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_ADC3EN</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga5df23f931ddad97274ce7e2050b90a5a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabf714bbe5b378910693dbfe824b70de8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabf714bbe5b378910693dbfe824b70de8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SDIOEN</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gabf714bbe5b378910693dbfe824b70de8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae08a3510371b9234eb96369c91d3552f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae08a3510371b9234eb96369c91d3552f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SPI1EN</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gae08a3510371b9234eb96369c91d3552f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9b531ccde79f9f1c5b7b63169016e16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9b531ccde79f9f1c5b7b63169016e16"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SPI4EN</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gac9b531ccde79f9f1c5b7b63169016e16"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7a9d56a8aa1fa0f519ecbdf0d19dd4da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7a9d56a8aa1fa0f519ecbdf0d19dd4da"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SYSCFGEN</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga7a9d56a8aa1fa0f519ecbdf0d19dd4da"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga987ebd8255dc8f9c09127e1d608d1065"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga987ebd8255dc8f9c09127e1d608d1065"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_TIM9EN</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga987ebd8255dc8f9c09127e1d608d1065"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa98e28e157787e24b93af95273ab3055"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa98e28e157787e24b93af95273ab3055"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_TIM10EN</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gaa98e28e157787e24b93af95273ab3055"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab1d2aeebc8ccf4e2ee18f4d924a35188"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab1d2aeebc8ccf4e2ee18f4d924a35188"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_TIM11EN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gab1d2aeebc8ccf4e2ee18f4d924a35188"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa03ceeb67bbc312dedb16ca516e0d1ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa03ceeb67bbc312dedb16ca516e0d1ea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SPI5EN</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gaa03ceeb67bbc312dedb16ca516e0d1ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa3a69871fe2c246de87d6330085f8fb2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa3a69871fe2c246de87d6330085f8fb2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SPI6EN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gaa3a69871fe2c246de87d6330085f8fb2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga31543bbdce9d1385c43dedde182f6aa9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga31543bbdce9d1385c43dedde182f6aa9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_SAI1EN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga31543bbdce9d1385c43dedde182f6aa9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga355bd72d57bef878611abbd68c5e2fa8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga355bd72d57bef878611abbd68c5e2fa8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2ENR_LTDCEN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga355bd72d57bef878611abbd68c5e2fa8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf1076b0644c026ab480efdb6aa8c74fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf1076b0644c026ab480efdb6aa8c74fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOALPEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaf1076b0644c026ab480efdb6aa8c74fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55f6ff35a37c4b9106c9e8aa18ab4545"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga55f6ff35a37c4b9106c9e8aa18ab4545"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOBLPEN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga55f6ff35a37c4b9106c9e8aa18ab4545"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac86ad592684edae0ba2cafd22a4f04d1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac86ad592684edae0ba2cafd22a4f04d1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOCLPEN</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gac86ad592684edae0ba2cafd22a4f04d1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89002894839d323b05c4b3f674b54470"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89002894839d323b05c4b3f674b54470"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIODLPEN</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga89002894839d323b05c4b3f674b54470"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2980a6e02550369d05e121ff6f16505c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2980a6e02550369d05e121ff6f16505c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOELPEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga2980a6e02550369d05e121ff6f16505c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7a50c0506b1014d89224933c6c42e6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa7a50c0506b1014d89224933c6c42e6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOFLPEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gaa7a50c0506b1014d89224933c6c42e6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab1dc004ecb0a2950100a062cda47586f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab1dc004ecb0a2950100a062cda47586f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOGLPEN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gab1dc004ecb0a2950100a062cda47586f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga197be77b89e9eae127a536bd2601ded9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga197be77b89e9eae127a536bd2601ded9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOHLPEN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga197be77b89e9eae127a536bd2601ded9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga70d927cfb1d110133bd64989b216a375"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga70d927cfb1d110133bd64989b216a375"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOILPEN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga70d927cfb1d110133bd64989b216a375"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab74296df157ab63437fbfd22c391e93f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab74296df157ab63437fbfd22c391e93f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOJLPEN</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gab74296df157ab63437fbfd22c391e93f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3fdc0a0df366953541eb273a2abddf80"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3fdc0a0df366953541eb273a2abddf80"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_GPIOKLPEN</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga3fdc0a0df366953541eb273a2abddf80"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7333e14b5ccf6d608232ea52a10f7052"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7333e14b5ccf6d608232ea52a10f7052"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_CRCLPEN</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga7333e14b5ccf6d608232ea52a10f7052"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga378f6e2ad9fef59f28db829d2074e796"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga378f6e2ad9fef59f28db829d2074e796"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_FLITFLPEN</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga378f6e2ad9fef59f28db829d2074e796"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4cd1fbd9113809a6a3c904617647219c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4cd1fbd9113809a6a3c904617647219c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_SRAM1LPEN</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga4cd1fbd9113809a6a3c904617647219c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaf7a4c822fa3073035a04487c4cca320"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf7a4c822fa3073035a04487c4cca320"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_SRAM2LPEN</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gaaf7a4c822fa3073035a04487c4cca320"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga777dc76d2a216f8b51b360e8054342e4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga777dc76d2a216f8b51b360e8054342e4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_BKPSRAMLPEN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga777dc76d2a216f8b51b360e8054342e4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafee817715d402e9c41037a29e99e916c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafee817715d402e9c41037a29e99e916c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_SRAM3LPEN</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gafee817715d402e9c41037a29e99e916c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7d6c8ae1441d545d18c54b30c6a0da77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7d6c8ae1441d545d18c54b30c6a0da77"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_DMA1LPEN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga7d6c8ae1441d545d18c54b30c6a0da77"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9e2d376f6c7db4266a5b039a3aa6c207"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e2d376f6c7db4266a5b039a3aa6c207"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_DMA2LPEN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga9e2d376f6c7db4266a5b039a3aa6c207"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8eaf334d499a56654b4471dedcf07ab2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8eaf334d499a56654b4471dedcf07ab2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_DMA2DLPEN</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga8eaf334d499a56654b4471dedcf07ab2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga421fd0aec3671e054ef18cd290bc164e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga421fd0aec3671e054ef18cd290bc164e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_ETHMACLPEN</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga421fd0aec3671e054ef18cd290bc164e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga09935984b92821f18c3e00f7e4fbeb62"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga09935984b92821f18c3e00f7e4fbeb62"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_ETHMACTXLPEN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga09935984b92821f18c3e00f7e4fbeb62"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga28dc3cec4693215c0db36dcfd8a55ee8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga28dc3cec4693215c0db36dcfd8a55ee8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_ETHMACRXLPEN</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga28dc3cec4693215c0db36dcfd8a55ee8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa04c4dfda05aebb5efe66518a28e29de"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa04c4dfda05aebb5efe66518a28e29de"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_ETHMACPTPLPEN</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:gaa04c4dfda05aebb5efe66518a28e29de"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga934a7c19bd6f6b34941058c5c3552b91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga934a7c19bd6f6b34941058c5c3552b91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_OTGHSLPEN</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga934a7c19bd6f6b34941058c5c3552b91"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab9567cabb8058c53bae64ed4b77c05dd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab9567cabb8058c53bae64ed4b77c05dd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB1LPENR_OTGHSULPILPEN</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:gab9567cabb8058c53bae64ed4b77c05dd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51ec4f41dcfdedeedef75a64ec65863a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga51ec4f41dcfdedeedef75a64ec65863a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2LPENR_DCMILPEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga51ec4f41dcfdedeedef75a64ec65863a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga36a5b2e07710be6b18bcf11b817a396d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga36a5b2e07710be6b18bcf11b817a396d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2LPENR_CRYPLPEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga36a5b2e07710be6b18bcf11b817a396d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae7959241184aefcd08cf78763b38a113"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae7959241184aefcd08cf78763b38a113"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2LPENR_HASHLPEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gae7959241184aefcd08cf78763b38a113"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaab54623c517f1450a7fde279c2cae864"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab54623c517f1450a7fde279c2cae864"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2LPENR_RNGLPEN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gaab54623c517f1450a7fde279c2cae864"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac0fd858d073b14216ae0d716ba4f1dd3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac0fd858d073b14216ae0d716ba4f1dd3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB2LPENR_OTGFSLPEN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gac0fd858d073b14216ae0d716ba4f1dd3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabf56147909fa8e7f8629c7fd7349ecb3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabf56147909fa8e7f8629c7fd7349ecb3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_AHB3LPENR_FSMCLPEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gabf56147909fa8e7f8629c7fd7349ecb3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1f561f8bfc556b52335ec2a32ba81c44"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1f561f8bfc556b52335ec2a32ba81c44"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM2LPEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga1f561f8bfc556b52335ec2a32ba81c44"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9391d99885a0a6fbaf3447117ac0f7aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9391d99885a0a6fbaf3447117ac0f7aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM3LPEN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9391d99885a0a6fbaf3447117ac0f7aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f04aff278b72fbf6acbe0ad947b06ae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f04aff278b72fbf6acbe0ad947b06ae"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM4LPEN</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga6f04aff278b72fbf6acbe0ad947b06ae"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5741a6c45b9de1d0c927beb87f399dd9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5741a6c45b9de1d0c927beb87f399dd9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM5LPEN</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga5741a6c45b9de1d0c927beb87f399dd9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga439a5998fd60c3375411c7db2129ac89"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga439a5998fd60c3375411c7db2129ac89"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM6LPEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga439a5998fd60c3375411c7db2129ac89"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7867dc2695855fa9084a13d06a4299f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7867dc2695855fa9084a13d06a4299f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM7LPEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gab7867dc2695855fa9084a13d06a4299f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3b47fde44967a5a600a042398a9cf3c6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3b47fde44967a5a600a042398a9cf3c6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM12LPEN</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga3b47fde44967a5a600a042398a9cf3c6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9897d5f0033623a05997ca222d3a132b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9897d5f0033623a05997ca222d3a132b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM13LPEN</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga9897d5f0033623a05997ca222d3a132b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd1af8912fedadb9edead5b31167a310"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd1af8912fedadb9edead5b31167a310"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_TIM14LPEN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gacd1af8912fedadb9edead5b31167a310"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga13f3db4ac67bf32c994364cc43f4fe8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga13f3db4ac67bf32c994364cc43f4fe8b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_WWDGLPEN</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga13f3db4ac67bf32c994364cc43f4fe8b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga41dcbf845448cbb1b75c0ad7e83b77cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41dcbf845448cbb1b75c0ad7e83b77cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_SPI2LPEN</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga41dcbf845448cbb1b75c0ad7e83b77cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae8acbff235a15b58d1be0f065cdb5472"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae8acbff235a15b58d1be0f065cdb5472"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_SPI3LPEN</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gae8acbff235a15b58d1be0f065cdb5472"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6055c39af369463e14d6ff2017043671"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6055c39af369463e14d6ff2017043671"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_USART2LPEN</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga6055c39af369463e14d6ff2017043671"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae11baa29f4e6d122dabdd54c6b4be052"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae11baa29f4e6d122dabdd54c6b4be052"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_USART3LPEN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gae11baa29f4e6d122dabdd54c6b4be052"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga88fe1e9cf93caa4e02de35e92e55834d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga88fe1e9cf93caa4e02de35e92e55834d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_UART4LPEN</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga88fe1e9cf93caa4e02de35e92e55834d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3de908135d9c9e74c598f7bf1e88fb34"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3de908135d9c9e74c598f7bf1e88fb34"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_UART5LPEN</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga3de908135d9c9e74c598f7bf1e88fb34"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33286469d0a9b9fedbc2b60aa6cd7da7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33286469d0a9b9fedbc2b60aa6cd7da7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_I2C1LPEN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga33286469d0a9b9fedbc2b60aa6cd7da7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6a53d37df11a56412ae06f73626f637"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6a53d37df11a56412ae06f73626f637"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_I2C2LPEN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gaf6a53d37df11a56412ae06f73626f637"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5abf01e4149d71e8427eefcd2e429fe9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5abf01e4149d71e8427eefcd2e429fe9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_I2C3LPEN</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga5abf01e4149d71e8427eefcd2e429fe9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafb93b42a94b988f4a03bed9ea78b4519"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb93b42a94b988f4a03bed9ea78b4519"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_CAN1LPEN</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:gafb93b42a94b988f4a03bed9ea78b4519"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga167ad9fc43674d6993a9550ac3b6e70f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga167ad9fc43674d6993a9550ac3b6e70f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_CAN2LPEN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga167ad9fc43674d6993a9550ac3b6e70f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga274fa282ad1ff40b747644bf9360feb4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga274fa282ad1ff40b747644bf9360feb4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_PWRLPEN</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga274fa282ad1ff40b747644bf9360feb4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf36a11e89644548702385d548f3f9ec4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf36a11e89644548702385d548f3f9ec4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_DACLPEN</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gaf36a11e89644548702385d548f3f9ec4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga880ef558dbbf424fb90c409b04c48226"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga880ef558dbbf424fb90c409b04c48226"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_UART7LPEN</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga880ef558dbbf424fb90c409b04c48226"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga97752f7c9da5bfb81da7f1724b5e3192"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97752f7c9da5bfb81da7f1724b5e3192"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB1LPENR_UART8LPEN</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga97752f7c9da5bfb81da7f1724b5e3192"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga82580245686c32761e8354fb174ba5dd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82580245686c32761e8354fb174ba5dd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_TIM1LPEN</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga82580245686c32761e8354fb174ba5dd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8a1a808f511ff563f05f32ad3ae6d7c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a1a808f511ff563f05f32ad3ae6d7c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_TIM8LPEN</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga8a1a808f511ff563f05f32ad3ae6d7c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8b429bc8d52abd1ba3818a82542bb98"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8b429bc8d52abd1ba3818a82542bb98"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_USART1LPEN</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gab8b429bc8d52abd1ba3818a82542bb98"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b82eb1986da9ed32e6701d01fffe55d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b82eb1986da9ed32e6701d01fffe55d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_USART6LPEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga2b82eb1986da9ed32e6701d01fffe55d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga126a8791f77cecc599e32d2c882a4dab"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga126a8791f77cecc599e32d2c882a4dab"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_ADC1LPEN</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga126a8791f77cecc599e32d2c882a4dab"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac216d0b83590cd7db06aa3dd9118a9bf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac216d0b83590cd7db06aa3dd9118a9bf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_ADC2PEN</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gac216d0b83590cd7db06aa3dd9118a9bf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga12c8300ba9b1ce9b14fc8e0f3ec4c127"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga12c8300ba9b1ce9b14fc8e0f3ec4c127"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_ADC3LPEN</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga12c8300ba9b1ce9b14fc8e0f3ec4c127"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7a740fdf8313fbdd00dd97eb73afc4dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7a740fdf8313fbdd00dd97eb73afc4dc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SDIOLPEN</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga7a740fdf8313fbdd00dd97eb73afc4dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2c6729058e54f4b8f8ae01d5b3586aaa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2c6729058e54f4b8f8ae01d5b3586aaa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SPI1LPEN</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga2c6729058e54f4b8f8ae01d5b3586aaa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac3abbbc5e7b28b72c8a9f0a0358d0b13"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3abbbc5e7b28b72c8a9f0a0358d0b13"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SPI4LPEN</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gac3abbbc5e7b28b72c8a9f0a0358d0b13"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa82cfc33f0cf71220398bbe1c4b412e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa82cfc33f0cf71220398bbe1c4b412e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SYSCFGLPEN</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaaa82cfc33f0cf71220398bbe1c4b412e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga91b882f3dc2b939a53ed3f4caa537de1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga91b882f3dc2b939a53ed3f4caa537de1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_TIM9LPEN</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga91b882f3dc2b939a53ed3f4caa537de1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae7999e2ebeb1300d0cf6a59ad92c41b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae7999e2ebeb1300d0cf6a59ad92c41b6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_TIM10LPEN</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gae7999e2ebeb1300d0cf6a59ad92c41b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad43fcaa4f4d6fb2b590a6ffee31f8c94"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad43fcaa4f4d6fb2b590a6ffee31f8c94"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_TIM11LPEN</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gad43fcaa4f4d6fb2b590a6ffee31f8c94"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga328b8ccda77ab9f0ce965888646df17c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga328b8ccda77ab9f0ce965888646df17c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SPI5LPEN</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga328b8ccda77ab9f0ce965888646df17c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6ff3ef243e422da69d9ab80e6c646da4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ff3ef243e422da69d9ab80e6c646da4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SPI6LPEN</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga6ff3ef243e422da69d9ab80e6c646da4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga35b57d8d3404e6e7e2beed66a201e8fd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga35b57d8d3404e6e7e2beed66a201e8fd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_SAI1LPEN</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga35b57d8d3404e6e7e2beed66a201e8fd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9ec8b19c763bcab7af4e56cc5875799"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9ec8b19c763bcab7af4e56cc5875799"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_APB2LPENR_LTDCLPEN</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gac9ec8b19c763bcab7af4e56cc5875799"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga00145f8814cb9a5b180d76499d97aead"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00145f8814cb9a5b180d76499d97aead"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_LSEON</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga00145f8814cb9a5b180d76499d97aead"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaafca81172ed857ce6b94582fcaada87c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaafca81172ed857ce6b94582fcaada87c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_LSERDY</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaafca81172ed857ce6b94582fcaada87c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga542dffd7f8dc4da5401b54d822a22af0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga542dffd7f8dc4da5401b54d822a22af0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_LSEBYP</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga542dffd7f8dc4da5401b54d822a22af0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafe360ffbda460aef12c42651a2b17583"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe360ffbda460aef12c42651a2b17583"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_LSEMOD</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gafe360ffbda460aef12c42651a2b17583"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe30dbd38f6456990ee641648bc05d40"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabe30dbd38f6456990ee641648bc05d40"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_RTCSEL</b>   ((uint32_t)0x00000300)</td></tr>
|
||
<tr class="separator:gabe30dbd38f6456990ee641648bc05d40"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6701d58e40e4c16e9be49436fcbe23d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6701d58e40e4c16e9be49436fcbe23d0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_RTCSEL_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga6701d58e40e4c16e9be49436fcbe23d0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaac4e378027f3293ec520ed6d18c633f4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaac4e378027f3293ec520ed6d18c633f4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_RTCSEL_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gaac4e378027f3293ec520ed6d18c633f4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga79ea6f2df75f09b17df9582037ed6a53"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79ea6f2df75f09b17df9582037ed6a53"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_RTCEN</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga79ea6f2df75f09b17df9582037ed6a53"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b85b3ab656dfa2809b15e6e530c17a2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b85b3ab656dfa2809b15e6e530c17a2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_BDCR_BDRST</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga2b85b3ab656dfa2809b15e6e530c17a2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga803cbf97bda1ebaf9afee2a3c9f0851b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga803cbf97bda1ebaf9afee2a3c9f0851b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_LSION</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga803cbf97bda1ebaf9afee2a3c9f0851b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab569110e757aee573ebf9ad80812e8bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab569110e757aee573ebf9ad80812e8bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_LSIRDY</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gab569110e757aee573ebf9ad80812e8bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafc26c5996b14005a70afbeaa29aae716"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafc26c5996b14005a70afbeaa29aae716"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_RMVF</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gafc26c5996b14005a70afbeaa29aae716"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6685c7bd94a46c82c7ca69afa1707c39"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6685c7bd94a46c82c7ca69afa1707c39"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_BORRSTF</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga6685c7bd94a46c82c7ca69afa1707c39"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf600bc53fc80265347f6c76c6b8b728a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf600bc53fc80265347f6c76c6b8b728a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_PADRSTF</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaf600bc53fc80265347f6c76c6b8b728a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga837e2d7e2395ac45ebe2aea95ecde9bf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga837e2d7e2395ac45ebe2aea95ecde9bf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_PORRSTF</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga837e2d7e2395ac45ebe2aea95ecde9bf"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga16e89534934436ee8958440882b71e6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga16e89534934436ee8958440882b71e6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_SFTRSTF</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga16e89534934436ee8958440882b71e6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1507e79ffc475547f2a9c9238965b57f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1507e79ffc475547f2a9c9238965b57f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_WDGRSTF</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga1507e79ffc475547f2a9c9238965b57f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacabd7bbde7e78c9c8f5fd46e34771826"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacabd7bbde7e78c9c8f5fd46e34771826"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_WWDGRSTF</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:gacabd7bbde7e78c9c8f5fd46e34771826"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga675455250b91f125d52f5d347c2c0fbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga675455250b91f125d52f5d347c2c0fbf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_CSR_LPWRRSTF</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga675455250b91f125d52f5d347c2c0fbf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6fd9fde5cf03700de4c304b9c5dfb7c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6fd9fde5cf03700de4c304b9c5dfb7c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_SSCGR_MODPER</b>   ((uint32_t)0x00001FFF)</td></tr>
|
||
<tr class="separator:gaf6fd9fde5cf03700de4c304b9c5dfb7c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f801e25eb841262467f54e7325b7806"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0f801e25eb841262467f54e7325b7806"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_SSCGR_INCSTEP</b>   ((uint32_t)0x0FFFE000)</td></tr>
|
||
<tr class="separator:ga0f801e25eb841262467f54e7325b7806"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga392689f6486224a7f19d7ad0cd195687"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga392689f6486224a7f19d7ad0cd195687"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_SSCGR_SPREADSEL</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga392689f6486224a7f19d7ad0cd195687"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8885c04bcb786b89e26f066f4ccf06e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8885c04bcb786b89e26f066f4ccf06e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_SSCGR_SSCGEN</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga8885c04bcb786b89e26f066f4ccf06e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64eb00ab54985afe99fa12a467fb58e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64eb00ab54985afe99fa12a467fb58e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM</b>   ((uint32_t)0x0000003F)</td></tr>
|
||
<tr class="separator:ga64eb00ab54985afe99fa12a467fb58e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9cae111b7f76a18c4d5fdd204f25290"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9cae111b7f76a18c4d5fdd204f25290"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaf9cae111b7f76a18c4d5fdd204f25290"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga73d9343c5adc189599178877e0a5b64c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73d9343c5adc189599178877e0a5b64c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga73d9343c5adc189599178877e0a5b64c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6edd4557f941a4789359954eb628ca92"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6edd4557f941a4789359954eb628ca92"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga6edd4557f941a4789359954eb628ca92"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad3063daafd0c680d2da46e10d59ce832"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3063daafd0c680d2da46e10d59ce832"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad3063daafd0c680d2da46e10d59ce832"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8a2970e64070393efae06ebb7b7b0e44"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a2970e64070393efae06ebb7b7b0e44"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga8a2970e64070393efae06ebb7b7b0e44"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac92318270d153b4be34b3c762d82bd19"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac92318270d153b4be34b3c762d82bd19"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SM_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gac92318270d153b4be34b3c762d82bd19"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68db5b1d90f9b62359888ed1175a0cef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68db5b1d90f9b62359888ed1175a0cef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SN</b>   ((uint32_t)0x00007FC0)</td></tr>
|
||
<tr class="separator:ga68db5b1d90f9b62359888ed1175a0cef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c3d21c4f7d5bef1eff3f7e8184c5a78"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c3d21c4f7d5bef1eff3f7e8184c5a78"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SQ</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga0c3d21c4f7d5bef1eff3f7e8184c5a78"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c599fc84dcde859974ed5b334e90f50"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c599fc84dcde859974ed5b334e90f50"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLI2SCFGR_PLLI2SR</b>   ((uint32_t)0x70000000)</td></tr>
|
||
<tr class="separator:ga0c599fc84dcde859974ed5b334e90f50"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9fb538a885269fbf17f42773b2b1bedf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9fb538a885269fbf17f42773b2b1bedf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLSAICFGR_PLLI2SN</b>   ((uint32_t)0x00007FC0)</td></tr>
|
||
<tr class="separator:ga9fb538a885269fbf17f42773b2b1bedf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae00193a389ae4d4c2e719795ad2f0816"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae00193a389ae4d4c2e719795ad2f0816"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLSAICFGR_PLLI2SQ</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:gae00193a389ae4d4c2e719795ad2f0816"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7fcb7f22d430769e9eff51b22b71b14"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa7fcb7f22d430769e9eff51b22b71b14"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_PLLSAICFGR_PLLI2SR</b>   ((uint32_t)0x70000000)</td></tr>
|
||
<tr class="separator:gaa7fcb7f22d430769e9eff51b22b71b14"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga18080f9f063307e69574aa540d77c4c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga18080f9f063307e69574aa540d77c4c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_PLLI2SDIVQ</b>   ((uint32_t)0x0000001F)</td></tr>
|
||
<tr class="separator:ga18080f9f063307e69574aa540d77c4c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga881b528af3124735a1f78fad18b27f0f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga881b528af3124735a1f78fad18b27f0f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_PLLSAIDIVQ</b>   ((uint32_t)0x00001F00)</td></tr>
|
||
<tr class="separator:ga881b528af3124735a1f78fad18b27f0f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1847e94395a45ce60745fd743a03a7d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1847e94395a45ce60745fd743a03a7d3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_PLLSAIDIVR</b>   ((uint32_t)0x00030000)</td></tr>
|
||
<tr class="separator:ga1847e94395a45ce60745fd743a03a7d3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa1a161d956bb71f8bba6aba7deb168b7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa1a161d956bb71f8bba6aba7deb168b7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_SAI1ASRC</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:gaa1a161d956bb71f8bba6aba7deb168b7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaff9ec8ec157168395df6b770775ead86"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff9ec8ec157168395df6b770775ead86"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_SAI1BSRC</b>   ((uint32_t)0x00C00000)</td></tr>
|
||
<tr class="separator:gaff9ec8ec157168395df6b770775ead86"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78cc4107f023df9a3168daf04ba1c2da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga78cc4107f023df9a3168daf04ba1c2da"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RCC_DCKCFGR_TIMPRE</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga78cc4107f023df9a3168daf04ba1c2da"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6ee81827bb1d78e84e78a74449c8d56a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ee81827bb1d78e84e78a74449c8d56a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_CR_RNGEN</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga6ee81827bb1d78e84e78a74449c8d56a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga27424b682bcee7fff22f92a2dbcea57a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga27424b682bcee7fff22f92a2dbcea57a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_CR_IE</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga27424b682bcee7fff22f92a2dbcea57a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54434ed74bdb00fd0f13422d3e85a2fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54434ed74bdb00fd0f13422d3e85a2fc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_SR_DRDY</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga54434ed74bdb00fd0f13422d3e85a2fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4bb49d327474c3c61877bb20290f51d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4bb49d327474c3c61877bb20290f51d0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_SR_CECS</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga4bb49d327474c3c61877bb20290f51d0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5562bc13afe295893dc3997a4917fee2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5562bc13afe295893dc3997a4917fee2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_SR_SECS</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5562bc13afe295893dc3997a4917fee2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3b89a08bcc8a7a6078bd9f5f2f34bb53"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3b89a08bcc8a7a6078bd9f5f2f34bb53"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_SR_CEIS</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga3b89a08bcc8a7a6078bd9f5f2f34bb53"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa6b0e11930f20484f0d0aca79959d9b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa6b0e11930f20484f0d0aca79959d9b2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RNG_SR_SEIS</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gaa6b0e11930f20484f0d0aca79959d9b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3152952ac385ee1ce8dd868978d3fce9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3152952ac385ee1ce8dd868978d3fce9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_PM</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga3152952ac385ee1ce8dd868978d3fce9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad42435e015e9f5052245c366ae08d655"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad42435e015e9f5052245c366ae08d655"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HT</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:gad42435e015e9f5052245c366ae08d655"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1c9af54381689d893ba1b11eb33cd866"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1c9af54381689d893ba1b11eb33cd866"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HT_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga1c9af54381689d893ba1b11eb33cd866"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7b3ba2cc471b86d041df3c2a1a9ef121"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b3ba2cc471b86d041df3c2a1a9ef121"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HT_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga7b3ba2cc471b86d041df3c2a1a9ef121"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac8211df481853649722383e0d8fb06d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8211df481853649722383e0d8fb06d5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HU</b>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:gac8211df481853649722383e0d8fb06d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaddad920d5681960fa702b988ef1f82be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaddad920d5681960fa702b988ef1f82be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HU_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaddad920d5681960fa702b988ef1f82be"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae6206d385d3b3e127b1e63be48f83a63"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae6206d385d3b3e127b1e63be48f83a63"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HU_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gae6206d385d3b3e127b1e63be48f83a63"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6e264504542ec2d9b06036e938f7f79d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6e264504542ec2d9b06036e938f7f79d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HU_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga6e264504542ec2d9b06036e938f7f79d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40763d3ed48e9f707784bdfd65a9c3ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40763d3ed48e9f707784bdfd65a9c3ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_HU_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga40763d3ed48e9f707784bdfd65a9c3ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64cf91576871a8108d6ee2f48970bb4a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64cf91576871a8108d6ee2f48970bb4a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNT</b>   ((uint32_t)0x00007000)</td></tr>
|
||
<tr class="separator:ga64cf91576871a8108d6ee2f48970bb4a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga752747aa90bf35bd57b16bffc7294dfc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga752747aa90bf35bd57b16bffc7294dfc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNT_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga752747aa90bf35bd57b16bffc7294dfc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa1837f65a11192dd9b8bf249c31ccef7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa1837f65a11192dd9b8bf249c31ccef7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNT_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gaa1837f65a11192dd9b8bf249c31ccef7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5f27fb43718df0797664acd2d9c95c1a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5f27fb43718df0797664acd2d9c95c1a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNT_2</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga5f27fb43718df0797664acd2d9c95c1a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga84e86f4fc04232fd0294966434708e06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84e86f4fc04232fd0294966434708e06"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga84e86f4fc04232fd0294966434708e06"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad91d7700822050a352e53aff372a697b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad91d7700822050a352e53aff372a697b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gad91d7700822050a352e53aff372a697b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad9c3087e3d4cd490af8334e99467f1dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9c3087e3d4cd490af8334e99467f1dc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gad9c3087e3d4cd490af8334e99467f1dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac01a9e4b358ea062bf1c66069a28c126"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac01a9e4b358ea062bf1c66069a28c126"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gac01a9e4b358ea062bf1c66069a28c126"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga75b76249e63af249061c0c5532a2a4e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga75b76249e63af249061c0c5532a2a4e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_MNU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga75b76249e63af249061c0c5532a2a4e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaae39b22025a36d1e4e185e4be2bf326f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaae39b22025a36d1e4e185e4be2bf326f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_ST</b>   ((uint32_t)0x00000070)</td></tr>
|
||
<tr class="separator:gaae39b22025a36d1e4e185e4be2bf326f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf0a53dc60816e0790ba69eaff3e87cb0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf0a53dc60816e0790ba69eaff3e87cb0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_ST_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaf0a53dc60816e0790ba69eaff3e87cb0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga948beb7166b70f1fa9e9148a8b6bd3f9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga948beb7166b70f1fa9e9148a8b6bd3f9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_ST_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga948beb7166b70f1fa9e9148a8b6bd3f9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4d5f0413990c26a5cf9a857d10243e9b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4d5f0413990c26a5cf9a857d10243e9b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_ST_2</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga4d5f0413990c26a5cf9a857d10243e9b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga747711823db36121b78c0eebb6140ca1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga747711823db36121b78c0eebb6140ca1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_SU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:ga747711823db36121b78c0eebb6140ca1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4132b0e9d72ff72df7e0062a1e081ca3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4132b0e9d72ff72df7e0062a1e081ca3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_SU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga4132b0e9d72ff72df7e0062a1e081ca3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6eef03c1de3719d801c970eec53e7500"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6eef03c1de3719d801c970eec53e7500"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_SU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga6eef03c1de3719d801c970eec53e7500"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabbe7e738c8adaaf24f6faca467d6fde2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabbe7e738c8adaaf24f6faca467d6fde2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_SU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gabbe7e738c8adaaf24f6faca467d6fde2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab44e19720b6691f63ba4f0c38a1fd7f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab44e19720b6691f63ba4f0c38a1fd7f3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TR_SU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gab44e19720b6691f63ba4f0c38a1fd7f3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga14d55b6d841825ec65736e08c09b1d83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga14d55b6d841825ec65736e08c09b1d83"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YT</b>   ((uint32_t)0x00F00000)</td></tr>
|
||
<tr class="separator:ga14d55b6d841825ec65736e08c09b1d83"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a733698a85cc8f26d346ec8c61c7937"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a733698a85cc8f26d346ec8c61c7937"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YT_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga4a733698a85cc8f26d346ec8c61c7937"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa48c7c9f31a74b6d3b04443ce0414ce9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa48c7c9f31a74b6d3b04443ce0414ce9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YT_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gaa48c7c9f31a74b6d3b04443ce0414ce9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5c15cd22daf2ef6f9ea6f7341897a435"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5c15cd22daf2ef6f9ea6f7341897a435"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YT_2</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga5c15cd22daf2ef6f9ea6f7341897a435"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e7cf7875d489f89d949178e0294d555"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e7cf7875d489f89d949178e0294d555"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YT_3</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga4e7cf7875d489f89d949178e0294d555"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd1bdc8fad3fdeb14058c9158f39ae9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd1bdc8fad3fdeb14058c9158f39ae9e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YU</b>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:gafd1bdc8fad3fdeb14058c9158f39ae9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeda03e9857e9009b6212df5f97a5d09f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeda03e9857e9009b6212df5f97a5d09f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YU_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaeda03e9857e9009b6212df5f97a5d09f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb0b5f7684e31cb1665a848b91601249"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadb0b5f7684e31cb1665a848b91601249"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YU_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gadb0b5f7684e31cb1665a848b91601249"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga01f200469dbc8159adc3b4f25375b601"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga01f200469dbc8159adc3b4f25375b601"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YU_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga01f200469dbc8159adc3b4f25375b601"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga592372ccddc93b10e81ed705c9c0f9bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga592372ccddc93b10e81ed705c9c0f9bc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_YU_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga592372ccddc93b10e81ed705c9c0f9bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f46c349f75a31973e094729fe96543f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f46c349f75a31973e094729fe96543f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_WDU</b>   ((uint32_t)0x0000E000)</td></tr>
|
||
<tr class="separator:ga6f46c349f75a31973e094729fe96543f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga30cb803b191670a41aea89a91e53fe61"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga30cb803b191670a41aea89a91e53fe61"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_WDU_0</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga30cb803b191670a41aea89a91e53fe61"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabd26d3601bf8b119af8f96a65a1de60e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabd26d3601bf8b119af8f96a65a1de60e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_WDU_1</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gabd26d3601bf8b119af8f96a65a1de60e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga77e907e5efced7628e9933e7cfb4cac6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga77e907e5efced7628e9933e7cfb4cac6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_WDU_2</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga77e907e5efced7628e9933e7cfb4cac6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga26f0d3ce1c6c6785bd8fbae556f68b31"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga26f0d3ce1c6c6785bd8fbae556f68b31"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MT</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga26f0d3ce1c6c6785bd8fbae556f68b31"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9221f60ccf3581f3c543fdedddf4372"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9221f60ccf3581f3c543fdedddf4372"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:gac9221f60ccf3581f3c543fdedddf4372"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54f64678df9fe08a2afd732c275ae7a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54f64678df9fe08a2afd732c275ae7a0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga54f64678df9fe08a2afd732c275ae7a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac7845ded502c4cc9faeeb6215955f6f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7845ded502c4cc9faeeb6215955f6f1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gac7845ded502c4cc9faeeb6215955f6f1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga47a14479cfe6791d300b9a556d158abe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga47a14479cfe6791d300b9a556d158abe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga47a14479cfe6791d300b9a556d158abe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a420b221dec229c053295c44bcac1b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a420b221dec229c053295c44bcac1b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_MU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga2a420b221dec229c053295c44bcac1b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga52e40cec8161ee20176d92d547fef350"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga52e40cec8161ee20176d92d547fef350"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DT</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga52e40cec8161ee20176d92d547fef350"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8823ee9be7a191912aeef8252517b8a6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8823ee9be7a191912aeef8252517b8a6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DT_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga8823ee9be7a191912aeef8252517b8a6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga546b218e45c1297e39a586204268cf9d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga546b218e45c1297e39a586204268cf9d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DT_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga546b218e45c1297e39a586204268cf9d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaba04cbc99cf442c7e6155bef625c5663"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba04cbc99cf442c7e6155bef625c5663"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gaba04cbc99cf442c7e6155bef625c5663"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0ffd9b610a0ba3f1caad707ff2fb0a3f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0ffd9b610a0ba3f1caad707ff2fb0a3f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga0ffd9b610a0ba3f1caad707ff2fb0a3f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga79b5d9f674be2ecf85c964da6ac0a2a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79b5d9f674be2ecf85c964da6ac0a2a4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga79b5d9f674be2ecf85c964da6ac0a2a4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1668f84ec4ddec10f6bcff65983df05b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1668f84ec4ddec10f6bcff65983df05b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga1668f84ec4ddec10f6bcff65983df05b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad54e249241aebdda778618f35dce9f66"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad54e249241aebdda778618f35dce9f66"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_DR_DU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad54e249241aebdda778618f35dce9f66"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3cdfa862acfa6068b7ba847f77269d60"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3cdfa862acfa6068b7ba847f77269d60"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_COE</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga3cdfa862acfa6068b7ba847f77269d60"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f81115ef3fd366de73e84ab667d369b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f81115ef3fd366de73e84ab667d369b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_OSEL</b>   ((uint32_t)0x00600000)</td></tr>
|
||
<tr class="separator:ga8f81115ef3fd366de73e84ab667d369b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe506838823e3b172a9ed4a3fec7321a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabe506838823e3b172a9ed4a3fec7321a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_OSEL_0</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gabe506838823e3b172a9ed4a3fec7321a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga15fb33aaad62c71bbba2f96652eefb8c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga15fb33aaad62c71bbba2f96652eefb8c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_OSEL_1</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga15fb33aaad62c71bbba2f96652eefb8c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga53f21b5adadbcc5eb255683d5decc9cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga53f21b5adadbcc5eb255683d5decc9cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_POL</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga53f21b5adadbcc5eb255683d5decc9cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga197c587884b9c1dcb2970e9ec2589b41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga197c587884b9c1dcb2970e9ec2589b41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_COSEL</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga197c587884b9c1dcb2970e9ec2589b41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a793580db48c66a98e44cbda6e0daef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a793580db48c66a98e44cbda6e0daef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_BCK</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga2a793580db48c66a98e44cbda6e0daef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga220cf6237eac208acc8ae4c55e0b5e6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga220cf6237eac208acc8ae4c55e0b5e6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_SUB1H</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga220cf6237eac208acc8ae4c55e0b5e6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaae1a8439d08e28289398dcf3c2b4b47b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaae1a8439d08e28289398dcf3c2b4b47b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_ADD1H</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gaae1a8439d08e28289398dcf3c2b4b47b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf376dffb9f2777ef275f23410e35600d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf376dffb9f2777ef275f23410e35600d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_TSIE</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:gaf376dffb9f2777ef275f23410e35600d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5e0a1419830a16667cea4f6454913226"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e0a1419830a16667cea4f6454913226"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUTIE</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga5e0a1419830a16667cea4f6454913226"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac6269c9dd5cee650024ede0b0c42e87d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac6269c9dd5cee650024ede0b0c42e87d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_ALRBIE</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gac6269c9dd5cee650024ede0b0c42e87d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9138f75267bd93f8de6738225217d583"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9138f75267bd93f8de6738225217d583"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_ALRAIE</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga9138f75267bd93f8de6738225217d583"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga94fa98ca8cac9078b9bb82c89593d3c0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga94fa98ca8cac9078b9bb82c89593d3c0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_TSE</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga94fa98ca8cac9078b9bb82c89593d3c0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga061be0d3cdea721e5cb695cda0699bc3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga061be0d3cdea721e5cb695cda0699bc3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUTE</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga061be0d3cdea721e5cb695cda0699bc3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17d0850002ed42742ff75a82dc4e8586"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17d0850002ed42742ff75a82dc4e8586"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_ALRBE</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga17d0850002ed42742ff75a82dc4e8586"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8a8cdeac61f06e4737800b64a901d584"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a8cdeac61f06e4737800b64a901d584"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_ALRAE</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga8a8cdeac61f06e4737800b64a901d584"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4ce7cb8b575142e125863d61ea4765ba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4ce7cb8b575142e125863d61ea4765ba"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_DCE</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga4ce7cb8b575142e125863d61ea4765ba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2706e31a1bc8d95b682fe47611e0dd3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab2706e31a1bc8d95b682fe47611e0dd3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_FMT</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gab2706e31a1bc8d95b682fe47611e0dd3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga34d50a3eff3364e6da4fefed9962a054"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34d50a3eff3364e6da4fefed9962a054"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_BYPSHAD</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga34d50a3eff3364e6da4fefed9962a054"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga646ef1071cacc2d30bbef5597c817021"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga646ef1071cacc2d30bbef5597c817021"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_REFCKON</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga646ef1071cacc2d30bbef5597c817021"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad076bde34be7d24f088fd2c003b7a7f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad076bde34be7d24f088fd2c003b7a7f7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_TSEDGE</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad076bde34be7d24f088fd2c003b7a7f7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54a2d55571417d9dfb05826b40d997b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54a2d55571417d9dfb05826b40d997b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUCKSEL</b>   ((uint32_t)0x00000007)</td></tr>
|
||
<tr class="separator:ga54a2d55571417d9dfb05826b40d997b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f03056e9aa78c133af90b60af72ba79"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f03056e9aa78c133af90b60af72ba79"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUCKSEL_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga6f03056e9aa78c133af90b60af72ba79"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga360f7ccf7a89c5091f4affe6d1019215"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga360f7ccf7a89c5091f4affe6d1019215"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUCKSEL_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga360f7ccf7a89c5091f4affe6d1019215"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad247ac722f6900744cdc16f8f45ed923"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad247ac722f6900744cdc16f8f45ed923"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CR_WUCKSEL_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad247ac722f6900744cdc16f8f45ed923"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga05189137cfd0e73903d9b70d071656b9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga05189137cfd0e73903d9b70d071656b9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_RECALPF</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga05189137cfd0e73903d9b70d071656b9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae738b22f6a8123026921a1d14f9547c0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae738b22f6a8123026921a1d14f9547c0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_TAMP1F</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gae738b22f6a8123026921a1d14f9547c0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga766c238f964072decba204c7fce850ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga766c238f964072decba204c7fce850ff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_TSOVF</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga766c238f964072decba204c7fce850ff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68c0a60dbfc5f1570a48afe450395484"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68c0a60dbfc5f1570a48afe450395484"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_TSF</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga68c0a60dbfc5f1570a48afe450395484"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4eb5960300a402210e5378d78ce22766"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4eb5960300a402210e5378d78ce22766"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_WUTF</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga4eb5960300a402210e5378d78ce22766"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7976972a5fc6705fede85536520367d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7976972a5fc6705fede85536520367d6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_ALRBF</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga7976972a5fc6705fede85536520367d6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96605e50a347507b7f274e9cd894a02c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga96605e50a347507b7f274e9cd894a02c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_ALRAF</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga96605e50a347507b7f274e9cd894a02c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae0eb2f998cd3e7325974347cb2a3d25a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0eb2f998cd3e7325974347cb2a3d25a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_INIT</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gae0eb2f998cd3e7325974347cb2a3d25a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab16dcc6973c611e087030cdb15203972"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab16dcc6973c611e087030cdb15203972"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_INITF</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gab16dcc6973c611e087030cdb15203972"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bd683e789841f7d3f138709ffdbfbf8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9bd683e789841f7d3f138709ffdbfbf8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_RSF</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga9bd683e789841f7d3f138709ffdbfbf8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7b229bace5ba0c0b48bfeb5efc445292"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b229bace5ba0c0b48bfeb5efc445292"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_INITS</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga7b229bace5ba0c0b48bfeb5efc445292"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1c4536a874336778ac11109f14573eb9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1c4536a874336778ac11109f14573eb9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_SHPF</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga1c4536a874336778ac11109f14573eb9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0e753321211e19bc48736fe0d30a7f40"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e753321211e19bc48736fe0d30a7f40"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_WUTWF</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga0e753321211e19bc48736fe0d30a7f40"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a0c34bff6dc9fce29e2be35d32d9d05"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a0c34bff6dc9fce29e2be35d32d9d05"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_ALRBWF</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga5a0c34bff6dc9fce29e2be35d32d9d05"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4d420b5c3f8623cf1116d42fa164be7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4d420b5c3f8623cf1116d42fa164be7e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ISR_ALRAWF</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga4d420b5c3f8623cf1116d42fa164be7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad248dca1e9532ba31f98d3ec9d2f8711"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad248dca1e9532ba31f98d3ec9d2f8711"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_PRER_PREDIV_A</b>   ((uint32_t)0x007F0000)</td></tr>
|
||
<tr class="separator:gad248dca1e9532ba31f98d3ec9d2f8711"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17bbd4e569a76446df089752cb41b1cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17bbd4e569a76446df089752cb41b1cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_PRER_PREDIV_S</b>   ((uint32_t)0x00001FFF)</td></tr>
|
||
<tr class="separator:ga17bbd4e569a76446df089752cb41b1cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e412c1448a7e20974f5b46129799eeb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e412c1448a7e20974f5b46129799eeb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_WUTR_WUT</b>   ((uint32_t)0x0000FFFF)</td></tr>
|
||
<tr class="separator:ga2e412c1448a7e20974f5b46129799eeb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa63841fd7262fd307f211ee8e9e8a6f0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa63841fd7262fd307f211ee8e9e8a6f0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALIBR_DCS</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaa63841fd7262fd307f211ee8e9e8a6f0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab5523cf582ebc0a987c6a2c2007bc10d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5523cf582ebc0a987c6a2c2007bc10d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALIBR_DC</b>   ((uint32_t)0x0000001F)</td></tr>
|
||
<tr class="separator:gab5523cf582ebc0a987c6a2c2007bc10d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8ed557e4451ffd3e869bb9ca393d47f9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ed557e4451ffd3e869bb9ca393d47f9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MSK4</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga8ed557e4451ffd3e869bb9ca393d47f9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5a7fdc1719b3159e099c3979da26dd92"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5a7fdc1719b3159e099c3979da26dd92"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_WDSEL</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga5a7fdc1719b3159e099c3979da26dd92"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga934ea7910b5f5988f6c46ae4703dc29b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga934ea7910b5f5988f6c46ae4703dc29b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DT</b>   ((uint32_t)0x30000000)</td></tr>
|
||
<tr class="separator:ga934ea7910b5f5988f6c46ae4703dc29b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0cb880cece843ba5314120abcf14e9fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0cb880cece843ba5314120abcf14e9fc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DT_0</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga0cb880cece843ba5314120abcf14e9fc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6e2e76ce2645d0c9d2587d4172edcd58"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6e2e76ce2645d0c9d2587d4172edcd58"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DT_1</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:ga6e2e76ce2645d0c9d2587d4172edcd58"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga784589946bdf3ca0d675cc22d9bafbbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga784589946bdf3ca0d675cc22d9bafbbf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DU</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga784589946bdf3ca0d675cc22d9bafbbf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga687a85ed4e7623bdb60196f706ab62e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga687a85ed4e7623bdb60196f706ab62e9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DU_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:ga687a85ed4e7623bdb60196f706ab62e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8d2ec65de047fdece20083f030cc6cfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d2ec65de047fdece20083f030cc6cfd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DU_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga8d2ec65de047fdece20083f030cc6cfd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeb0050d5e8d64e4f684e325446ea173a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb0050d5e8d64e4f684e325446ea173a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DU_2</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaeb0050d5e8d64e4f684e325446ea173a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga79a55db963d0707fc0ae14bffc51c297"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79a55db963d0707fc0ae14bffc51c297"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_DU_3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga79a55db963d0707fc0ae14bffc51c297"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga337fba397cab4beb204f4f6e6ddc4bf3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga337fba397cab4beb204f4f6e6ddc4bf3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MSK3</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga337fba397cab4beb204f4f6e6ddc4bf3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaab68dc30427951b19aecf399b0ae2900"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab68dc30427951b19aecf399b0ae2900"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_PM</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:gaab68dc30427951b19aecf399b0ae2900"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55bc04190e9eaa916144fa2d1777cbfb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga55bc04190e9eaa916144fa2d1777cbfb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HT</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:ga55bc04190e9eaa916144fa2d1777cbfb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4165b904cdf6bdf4ed6c892d73953453"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4165b904cdf6bdf4ed6c892d73953453"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HT_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga4165b904cdf6bdf4ed6c892d73953453"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab50f98903ad0183c52c40375d45d4d77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab50f98903ad0183c52c40375d45d4d77"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HT_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gab50f98903ad0183c52c40375d45d4d77"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga491fda42cfad244596737347fe157142"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga491fda42cfad244596737347fe157142"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HU</b>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:ga491fda42cfad244596737347fe157142"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga756c2c137f6d1f89bba95347245b014c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga756c2c137f6d1f89bba95347245b014c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HU_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga756c2c137f6d1f89bba95347245b014c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2068b4116fca73a63b1c98f51902acef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2068b4116fca73a63b1c98f51902acef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HU_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga2068b4116fca73a63b1c98f51902acef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7642e83ff425a1fe2695d1100ce7c35"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7642e83ff425a1fe2695d1100ce7c35"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HU_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gab7642e83ff425a1fe2695d1100ce7c35"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f516916142b3ea6110619e8dc600d2a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f516916142b3ea6110619e8dc600d2a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_HU_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga9f516916142b3ea6110619e8dc600d2a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga478d62d55a42779c558e9ba16aec74cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga478d62d55a42779c558e9ba16aec74cc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MSK2</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga478d62d55a42779c558e9ba16aec74cc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga02edb2d87b7fe9936a0cffa96d4a7297"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga02edb2d87b7fe9936a0cffa96d4a7297"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNT</b>   ((uint32_t)0x00007000)</td></tr>
|
||
<tr class="separator:ga02edb2d87b7fe9936a0cffa96d4a7297"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0dab36fbc475b7ec4442020f159601c6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0dab36fbc475b7ec4442020f159601c6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNT_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga0dab36fbc475b7ec4442020f159601c6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6782f11cc7f8edf401dec2ff436d7968"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6782f11cc7f8edf401dec2ff436d7968"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNT_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga6782f11cc7f8edf401dec2ff436d7968"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf766f39637efe114b38a1aceb352328d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf766f39637efe114b38a1aceb352328d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNT_2</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gaf766f39637efe114b38a1aceb352328d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga22d67ff770aa27509d79afde1865c845"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga22d67ff770aa27509d79afde1865c845"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga22d67ff770aa27509d79afde1865c845"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeb5ead84647f92b0d1efcf8decb0dd8f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb5ead84647f92b0d1efcf8decb0dd8f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gaeb5ead84647f92b0d1efcf8decb0dd8f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga656311cb5632dbc9b4fb5dd2288a6e66"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga656311cb5632dbc9b4fb5dd2288a6e66"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga656311cb5632dbc9b4fb5dd2288a6e66"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadc164d7ff70842858281cfaff5f29374"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc164d7ff70842858281cfaff5f29374"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gadc164d7ff70842858281cfaff5f29374"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e1199b4140613e8a1dbe283dd89c772"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e1199b4140613e8a1dbe283dd89c772"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MNU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga4e1199b4140613e8a1dbe283dd89c772"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8862250866a358ff3095852f45a160c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8862250866a358ff3095852f45a160c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_MSK1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga8862250866a358ff3095852f45a160c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b623884457edb89f48a2a100aff183a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0b623884457edb89f48a2a100aff183a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_ST</b>   ((uint32_t)0x00000070)</td></tr>
|
||
<tr class="separator:ga0b623884457edb89f48a2a100aff183a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaae5c1ad41702da26788f5ef52c0d05ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaae5c1ad41702da26788f5ef52c0d05ca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_ST_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gaae5c1ad41702da26788f5ef52c0d05ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e771d8055c52a1186d3f47dd567457a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e771d8055c52a1186d3f47dd567457a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_ST_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga2e771d8055c52a1186d3f47dd567457a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7fdfe4a92c7ab0c326dc9f2638318f97"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fdfe4a92c7ab0c326dc9f2638318f97"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_ST_2</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga7fdfe4a92c7ab0c326dc9f2638318f97"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8ec4171be73457bc3dba78bd246e35b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8ec4171be73457bc3dba78bd246e35b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_SU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gab8ec4171be73457bc3dba78bd246e35b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaaf99585af681202a201178f8156dffe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaaf99585af681202a201178f8156dffe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_SU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaaaf99585af681202a201178f8156dffe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9d7edbd0609415ca3a328f8498c4a63c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9d7edbd0609415ca3a328f8498c4a63c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_SU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga9d7edbd0609415ca3a328f8498c4a63c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga485a8c274aa56f705dc1363484d7085f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga485a8c274aa56f705dc1363484d7085f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_SU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga485a8c274aa56f705dc1363484d7085f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad9d41833996dbd77a0bfbcd9889957a2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad9d41833996dbd77a0bfbcd9889957a2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMAR_SU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gad9d41833996dbd77a0bfbcd9889957a2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga934df96e83f72268528e62c55c03b50d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga934df96e83f72268528e62c55c03b50d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MSK4</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga934df96e83f72268528e62c55c03b50d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3acc5db599b055a0c1eca04024bf0285"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3acc5db599b055a0c1eca04024bf0285"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_WDSEL</b>   ((uint32_t)0x40000000)</td></tr>
|
||
<tr class="separator:ga3acc5db599b055a0c1eca04024bf0285"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f8662da4b5f9f0dc0cdd8eac037052b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f8662da4b5f9f0dc0cdd8eac037052b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DT</b>   ((uint32_t)0x30000000)</td></tr>
|
||
<tr class="separator:ga9f8662da4b5f9f0dc0cdd8eac037052b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga34531fadcc9d2a702b3b7138831fb4c8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34531fadcc9d2a702b3b7138831fb4c8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DT_0</b>   ((uint32_t)0x10000000)</td></tr>
|
||
<tr class="separator:ga34531fadcc9d2a702b3b7138831fb4c8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabeb8410cfd578e600049846a694dc00d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabeb8410cfd578e600049846a694dc00d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DT_1</b>   ((uint32_t)0x20000000)</td></tr>
|
||
<tr class="separator:gabeb8410cfd578e600049846a694dc00d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0beeb5e7c9237d688d5784dba0a5c671"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0beeb5e7c9237d688d5784dba0a5c671"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DU</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga0beeb5e7c9237d688d5784dba0a5c671"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9886cb39e9c89c40ddc33c6e7659db5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9886cb39e9c89c40ddc33c6e7659db5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DU_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gaf9886cb39e9c89c40ddc33c6e7659db5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga121e8284bdc7ebd634f71e5810dc4f85"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga121e8284bdc7ebd634f71e5810dc4f85"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DU_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga121e8284bdc7ebd634f71e5810dc4f85"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga78b99f99d3666212ab673dbc9f7f3192"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga78b99f99d3666212ab673dbc9f7f3192"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DU_2</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga78b99f99d3666212ab673dbc9f7f3192"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8551995a404be9f58511ea22dca71f1a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8551995a404be9f58511ea22dca71f1a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_DU_3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:ga8551995a404be9f58511ea22dca71f1a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca7cd93178102c8769d0874d5b8394c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaca7cd93178102c8769d0874d5b8394c4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MSK3</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:gaca7cd93178102c8769d0874d5b8394c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4fc947f41bd2a091b13ffeff4312b67b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4fc947f41bd2a091b13ffeff4312b67b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_PM</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga4fc947f41bd2a091b13ffeff4312b67b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga552fbb873fbab8cefd1c5c3536d0989d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga552fbb873fbab8cefd1c5c3536d0989d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HT</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:ga552fbb873fbab8cefd1c5c3536d0989d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabbddfb1b1ff41f1b76f5ccfb6eb29362"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabbddfb1b1ff41f1b76f5ccfb6eb29362"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HT_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:gabbddfb1b1ff41f1b76f5ccfb6eb29362"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3219c5b314ca459c8dcb93c140b210cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3219c5b314ca459c8dcb93c140b210cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HT_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga3219c5b314ca459c8dcb93c140b210cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a01e42db93b9bc9097766d7ccf2d21d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a01e42db93b9bc9097766d7ccf2d21d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HU</b>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:ga1a01e42db93b9bc9097766d7ccf2d21d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0223058b7ae0a4ae57a7a7997440385e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0223058b7ae0a4ae57a7a7997440385e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HU_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga0223058b7ae0a4ae57a7a7997440385e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a7c34c4e83f374790e3ed27a3e23443"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a7c34c4e83f374790e3ed27a3e23443"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HU_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga9a7c34c4e83f374790e3ed27a3e23443"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad5e6d673134918e74d9a0f06ca4dc479"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad5e6d673134918e74d9a0f06ca4dc479"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HU_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gad5e6d673134918e74d9a0f06ca4dc479"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae538b44aa24031a294442dc47f6849f5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae538b44aa24031a294442dc47f6849f5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_HU_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:gae538b44aa24031a294442dc47f6849f5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga124c24eb148681777758f1298776f5a1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga124c24eb148681777758f1298776f5a1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MSK2</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga124c24eb148681777758f1298776f5a1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga05e2ef0960c04023b98a104202f44571"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga05e2ef0960c04023b98a104202f44571"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNT</b>   ((uint32_t)0x00007000)</td></tr>
|
||
<tr class="separator:ga05e2ef0960c04023b98a104202f44571"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf1170e6bedeafe4da96568080fe3bbe3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf1170e6bedeafe4da96568080fe3bbe3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNT_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaf1170e6bedeafe4da96568080fe3bbe3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56977652001bc709e4c37fce5647eb40"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56977652001bc709e4c37fce5647eb40"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNT_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga56977652001bc709e4c37fce5647eb40"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafbdfd2b2b1fc039fe8efdd6df612b220"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafbdfd2b2b1fc039fe8efdd6df612b220"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNT_2</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:gafbdfd2b2b1fc039fe8efdd6df612b220"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3ca0feaf431b9f9dde4a9d97cae39056"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3ca0feaf431b9f9dde4a9d97cae39056"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga3ca0feaf431b9f9dde4a9d97cae39056"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga93830709da4736a2e8da1cf3a3596dda"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga93830709da4736a2e8da1cf3a3596dda"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga93830709da4736a2e8da1cf3a3596dda"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9cab4a9df6a1e45e2a3212b357e1bef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae9cab4a9df6a1e45e2a3212b357e1bef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gae9cab4a9df6a1e45e2a3212b357e1bef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga869e14a514b3d140a2dcad669e2ab3e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga869e14a514b3d140a2dcad669e2ab3e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga869e14a514b3d140a2dcad669e2ab3e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaec666ddc3d2c205d46d4e1e5bdcf9243"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec666ddc3d2c205d46d4e1e5bdcf9243"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MNU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gaec666ddc3d2c205d46d4e1e5bdcf9243"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa472193eb2ace80c95874c850236b489"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa472193eb2ace80c95874c850236b489"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_MSK1</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gaa472193eb2ace80c95874c850236b489"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7a6c70156cd32b6aa855e4f2e32406c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7a6c70156cd32b6aa855e4f2e32406c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_ST</b>   ((uint32_t)0x00000070)</td></tr>
|
||
<tr class="separator:gad7a6c70156cd32b6aa855e4f2e32406c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2514a54011c9ff7b48939e9cbd13f859"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2514a54011c9ff7b48939e9cbd13f859"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_ST_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga2514a54011c9ff7b48939e9cbd13f859"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad6b6e10efeaeac2898a754e2a360fb27"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6b6e10efeaeac2898a754e2a360fb27"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_ST_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gad6b6e10efeaeac2898a754e2a360fb27"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga423e1673ab928b5e43e9fa9b65d2122c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga423e1673ab928b5e43e9fa9b65d2122c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_ST_2</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga423e1673ab928b5e43e9fa9b65d2122c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae2fdd1ad6a4b7db36ece6145cba49ccf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae2fdd1ad6a4b7db36ece6145cba49ccf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_SU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gae2fdd1ad6a4b7db36ece6145cba49ccf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1aa325b93084bf6fdc494842e1f0b652"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1aa325b93084bf6fdc494842e1f0b652"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_SU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga1aa325b93084bf6fdc494842e1f0b652"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga72ed3dd8ae6a59462a99f8c3d8c316e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga72ed3dd8ae6a59462a99f8c3d8c316e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_SU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga72ed3dd8ae6a59462a99f8c3d8c316e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac21f97b7b207139ffb0d1e6ede81bb91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac21f97b7b207139ffb0d1e6ede81bb91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_SU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gac21f97b7b207139ffb0d1e6ede81bb91"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9b548175b400ee92c11c2c446d6d129b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9b548175b400ee92c11c2c446d6d129b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBR_SU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga9b548175b400ee92c11c2c446d6d129b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2d21f29da0e92b2744719aab37278b07"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d21f29da0e92b2744719aab37278b07"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_WPR_KEY</b>   ((uint32_t)0x000000FF)</td></tr>
|
||
<tr class="separator:ga2d21f29da0e92b2744719aab37278b07"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3881f27b6c7a5c7609b1393682144aed"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3881f27b6c7a5c7609b1393682144aed"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_SSR_SS</b>   ((uint32_t)0x0000FFFF)</td></tr>
|
||
<tr class="separator:ga3881f27b6c7a5c7609b1393682144aed"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6131eb8c293b98bc5a6c7a4bb1920450"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6131eb8c293b98bc5a6c7a4bb1920450"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_SHIFTR_SUBFS</b>   ((uint32_t)0x00007FFF)</td></tr>
|
||
<tr class="separator:ga6131eb8c293b98bc5a6c7a4bb1920450"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8fee932563d21382db9ecad458356af2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8fee932563d21382db9ecad458356af2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_SHIFTR_ADD1S</b>   ((uint32_t)0x80000000)</td></tr>
|
||
<tr class="separator:ga8fee932563d21382db9ecad458356af2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga84b3d044be3e63573a5f0d4d14d8e3b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84b3d044be3e63573a5f0d4d14d8e3b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_PM</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga84b3d044be3e63573a5f0d4d14d8e3b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5765274cda5284899563191cb505235a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5765274cda5284899563191cb505235a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HT</b>   ((uint32_t)0x00300000)</td></tr>
|
||
<tr class="separator:ga5765274cda5284899563191cb505235a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3b682daaa79917786d55c2bf44a80325"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3b682daaa79917786d55c2bf44a80325"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HT_0</b>   ((uint32_t)0x00100000)</td></tr>
|
||
<tr class="separator:ga3b682daaa79917786d55c2bf44a80325"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9a35c1a1f98f2aeb73235d940922f9cf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9a35c1a1f98f2aeb73235d940922f9cf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HT_1</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:ga9a35c1a1f98f2aeb73235d940922f9cf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf12107fe82e4f9de5ae4fdd6c169a846"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf12107fe82e4f9de5ae4fdd6c169a846"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HU</b>   ((uint32_t)0x000F0000)</td></tr>
|
||
<tr class="separator:gaf12107fe82e4f9de5ae4fdd6c169a846"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a235fd8965c706e7f57327f6e5ce72d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a235fd8965c706e7f57327f6e5ce72d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HU_0</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga1a235fd8965c706e7f57327f6e5ce72d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56f2bc31a8d01d7621de40d146b15fb7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56f2bc31a8d01d7621de40d146b15fb7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HU_1</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga56f2bc31a8d01d7621de40d146b15fb7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5d848f11cf3130bb6560d117f97b7da3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d848f11cf3130bb6560d117f97b7da3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HU_2</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga5d848f11cf3130bb6560d117f97b7da3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga703c813d88b2c9ab350cb0218ff4bbe7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga703c813d88b2c9ab350cb0218ff4bbe7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_HU_3</b>   ((uint32_t)0x00080000)</td></tr>
|
||
<tr class="separator:ga703c813d88b2c9ab350cb0218ff4bbe7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9743a3843868c712945a7c408183ad73"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9743a3843868c712945a7c408183ad73"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNT</b>   ((uint32_t)0x00007000)</td></tr>
|
||
<tr class="separator:ga9743a3843868c712945a7c408183ad73"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf04bea9e3f4645257b8bd955f3ba80ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf04bea9e3f4645257b8bd955f3ba80ce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNT_0</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gaf04bea9e3f4645257b8bd955f3ba80ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf30459ae8455ad0fb382dd866446c83"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf30459ae8455ad0fb382dd866446c83"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNT_1</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gadf30459ae8455ad0fb382dd866446c83"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga513f78562b18cfc36f52e80be9cb20d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga513f78562b18cfc36f52e80be9cb20d5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNT_2</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga513f78562b18cfc36f52e80be9cb20d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64b186af486822cc015cfec613f5cba9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64b186af486822cc015cfec613f5cba9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga64b186af486822cc015cfec613f5cba9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8ff1f79f2ab33d00a979979d486bc44"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8ff1f79f2ab33d00a979979d486bc44"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gab8ff1f79f2ab33d00a979979d486bc44"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga506d192fef16558c9b0b7ed9e1a9147c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga506d192fef16558c9b0b7ed9e1a9147c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga506d192fef16558c9b0b7ed9e1a9147c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga407a93c758b95a1ebf3c41c36fb6f07e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga407a93c758b95a1ebf3c41c36fb6f07e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga407a93c758b95a1ebf3c41c36fb6f07e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac55cd85d2e58a819637d15f70f7179a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac55cd85d2e58a819637d15f70f7179a0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_MNU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gac55cd85d2e58a819637d15f70f7179a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9fbdebcd1da2ea191cca51c222345f15"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9fbdebcd1da2ea191cca51c222345f15"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_ST</b>   ((uint32_t)0x00000070)</td></tr>
|
||
<tr class="separator:ga9fbdebcd1da2ea191cca51c222345f15"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90d733a561ad71ee4c63c4e0a3ed5f32"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90d733a561ad71ee4c63c4e0a3ed5f32"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_ST_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga90d733a561ad71ee4c63c4e0a3ed5f32"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga807073dc98612721530a79df5b5c265a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga807073dc98612721530a79df5b5c265a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_ST_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga807073dc98612721530a79df5b5c265a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee05d278bdd457b4f61d797e45520d13"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee05d278bdd457b4f61d797e45520d13"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_ST_2</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gaee05d278bdd457b4f61d797e45520d13"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac0d8fa76d45faccfe931d6227b29565a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac0d8fa76d45faccfe931d6227b29565a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_SU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gac0d8fa76d45faccfe931d6227b29565a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8990f4d1d493012289778e854c52e97e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8990f4d1d493012289778e854c52e97e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_SU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga8990f4d1d493012289778e854c52e97e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaab6f4275d2a15e7307363124c03a64a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab6f4275d2a15e7307363124c03a64a4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_SU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaab6f4275d2a15e7307363124c03a64a4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5610b3103a8a6653204f4fe7e9ea8587"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5610b3103a8a6653204f4fe7e9ea8587"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_SU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga5610b3103a8a6653204f4fe7e9ea8587"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga28790ae937a50ba6fb4aff5a9f5afbcb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga28790ae937a50ba6fb4aff5a9f5afbcb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSTR_SU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga28790ae937a50ba6fb4aff5a9f5afbcb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c76ea431470b87f22e7854bd5438d2f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4c76ea431470b87f22e7854bd5438d2f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_WDU</b>   ((uint32_t)0x0000E000)</td></tr>
|
||
<tr class="separator:ga4c76ea431470b87f22e7854bd5438d2f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e9cbf062e41eecacccde522e24452c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e9cbf062e41eecacccde522e24452c1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_WDU_0</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga4e9cbf062e41eecacccde522e24452c1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44259df3c6dc88e8168c7dcd5e6abf91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44259df3c6dc88e8168c7dcd5e6abf91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_WDU_1</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga44259df3c6dc88e8168c7dcd5e6abf91"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f2add59486679cc53f521c139d72852"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f2add59486679cc53f521c139d72852"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_WDU_2</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga7f2add59486679cc53f521c139d72852"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7bce43482443f2038a8eebc681067dd7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7bce43482443f2038a8eebc681067dd7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MT</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga7bce43482443f2038a8eebc681067dd7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a5912337df16624b4703d2065c5fdf4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a5912337df16624b4703d2065c5fdf4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MU</b>   ((uint32_t)0x00000F00)</td></tr>
|
||
<tr class="separator:ga2a5912337df16624b4703d2065c5fdf4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9cf9d23d49e121268a25445a7eed2f35"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9cf9d23d49e121268a25445a7eed2f35"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MU_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga9cf9d23d49e121268a25445a7eed2f35"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga49093134e4ead8b4990e5e1628db0692"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga49093134e4ead8b4990e5e1628db0692"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MU_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:ga49093134e4ead8b4990e5e1628db0692"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7f31eb674f5a67402b6a3eb578b70a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7f31eb674f5a67402b6a3eb578b70a5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MU_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gad7f31eb674f5a67402b6a3eb578b70a5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad67666c54ef1be79a500484a5e755827"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad67666c54ef1be79a500484a5e755827"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_MU_3</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gad67666c54ef1be79a500484a5e755827"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga39c9ff61f3b622b829aa9354ca84e44e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga39c9ff61f3b622b829aa9354ca84e44e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DT</b>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:ga39c9ff61f3b622b829aa9354ca84e44e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81e02a917946bddaa027a04538576533"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81e02a917946bddaa027a04538576533"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DT_0</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga81e02a917946bddaa027a04538576533"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga886739ae0e8c0f6144dbd774c203ed5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga886739ae0e8c0f6144dbd774c203ed5f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DT_1</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga886739ae0e8c0f6144dbd774c203ed5f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gace7ca73ebca21ed3a17315f06757042a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gace7ca73ebca21ed3a17315f06757042a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DU</b>   ((uint32_t)0x0000000F)</td></tr>
|
||
<tr class="separator:gace7ca73ebca21ed3a17315f06757042a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga08b7eccac0c3cd20a3f3cd8bce1693ad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga08b7eccac0c3cd20a3f3cd8bce1693ad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DU_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga08b7eccac0c3cd20a3f3cd8bce1693ad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa43ed53b8109ff32755885127ba987ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa43ed53b8109ff32755885127ba987ce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DU_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaa43ed53b8109ff32755885127ba987ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1b3d774b7df9cff6e6eecafa7c42a059"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1b3d774b7df9cff6e6eecafa7c42a059"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DU_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga1b3d774b7df9cff6e6eecafa7c42a059"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga209573a43dd1f21ef569d75593ad03f8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga209573a43dd1f21ef569d75593ad03f8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSDR_DU_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga209573a43dd1f21ef569d75593ad03f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fb913ce5f1c0e341b308d9b5858bfa9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fb913ce5f1c0e341b308d9b5858bfa9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TSSSR_SS</b>   ((uint32_t)0x0000FFFF)</td></tr>
|
||
<tr class="separator:ga2fb913ce5f1c0e341b308d9b5858bfa9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9b13b9724302c25fbca76684f5968528"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9b13b9724302c25fbca76684f5968528"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALP</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga9b13b9724302c25fbca76684f5968528"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga28f8c7f5f5bf772c81170a2eab055557"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga28f8c7f5f5bf772c81170a2eab055557"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALW8</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga28f8c7f5f5bf772c81170a2eab055557"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga70857526590d6f7e25d9551187105583"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga70857526590d6f7e25d9551187105583"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALW16</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:ga70857526590d6f7e25d9551187105583"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44fcacd12e1cfc1fa823c798cb6a7663"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44fcacd12e1cfc1fa823c798cb6a7663"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM</b>   ((uint32_t)0x000001FF)</td></tr>
|
||
<tr class="separator:ga44fcacd12e1cfc1fa823c798cb6a7663"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeffec95cc4cbbdbc77e907818b8c7ebd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeffec95cc4cbbdbc77e907818b8c7ebd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_0</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaeffec95cc4cbbdbc77e907818b8c7ebd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b908b77786838e5e2e8a1ee2cbbeeff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b908b77786838e5e2e8a1ee2cbbeeff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_1</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga4b908b77786838e5e2e8a1ee2cbbeeff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad09f14c1ff24a01d51d5b6c0bba220d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad09f14c1ff24a01d51d5b6c0bba220d6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_2</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gad09f14c1ff24a01d51d5b6c0bba220d6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9146fbef6a53896f3160c89ed651b90"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9146fbef6a53896f3160c89ed651b90"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_3</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:gac9146fbef6a53896f3160c89ed651b90"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5fe04fc9762d3f680f9145a50898c27b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5fe04fc9762d3f680f9145a50898c27b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_4</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga5fe04fc9762d3f680f9145a50898c27b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadc4966c71cab83be4069e0566222d375"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc4966c71cab83be4069e0566222d375"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_5</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gadc4966c71cab83be4069e0566222d375"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae240b185d0c9c6e314a456627e6e4834"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae240b185d0c9c6e314a456627e6e4834"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_6</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:gae240b185d0c9c6e314a456627e6e4834"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab8880325073e167137366402f15d5683"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab8880325073e167137366402f15d5683"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_7</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gab8880325073e167137366402f15d5683"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8381cc75166acfc4b4c686ad7e5e599a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8381cc75166acfc4b4c686ad7e5e599a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_CALR_CALM_8</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga8381cc75166acfc4b4c686ad7e5e599a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8d9515fd74e3bcf03f4e62d8c7e1b070"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d9515fd74e3bcf03f4e62d8c7e1b070"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_ALARMOUTTYPE</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:ga8d9515fd74e3bcf03f4e62d8c7e1b070"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga872cbfe2e79e7fe2a4bfad6086f4ac49"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga872cbfe2e79e7fe2a4bfad6086f4ac49"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TSINSEL</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:ga872cbfe2e79e7fe2a4bfad6086f4ac49"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga989cde7332b2ec0b3934cb909514938d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga989cde7332b2ec0b3934cb909514938d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPINSEL</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:ga989cde7332b2ec0b3934cb909514938d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ef294e75771913e4a47386f42a23f72"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9ef294e75771913e4a47386f42a23f72"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPPUDIS</b>   ((uint32_t)0x00008000)</td></tr>
|
||
<tr class="separator:ga9ef294e75771913e4a47386f42a23f72"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7b73d2b8da78967a6f594dbffe58c222"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b73d2b8da78967a6f594dbffe58c222"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPPRCH</b>   ((uint32_t)0x00006000)</td></tr>
|
||
<tr class="separator:ga7b73d2b8da78967a6f594dbffe58c222"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae010ed965c1e968cc14f988d50662546"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae010ed965c1e968cc14f988d50662546"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPPRCH_0</b>   ((uint32_t)0x00002000)</td></tr>
|
||
<tr class="separator:gae010ed965c1e968cc14f988d50662546"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga16f0faa59aa4490d696d1fec767aae41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga16f0faa59aa4490d696d1fec767aae41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPPRCH_1</b>   ((uint32_t)0x00004000)</td></tr>
|
||
<tr class="separator:ga16f0faa59aa4490d696d1fec767aae41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab1cb37c43747c779f7db2842a2582e67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab1cb37c43747c779f7db2842a2582e67"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFLT</b>   ((uint32_t)0x00001800)</td></tr>
|
||
<tr class="separator:gab1cb37c43747c779f7db2842a2582e67"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa356fb5db5ab398728afef0ae39214c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa356fb5db5ab398728afef0ae39214c4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFLT_0</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:gaa356fb5db5ab398728afef0ae39214c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga472efa1bd3c9462cbd058d73a7d6525e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga472efa1bd3c9462cbd058d73a7d6525e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFLT_1</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:ga472efa1bd3c9462cbd058d73a7d6525e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8ad84446486b8c9f640fa54d50ecc0e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ad84446486b8c9f640fa54d50ecc0e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFREQ</b>   ((uint32_t)0x00000700)</td></tr>
|
||
<tr class="separator:ga8ad84446486b8c9f640fa54d50ecc0e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54e7f69e04759d1b0667e56830a6f2ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54e7f69e04759d1b0667e56830a6f2ea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFREQ_0</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:ga54e7f69e04759d1b0667e56830a6f2ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabb533067640fcf87ad77027ce936e9b7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabb533067640fcf87ad77027ce936e9b7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFREQ_1</b>   ((uint32_t)0x00000200)</td></tr>
|
||
<tr class="separator:gabb533067640fcf87ad77027ce936e9b7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf532e727bfe6c7fc7822d15f9436e1b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf532e727bfe6c7fc7822d15f9436e1b5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPFREQ_2</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:gaf532e727bfe6c7fc7822d15f9436e1b5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac929fab94fdca2d1b3b3cf7c93fe6e49"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac929fab94fdca2d1b3b3cf7c93fe6e49"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPTS</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:gac929fab94fdca2d1b3b3cf7c93fe6e49"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0fb33b24d2ebc19e7fe52f0661a3085"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa0fb33b24d2ebc19e7fe52f0661a3085"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMPIE</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaa0fb33b24d2ebc19e7fe52f0661a3085"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga76f85925873bcd3f795417053bfc5f33"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga76f85925873bcd3f795417053bfc5f33"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMP1TRG</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga76f85925873bcd3f795417053bfc5f33"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa68c195cf709d18cd426560302b97852"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa68c195cf709d18cd426560302b97852"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_TAFCR_TAMP1E</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaa68c195cf709d18cd426560302b97852"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7b0550ccc175ff54e560cc5fb96fbb2c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7b0550ccc175ff54e560cc5fb96fbb2c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_MASKSS</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:ga7b0550ccc175ff54e560cc5fb96fbb2c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeebbc0dfc0a20887ef3582feaa5f1c2b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeebbc0dfc0a20887ef3582feaa5f1c2b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_MASKSS_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gaeebbc0dfc0a20887ef3582feaa5f1c2b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabbdb202f388835593843f480c3b3af57"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabbdb202f388835593843f480c3b3af57"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_MASKSS_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:gabbdb202f388835593843f480c3b3af57"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga95feb5de45a74d7c75c1fc6515c32870"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95feb5de45a74d7c75c1fc6515c32870"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_MASKSS_2</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga95feb5de45a74d7c75c1fc6515c32870"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae94c65876a1baf0984a6f85aa836b8d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae94c65876a1baf0984a6f85aa836b8d0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_MASKSS_3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gae94c65876a1baf0984a6f85aa836b8d0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a6b683531fded4e2a77d047da7eb203"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a6b683531fded4e2a77d047da7eb203"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMASSR_SS</b>   ((uint32_t)0x00007FFF)</td></tr>
|
||
<tr class="separator:ga4a6b683531fded4e2a77d047da7eb203"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf287b0ec7dbf8e9d436cb78da287b244"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf287b0ec7dbf8e9d436cb78da287b244"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_MASKSS</b>   ((uint32_t)0x0F000000)</td></tr>
|
||
<tr class="separator:gaf287b0ec7dbf8e9d436cb78da287b244"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad4d60185d1ac432b24b0a95e2918902f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4d60185d1ac432b24b0a95e2918902f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_MASKSS_0</b>   ((uint32_t)0x01000000)</td></tr>
|
||
<tr class="separator:gad4d60185d1ac432b24b0a95e2918902f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9763a1a382e40cc2ebfa6d84369580df"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9763a1a382e40cc2ebfa6d84369580df"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_MASKSS_1</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga9763a1a382e40cc2ebfa6d84369580df"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga598283f8a8926f0dcb7916a2224f79bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga598283f8a8926f0dcb7916a2224f79bc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_MASKSS_2</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:ga598283f8a8926f0dcb7916a2224f79bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadf017c71fc7eb34519de3945a028677b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadf017c71fc7eb34519de3945a028677b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_MASKSS_3</b>   ((uint32_t)0x08000000)</td></tr>
|
||
<tr class="separator:gadf017c71fc7eb34519de3945a028677b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33ae74f38392431aa631d397a7e7c305"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33ae74f38392431aa631d397a7e7c305"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_ALRMBSSR_SS</b>   ((uint32_t)0x00007FFF)</td></tr>
|
||
<tr class="separator:ga33ae74f38392431aa631d397a7e7c305"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae0d7c3115465079f04cfb97a7faabc59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae0d7c3115465079f04cfb97a7faabc59"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP0R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gae0d7c3115465079f04cfb97a7faabc59"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafbc4b6dfeff87332124f271b86eb0c56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafbc4b6dfeff87332124f271b86eb0c56"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP1R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gafbc4b6dfeff87332124f271b86eb0c56"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga34fda9ee6115f0de9588e22c46602d89"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34fda9ee6115f0de9588e22c46602d89"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP2R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga34fda9ee6115f0de9588e22c46602d89"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90403ff99c08f0abc379447823e5e841"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90403ff99c08f0abc379447823e5e841"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP3R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga90403ff99c08f0abc379447823e5e841"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeed1b338e9526d817a1fd01304b8851c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeed1b338e9526d817a1fd01304b8851c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP4R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gaeed1b338e9526d817a1fd01304b8851c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e8954ab0ead8bb788d5d8eebf2f5c4c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e8954ab0ead8bb788d5d8eebf2f5c4c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP5R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga4e8954ab0ead8bb788d5d8eebf2f5c4c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4b9ee9eb5d024ccd5809fcc20fd51f5b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b9ee9eb5d024ccd5809fcc20fd51f5b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP6R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga4b9ee9eb5d024ccd5809fcc20fd51f5b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab0f1ae07f7b1815bf58b464dc7366731"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab0f1ae07f7b1815bf58b464dc7366731"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP7R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gab0f1ae07f7b1815bf58b464dc7366731"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2bd10acb9e5ce5225af4ff895bd3bb82"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2bd10acb9e5ce5225af4ff895bd3bb82"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP8R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga2bd10acb9e5ce5225af4ff895bd3bb82"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9aa3d0d90de22a1dbf3b6de2b7ed4c9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9aa3d0d90de22a1dbf3b6de2b7ed4c9e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP9R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga9aa3d0d90de22a1dbf3b6de2b7ed4c9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2179063a3078a211c3b697ce012ab5a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2179063a3078a211c3b697ce012ab5a0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP10R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga2179063a3078a211c3b697ce012ab5a0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab250f9423dee41b165aa8f02d2fc1fe7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab250f9423dee41b165aa8f02d2fc1fe7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP11R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gab250f9423dee41b165aa8f02d2fc1fe7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaefe1b6108ac49197b28c9bee31bbaf3b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaefe1b6108ac49197b28c9bee31bbaf3b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP12R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gaefe1b6108ac49197b28c9bee31bbaf3b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0e77435e16bdebf3491eb0e30bd10b0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e77435e16bdebf3491eb0e30bd10b0d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP13R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga0e77435e16bdebf3491eb0e30bd10b0d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5f07ee6d227deaa11e0ae035121185b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5f07ee6d227deaa11e0ae035121185b0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP14R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga5f07ee6d227deaa11e0ae035121185b0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae543b0dd58f03c2f70bb6b3b65232863"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae543b0dd58f03c2f70bb6b3b65232863"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP15R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gae543b0dd58f03c2f70bb6b3b65232863"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf0add0c768094f0de71bb4e50fbcce6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf0add0c768094f0de71bb4e50fbcce6e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP16R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gaf0add0c768094f0de71bb4e50fbcce6e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga059aaedb55963f39e8724d50d55d5282"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga059aaedb55963f39e8724d50d55d5282"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP17R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga059aaedb55963f39e8724d50d55d5282"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga66154eb091275e87a4bd53e87ef9214e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga66154eb091275e87a4bd53e87ef9214e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP18R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:ga66154eb091275e87a4bd53e87ef9214e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafa4c31e33d851fde2715059ea28dac6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafa4c31e33d851fde2715059ea28dac6f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>RTC_BKP19R</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
|
||
<tr class="separator:gafa4c31e33d851fde2715059ea28dac6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabc29912477e15bf48a732a8a3b55ae81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabc29912477e15bf48a732a8a3b55ae81">SAI_GCR_SYNCIN</a>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:gabc29912477e15bf48a732a8a3b55ae81"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1d53daedcc93ebd30f9c358955cd3362"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d53daedcc93ebd30f9c358955cd3362">SAI_GCR_SYNCIN_0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga1d53daedcc93ebd30f9c358955cd3362"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7c65de3f7ddbf31c90da6b1453a2ff69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c65de3f7ddbf31c90da6b1453a2ff69">SAI_GCR_SYNCIN_1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga7c65de3f7ddbf31c90da6b1453a2ff69"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab0b9aa1a30108cdfe3088c4cacaeb27e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0b9aa1a30108cdfe3088c4cacaeb27e">SAI_GCR_SYNCOUT</a>   ((uint32_t)0x00000030)</td></tr>
|
||
<tr class="separator:gab0b9aa1a30108cdfe3088c4cacaeb27e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e3a859999059ec321655a71ff53440f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e3a859999059ec321655a71ff53440f">SAI_GCR_SYNCOUT_0</a>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:ga4e3a859999059ec321655a71ff53440f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2c03899faccbae6c741743eb032dedc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2c03899faccbae6c741743eb032dedc">SAI_GCR_SYNCOUT_1</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gab2c03899faccbae6c741743eb032dedc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga51af4b787c1e5e049f3bb22b82902866"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51af4b787c1e5e049f3bb22b82902866">SAI_xCR1_MODE</a>   ((uint32_t)0x00000003)</td></tr>
|
||
<tr class="separator:ga51af4b787c1e5e049f3bb22b82902866"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga24269e60d3836bf6524a8e56b2f8bba1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga24269e60d3836bf6524a8e56b2f8bba1">SAI_xCR1_MODE_0</a>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga24269e60d3836bf6524a8e56b2f8bba1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c25169081899de44a05e793e46d7ca5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c25169081899de44a05e793e46d7ca5">SAI_xCR1_MODE_1</a>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga4c25169081899de44a05e793e46d7ca5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaf8432db16a815678078cb1ffbd31a6f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf8432db16a815678078cb1ffbd31a6f">SAI_xCR1_PRTCFG</a>   ((uint32_t)0x0000000C)</td></tr>
|
||
<tr class="separator:gaaf8432db16a815678078cb1ffbd31a6f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa7d920226316389ecf03b9854ddf9755"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7d920226316389ecf03b9854ddf9755">SAI_xCR1_PRTCFG_0</a>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:gaa7d920226316389ecf03b9854ddf9755"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8714977ece0c80ddb952222a0923d81d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8714977ece0c80ddb952222a0923d81d">SAI_xCR1_PRTCFG_1</a>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga8714977ece0c80ddb952222a0923d81d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7c1204482a8c5427bffe720848696097"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c1204482a8c5427bffe720848696097">SAI_xCR1_DS</a>   ((uint32_t)0x000000E0)</td></tr>
|
||
<tr class="separator:ga7c1204482a8c5427bffe720848696097"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabb5dd23287a176f80d241f0dfb8fcc7d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb5dd23287a176f80d241f0dfb8fcc7d">SAI_xCR1_DS_0</a>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gabb5dd23287a176f80d241f0dfb8fcc7d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4148a11a2d9ac1a97da766bd585e5c8a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4148a11a2d9ac1a97da766bd585e5c8a">SAI_xCR1_DS_1</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:gab50b27e8638b16d12ef00e80bf0f097e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab50b27e8638b16d12ef00e80bf0f097e">SAI_xCR1_DS_2</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="memitem:ga86dbec701e43531946ca96792b63e5ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga86dbec701e43531946ca96792b63e5ff">SAI_xCR1_LSBFIRST</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="memitem:gae2c0c68bf65088e0ddeb9a1759aff3f7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2c0c68bf65088e0ddeb9a1759aff3f7">SAI_xCR1_CKSTR</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="memitem:ga0179f00f5bd962763b6425d930d449db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0179f00f5bd962763b6425d930d449db">SAI_xCR1_SYNCEN</a>   ((uint32_t)0x00000C00)</td></tr>
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<tr class="memitem:gab62d1d3571fbfe85bdaa913b2911856e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab62d1d3571fbfe85bdaa913b2911856e">SAI_xCR1_SYNCEN_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:gad59a87c05a0e147d3ed2364ccf91b18b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad59a87c05a0e147d3ed2364ccf91b18b">SAI_xCR1_SYNCEN_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="memitem:ga37f2b989e1a54b2c4393cd222e54f4d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37f2b989e1a54b2c4393cd222e54f4d2">SAI_xCR1_MONO</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="memitem:ga3c79a642d52f20f97ab575f655b1ddea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c79a642d52f20f97ab575f655b1ddea">SAI_xCR1_OUTDRIV</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga3c79a642d52f20f97ab575f655b1ddea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7916f81ebe07b5109b0ca405d41eb95b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7916f81ebe07b5109b0ca405d41eb95b">SAI_xCR1_SAIEN</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga7916f81ebe07b5109b0ca405d41eb95b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaed9d19f7ddcdf86b0db1843a1b0d6cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaed9d19f7ddcdf86b0db1843a1b0d6cd">SAI_xCR1_DMAEN</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="memitem:ga98132c4a713c61f232c51b5c5e73622d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga98132c4a713c61f232c51b5c5e73622d">SAI_xCR1_NODIV</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga98132c4a713c61f232c51b5c5e73622d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47d3161434e2c4613f37ebe676735aaf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga47d3161434e2c4613f37ebe676735aaf">SAI_xCR1_MCKDIV</a>   ((uint32_t)0x00780000)</td></tr>
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<tr class="separator:ga47d3161434e2c4613f37ebe676735aaf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga485a62dda2c1af628ead9fd7db830c69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga485a62dda2c1af628ead9fd7db830c69">SAI_xCR1_MCKDIV_0</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="memitem:gaa253fffbd9bb4a514266afd305016485"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa253fffbd9bb4a514266afd305016485">SAI_xCR1_MCKDIV_1</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:gaa253fffbd9bb4a514266afd305016485"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga95fa7d8a7306afaacd841374f5baa3e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95fa7d8a7306afaacd841374f5baa3e9">SAI_xCR1_MCKDIV_2</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:ga95fa7d8a7306afaacd841374f5baa3e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac064c863cb6d75c11728a4642079fe99"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac064c863cb6d75c11728a4642079fe99">SAI_xCR1_MCKDIV_3</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gac064c863cb6d75c11728a4642079fe99"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga713102e56f4bb8c7c942662c82d04463"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga713102e56f4bb8c7c942662c82d04463">SAI_xCR2_FTH</a>   ((uint32_t)0x00000003)</td></tr>
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<tr class="separator:ga713102e56f4bb8c7c942662c82d04463"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa71082a8712881f93ee19875609c699a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa71082a8712881f93ee19875609c699a">SAI_xCR2_FTH_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gaa71082a8712881f93ee19875609c699a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada48fb2897794cd0d5436909c9706046"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada48fb2897794cd0d5436909c9706046">SAI_xCR2_FTH_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gada48fb2897794cd0d5436909c9706046"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2baa86fa37d7709b06a04664a52be0a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2baa86fa37d7709b06a04664a52be0a1">SAI_xCR2_FFLUSH</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga2baa86fa37d7709b06a04664a52be0a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb67ecd983af1e4f8c9a5935c013752d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabb67ecd983af1e4f8c9a5935c013752d">SAI_xCR2_TRIS</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gabb67ecd983af1e4f8c9a5935c013752d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga000d56139b0c8d823a8000c8c210b247"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga000d56139b0c8d823a8000c8c210b247">SAI_xCR2_MUTE</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga000d56139b0c8d823a8000c8c210b247"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ba4ba2073e0737d432aeca306cc47e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5ba4ba2073e0737d432aeca306cc47e2">SAI_xCR2_MUTEVAL</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga5ba4ba2073e0737d432aeca306cc47e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafeea35e023c198d82d24fa64ab3081d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafeea35e023c198d82d24fa64ab3081d9">SAI_xCR2_MUTECNT</a>   ((uint32_t)0x00001F80)</td></tr>
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<tr class="separator:gafeea35e023c198d82d24fa64ab3081d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga738aaa45d7140ea8adb69990c6b73f11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga738aaa45d7140ea8adb69990c6b73f11">SAI_xCR2_MUTECNT_0</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga738aaa45d7140ea8adb69990c6b73f11"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8646398473c7b5d42ae6172796848562"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8646398473c7b5d42ae6172796848562">SAI_xCR2_MUTECNT_1</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga8646398473c7b5d42ae6172796848562"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga008e089b87f5e7a0a63c565e1f59c206"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga008e089b87f5e7a0a63c565e1f59c206">SAI_xCR2_MUTECNT_2</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga008e089b87f5e7a0a63c565e1f59c206"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1271dbdafa65f001779fedc9c9320166"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1271dbdafa65f001779fedc9c9320166">SAI_xCR2_MUTECNT_3</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:ga64fa52897b581b1d2f36a23027f74770"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga64fa52897b581b1d2f36a23027f74770">SAI_xCR2_MUTECNT_4</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga64fa52897b581b1d2f36a23027f74770"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga296db2ad211b0c3b4330a4c3b1f0233f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga296db2ad211b0c3b4330a4c3b1f0233f">SAI_xCR2_MUTECNT_5</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga296db2ad211b0c3b4330a4c3b1f0233f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a8f6db7fd5fe5f0e264fa6c184d02e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a8f6db7fd5fe5f0e264fa6c184d02e1">SAI_xCR2_CPL</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga3a8f6db7fd5fe5f0e264fa6c184d02e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf8732274be296455ea01ac0b95232c4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf8732274be296455ea01ac0b95232c4d">SAI_xCR2_COMP</a>   ((uint32_t)0x0000C000)</td></tr>
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<tr class="separator:gaf8732274be296455ea01ac0b95232c4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e73ed73e3404aa41ae0edad8af036f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e73ed73e3404aa41ae0edad8af036f8">SAI_xCR2_COMP_0</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga4e73ed73e3404aa41ae0edad8af036f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07d441ea4c041f91e4879a5b32278128"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07d441ea4c041f91e4879a5b32278128">SAI_xCR2_COMP_1</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga07d441ea4c041f91e4879a5b32278128"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7145cd48fe5f1135082db1dd5bab5697"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7145cd48fe5f1135082db1dd5bab5697">SAI_xFRCR_FRL</a>   ((uint32_t)0x000000FF)</td></tr>
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<tr class="separator:ga7145cd48fe5f1135082db1dd5bab5697"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabeeb587d1dd769e9dba21d96c15b0a5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabeeb587d1dd769e9dba21d96c15b0a5d">SAI_xFRCR_FRL_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gabeeb587d1dd769e9dba21d96c15b0a5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0c5bdfa2777ca5890798d7aaf7067b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad0c5bdfa2777ca5890798d7aaf7067b9">SAI_xFRCR_FRL_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gad0c5bdfa2777ca5890798d7aaf7067b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e705e32fff1ba410938636af8b5bc38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e705e32fff1ba410938636af8b5bc38">SAI_xFRCR_FRL_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga8e705e32fff1ba410938636af8b5bc38"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad568d991beac0d0f1970ec66731c974b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad568d991beac0d0f1970ec66731c974b">SAI_xFRCR_FRL_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gad568d991beac0d0f1970ec66731c974b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c72db15f0f18329f497d1809be47298"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c72db15f0f18329f497d1809be47298">SAI_xFRCR_FRL_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga1c72db15f0f18329f497d1809be47298"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4ef47f5def6ac6f7e18c52349e427a0a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4ef47f5def6ac6f7e18c52349e427a0a">SAI_xFRCR_FRL_5</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga4ef47f5def6ac6f7e18c52349e427a0a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37e4b5d4429a6b6558bf92565a16de6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga37e4b5d4429a6b6558bf92565a16de6a">SAI_xFRCR_FRL_6</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="memitem:ga9a63a0bbb35ceb0fedbd1f32c0205544"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a63a0bbb35ceb0fedbd1f32c0205544">SAI_xFRCR_FRL_7</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="memitem:gad5da4d6d92e108bac869ca37a1d9510c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5da4d6d92e108bac869ca37a1d9510c">SAI_xFRCR_FSALL</a>   ((uint32_t)0x00007F00)</td></tr>
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<tr class="memitem:ga8a6c7e235ee451ed574092b0ceb974e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a6c7e235ee451ed574092b0ceb974e1">SAI_xFRCR_FSALL_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="memitem:ga3a74c00e149382365fa40c1fe4535794"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a74c00e149382365fa40c1fe4535794">SAI_xFRCR_FSALL_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="memitem:gad3a7f33c72264a5adeb95cb02e413601"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3a7f33c72264a5adeb95cb02e413601">SAI_xFRCR_FSALL_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="memitem:ga12a31862f1e9c31bf35e35eea8920f38"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12a31862f1e9c31bf35e35eea8920f38">SAI_xFRCR_FSALL_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="memitem:ga2dcbbf60f36e99c371327f02a9d151ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2dcbbf60f36e99c371327f02a9d151ae">SAI_xFRCR_FSALL_4</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="memitem:ga520f01c1d1fa3f61c3b1acb5864cd6aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga520f01c1d1fa3f61c3b1acb5864cd6aa">SAI_xFRCR_FSALL_5</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="memitem:ga523a1caf60b37eb9cc56f19e7d0dd91a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga523a1caf60b37eb9cc56f19e7d0dd91a">SAI_xFRCR_FSALL_6</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="memitem:ga7b9e1700cf196e3dec87c1362023ca29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b9e1700cf196e3dec87c1362023ca29">SAI_xFRCR_FSDEF</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="memitem:ga25a91a67abdf0da4d675611ec50a06d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25a91a67abdf0da4d675611ec50a06d0">SAI_xFRCR_FSPO</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga25a91a67abdf0da4d675611ec50a06d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga250708d79ab12828bb6388390790a406"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga250708d79ab12828bb6388390790a406">SAI_xFRCR_FSOFF</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="memitem:gae7765ebf87061237afaa5995af169e52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7765ebf87061237afaa5995af169e52">SAI_xSLOTR_FBOFF</a>   ((uint32_t)0x0000001F)</td></tr>
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<tr class="memitem:ga7b408483c0ead128ebc644ae18f56640"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b408483c0ead128ebc644ae18f56640">SAI_xSLOTR_FBOFF_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:ga0bccac768ad131f506077eb62bae5735"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bccac768ad131f506077eb62bae5735">SAI_xSLOTR_FBOFF_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="memitem:ga3bd460f33d3668f3ff845d5bcdb09d1a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3bd460f33d3668f3ff845d5bcdb09d1a">SAI_xSLOTR_FBOFF_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:ga49d37e327ea19b508974044944370f67"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49d37e327ea19b508974044944370f67">SAI_xSLOTR_FBOFF_3</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="memitem:gad4dc62365e1f26821a794a1d6d445e65"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad4dc62365e1f26821a794a1d6d445e65">SAI_xSLOTR_FBOFF_4</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="memitem:ga5d5a75af6a1bddfb90900eb32a954b79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d5a75af6a1bddfb90900eb32a954b79">SAI_xSLOTR_SLOTSZ</a>   ((uint32_t)0x000000C0)</td></tr>
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<tr class="separator:ga5d5a75af6a1bddfb90900eb32a954b79"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab43df0af67bd0155111e18bcecbdf7ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab43df0af67bd0155111e18bcecbdf7ad">SAI_xSLOTR_SLOTSZ_0</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gab43df0af67bd0155111e18bcecbdf7ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf84f10c4f64d886eed350d7227f112a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf84f10c4f64d886eed350d7227f112a2">SAI_xSLOTR_SLOTSZ_1</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaf84f10c4f64d886eed350d7227f112a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17cb9f8174d764be83e5317d3e1035d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga17cb9f8174d764be83e5317d3e1035d7">SAI_xSLOTR_NBSLOT</a>   ((uint32_t)0x00000F00)</td></tr>
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<tr class="separator:ga17cb9f8174d764be83e5317d3e1035d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e4da866d6d37aa5bf683719627e987d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6e4da866d6d37aa5bf683719627e987d">SAI_xSLOTR_NBSLOT_0</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga6e4da866d6d37aa5bf683719627e987d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6fa38bb50c74d9be58506d6254fcb9eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fa38bb50c74d9be58506d6254fcb9eb">SAI_xSLOTR_NBSLOT_1</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga6fa38bb50c74d9be58506d6254fcb9eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6583a05ab1fb085bd3a8efb549a66cd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6583a05ab1fb085bd3a8efb549a66cd0">SAI_xSLOTR_NBSLOT_2</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga6583a05ab1fb085bd3a8efb549a66cd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbba380cbd21b4a615f3e3c6f5787f5b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbba380cbd21b4a615f3e3c6f5787f5b">SAI_xSLOTR_NBSLOT_3</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gadbba380cbd21b4a615f3e3c6f5787f5b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac3be5abc4ae85eb99423ad87c2742813"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3be5abc4ae85eb99423ad87c2742813">SAI_xSLOTR_SLOTEN</a>   ((uint32_t)0xFFFF0000)</td></tr>
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<tr class="separator:gac3be5abc4ae85eb99423ad87c2742813"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19cf98322a8a9297bf189674085a3c4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19cf98322a8a9297bf189674085a3c4d">SAI_xIMR_OVRUDRIE</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga19cf98322a8a9297bf189674085a3c4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86d1812361eb7081a60d575fbc1c664e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga86d1812361eb7081a60d575fbc1c664e">SAI_xIMR_MUTEDETIE</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga86d1812361eb7081a60d575fbc1c664e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bce2334c9381068661356c84b947507"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bce2334c9381068661356c84b947507">SAI_xIMR_WCKCFGIE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga4bce2334c9381068661356c84b947507"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0ddbd32ec7f069219827247614454f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae0ddbd32ec7f069219827247614454f9">SAI_xIMR_FREQIE</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="memitem:ga16c51a8eacd28e521cf3da6d3a427a32"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16c51a8eacd28e521cf3da6d3a427a32">SAI_xIMR_CNRDYIE</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga16c51a8eacd28e521cf3da6d3a427a32"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5aef4af228a1ce820c6d83615aa5cd5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5aef4af228a1ce820c6d83615aa5cd5c">SAI_xIMR_AFSDETIE</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga5aef4af228a1ce820c6d83615aa5cd5c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ac59347c7f574af79b586a793b2160f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ac59347c7f574af79b586a793b2160f">SAI_xIMR_LFSDETIE</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga1ac59347c7f574af79b586a793b2160f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac935e26343913d548d1fa4a1d53d37df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac935e26343913d548d1fa4a1d53d37df">SAI_xSR_OVRUDR</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gac935e26343913d548d1fa4a1d53d37df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga92f97a8a22c3301d76e3704fb70d1234"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga92f97a8a22c3301d76e3704fb70d1234">SAI_xSR_MUTEDET</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga92f97a8a22c3301d76e3704fb70d1234"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac85199d384ead397bc7e5874b948e798"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac85199d384ead397bc7e5874b948e798">SAI_xSR_WCKCFG</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="memitem:gab5530f57526edd6dc0d2774042f8f5cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5530f57526edd6dc0d2774042f8f5cc">SAI_xSR_FREQ</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gab5530f57526edd6dc0d2774042f8f5cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59176cbf38a7bf9913215ca9cc716da7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59176cbf38a7bf9913215ca9cc716da7">SAI_xSR_CNRDY</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga59176cbf38a7bf9913215ca9cc716da7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5acc2e10428061bed46dc98ae7aa7f31"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5acc2e10428061bed46dc98ae7aa7f31">SAI_xSR_AFSDET</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga5acc2e10428061bed46dc98ae7aa7f31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa2d45adbe2be27461e25ecbf736e0500"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa2d45adbe2be27461e25ecbf736e0500">SAI_xSR_LFSDET</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaa2d45adbe2be27461e25ecbf736e0500"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59818375f1cff9c6f6f7236282786e05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59818375f1cff9c6f6f7236282786e05">SAI_xSR_FLVL</a>   ((uint32_t)0x00070000)</td></tr>
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<tr class="separator:ga59818375f1cff9c6f6f7236282786e05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga997ab54aae94ba235453fdfabd9d87ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga997ab54aae94ba235453fdfabd9d87ce">SAI_xSR_FLVL_0</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="memitem:ga506ef457d3e6a1b29c0d2d823574d30a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga506ef457d3e6a1b29c0d2d823574d30a">SAI_xSR_FLVL_1</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga506ef457d3e6a1b29c0d2d823574d30a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09ba36509d0ee8a339bd65002529fe5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09ba36509d0ee8a339bd65002529fe5d">SAI_xSR_FLVL_2</a>   ((uint32_t)0x00030000)</td></tr>
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<tr class="separator:ga09ba36509d0ee8a339bd65002529fe5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2055a162a6d48320dd850efe26666986"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2055a162a6d48320dd850efe26666986">SAI_xCLRFR_COVRUDR</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga2055a162a6d48320dd850efe26666986"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8fc93014165f8d5f1543f08ee91602b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8fc93014165f8d5f1543f08ee91602b8">SAI_xCLRFR_CMUTEDET</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga8fc93014165f8d5f1543f08ee91602b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac253542238f77deb2ea84843653cb06b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac253542238f77deb2ea84843653cb06b">SAI_xCLRFR_CWCKCFG</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gac253542238f77deb2ea84843653cb06b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6594324f23f4ead6abc8fec3b94e4606"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6594324f23f4ead6abc8fec3b94e4606">SAI_xCLRFR_CFREQ</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga6594324f23f4ead6abc8fec3b94e4606"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef77e53ee176c9ba61416ca5503ac717"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaef77e53ee176c9ba61416ca5503ac717">SAI_xCLRFR_CCNRDY</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:gaef77e53ee176c9ba61416ca5503ac717"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9dc76390a8daf386c8932b54957a6569"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9dc76390a8daf386c8932b54957a6569">SAI_xCLRFR_CAFSDET</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga9dc76390a8daf386c8932b54957a6569"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf27f000890347520975d00db031f8998"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf27f000890347520975d00db031f8998">SAI_xCLRFR_CLFSDET</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:gaf27f000890347520975d00db031f8998"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa01089cc7783e04655bd5cfbf25c6f52"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa01089cc7783e04655bd5cfbf25c6f52"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SAI_xDR_DATA</b>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:gaa01089cc7783e04655bd5cfbf25c6f52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf125c56eeb40163b617c9fb6329da67f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf125c56eeb40163b617c9fb6329da67f">SDIO_POWER_PWRCTRL</a>   ((uint8_t)0x03)</td></tr>
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<tr class="separator:gaf125c56eeb40163b617c9fb6329da67f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa82b7689b02f54318d3f629d70b85098"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa82b7689b02f54318d3f629d70b85098">SDIO_POWER_PWRCTRL_0</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:gaa82b7689b02f54318d3f629d70b85098"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadd149efb1d6062f37165ac01268a875e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadd149efb1d6062f37165ac01268a875e">SDIO_POWER_PWRCTRL_1</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:gadd149efb1d6062f37165ac01268a875e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga316271d0147b22c6267fc563d4c24424"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga316271d0147b22c6267fc563d4c24424">SDIO_CLKCR_CLKDIV</a>   ((uint16_t)0x00FF)</td></tr>
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<tr class="separator:ga316271d0147b22c6267fc563d4c24424"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf27847573683f91dbfe387a2571b514f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf27847573683f91dbfe387a2571b514f">SDIO_CLKCR_CLKEN</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gaf27847573683f91dbfe387a2571b514f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafbb618f32aef2970fd8b8b285f7b4118"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafbb618f32aef2970fd8b8b285f7b4118">SDIO_CLKCR_PWRSAV</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gafbb618f32aef2970fd8b8b285f7b4118"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1f362c1d228156c50639d79b9be99c9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1f362c1d228156c50639d79b9be99c9b">SDIO_CLKCR_BYPASS</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga1f362c1d228156c50639d79b9be99c9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9d57d7917c39bdc5309506e8c28b7d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9d57d7917c39bdc5309506e8c28b7d7">SDIO_CLKCR_WIDBUS</a>   ((uint16_t)0x1800)</td></tr>
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<tr class="separator:gae9d57d7917c39bdc5309506e8c28b7d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab532dbf366c3fb731488017b0a794151"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab532dbf366c3fb731488017b0a794151">SDIO_CLKCR_WIDBUS_0</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gab532dbf366c3fb731488017b0a794151"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49f3e7998bca487f5354ef6f8dffbb21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49f3e7998bca487f5354ef6f8dffbb21">SDIO_CLKCR_WIDBUS_1</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga49f3e7998bca487f5354ef6f8dffbb21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad124bd76f6543497c90372e182ec48a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad124bd76f6543497c90372e182ec48a2">SDIO_CLKCR_NEGEDGE</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gad124bd76f6543497c90372e182ec48a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga693d7b533dd5a5a668bc13b4365b18dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga693d7b533dd5a5a668bc13b4365b18dc">SDIO_CLKCR_HWFC_EN</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga693d7b533dd5a5a668bc13b4365b18dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d917a4fdc7442e270c2c727df78b819"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d917a4fdc7442e270c2c727df78b819">SDIO_ARG_CMDARG</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga2d917a4fdc7442e270c2c727df78b819"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf91b593b5681a68db5ff9fd11600c9c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf91b593b5681a68db5ff9fd11600c9c8">SDIO_CMD_CMDINDEX</a>   ((uint16_t)0x003F)</td></tr>
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<tr class="separator:gaf91b593b5681a68db5ff9fd11600c9c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d617f0e08d697c3b263e6a79f417d0f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d617f0e08d697c3b263e6a79f417d0f">SDIO_CMD_WAITRESP</a>   ((uint16_t)0x00C0)</td></tr>
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<tr class="separator:ga5d617f0e08d697c3b263e6a79f417d0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae5797a389fecf611dccd483658b822fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5797a389fecf611dccd483658b822fa">SDIO_CMD_WAITRESP_0</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gae5797a389fecf611dccd483658b822fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f5457b48feda0056466e5c380c44373"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f5457b48feda0056466e5c380c44373">SDIO_CMD_WAITRESP_1</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga8f5457b48feda0056466e5c380c44373"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b037f34e297f38d56b14d46d008ef58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b037f34e297f38d56b14d46d008ef58">SDIO_CMD_WAITINT</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga4b037f34e297f38d56b14d46d008ef58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4118c9200bae6732764f6c87a0962a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf4118c9200bae6732764f6c87a0962a9">SDIO_CMD_WAITPEND</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gaf4118c9200bae6732764f6c87a0962a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga982f3fd09ce7e31709e0628b1fae86b8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga982f3fd09ce7e31709e0628b1fae86b8">SDIO_CMD_CPSMEN</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga982f3fd09ce7e31709e0628b1fae86b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad560080c3e7ab5aeafe151dafcc64368"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad560080c3e7ab5aeafe151dafcc64368">SDIO_CMD_SDIOSUSPEND</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gad560080c3e7ab5aeafe151dafcc64368"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga905b78ecf464857e6501ef5fd5e6ef1b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga905b78ecf464857e6501ef5fd5e6ef1b">SDIO_CMD_ENCMDCOMPL</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga905b78ecf464857e6501ef5fd5e6ef1b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a9d5b2366ec7ca38db9d6d9f0f63f81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a9d5b2366ec7ca38db9d6d9f0f63f81">SDIO_CMD_NIEN</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga3a9d5b2366ec7ca38db9d6d9f0f63f81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga87422225274de986e7abe6b2a91a79c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga87422225274de986e7abe6b2a91a79c5">SDIO_CMD_CEATACMD</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga87422225274de986e7abe6b2a91a79c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27f9a6cbfd364bbb050b526ebc01d2d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27f9a6cbfd364bbb050b526ebc01d2d7">SDIO_RESPCMD_RESPCMD</a>   ((uint8_t)0x3F)</td></tr>
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<tr class="separator:ga27f9a6cbfd364bbb050b526ebc01d2d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56a55231f7a91cfd2cefaca0f6135cbc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga56a55231f7a91cfd2cefaca0f6135cbc">SDIO_RESP0_CARDSTATUS0</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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||
<tr class="separator:ga56a55231f7a91cfd2cefaca0f6135cbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1d20abddfc99835a2954eda5899f6db1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1d20abddfc99835a2954eda5899f6db1">SDIO_RESP1_CARDSTATUS1</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga1d20abddfc99835a2954eda5899f6db1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31a482ff36bde1df56ab603c864c4066"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31a482ff36bde1df56ab603c864c4066">SDIO_RESP2_CARDSTATUS2</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga31a482ff36bde1df56ab603c864c4066"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1075c96b5818b0500d5cce231ace89cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1075c96b5818b0500d5cce231ace89cf">SDIO_RESP3_CARDSTATUS3</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga1075c96b5818b0500d5cce231ace89cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga407ab1e46a80426602ab36e86457da26"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga407ab1e46a80426602ab36e86457da26">SDIO_RESP4_CARDSTATUS4</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga407ab1e46a80426602ab36e86457da26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27e45eea9ce17b7251f10ea763180690"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27e45eea9ce17b7251f10ea763180690">SDIO_DTIMER_DATATIME</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga27e45eea9ce17b7251f10ea763180690"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d3b07bca9aec8ef5456ba9b73f13adb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d3b07bca9aec8ef5456ba9b73f13adb">SDIO_DLEN_DATALENGTH</a>   ((uint32_t)0x01FFFFFF)</td></tr>
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<tr class="separator:ga4d3b07bca9aec8ef5456ba9b73f13adb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa03ff8fb9ff70e0a623a5c1f7aa2bc9a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa03ff8fb9ff70e0a623a5c1f7aa2bc9a">SDIO_DCTRL_DTEN</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="memitem:ga801fe27f7175a308d56776db19776c93"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga801fe27f7175a308d56776db19776c93">SDIO_DCTRL_DTDIR</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:gaa90cd50ae364b992ca8ccab319eb5513"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa90cd50ae364b992ca8ccab319eb5513">SDIO_DCTRL_DTMODE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:ga03a2148910ae02dde7e4cd63e0f5e008"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03a2148910ae02dde7e4cd63e0f5e008">SDIO_DCTRL_DMAEN</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="memitem:ga948072d8a6db53d0c377944523a4b15a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga948072d8a6db53d0c377944523a4b15a">SDIO_DCTRL_DBLOCKSIZE</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="memitem:ga51e2cb99cf325bb32c8910204b1507db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51e2cb99cf325bb32c8910204b1507db">SDIO_DCTRL_DBLOCKSIZE_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga0add3ad2b72a21e7f8d48da3ea0b3d0f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0add3ad2b72a21e7f8d48da3ea0b3d0f">SDIO_DCTRL_DBLOCKSIZE_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="memitem:ga93825036eceb86872e2ca179c63163ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93825036eceb86872e2ca179c63163ec">SDIO_DCTRL_DBLOCKSIZE_2</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="memitem:gac2025aa63b595bfccc747b99caec8799"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac2025aa63b595bfccc747b99caec8799">SDIO_DCTRL_DBLOCKSIZE_3</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="memitem:gafe9600da3e751118d49ea14ce44e91b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe9600da3e751118d49ea14ce44e91b9">SDIO_DCTRL_RWSTART</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gafe9600da3e751118d49ea14ce44e91b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f1b5b6a32ce712fbb3767090b1b045e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f1b5b6a32ce712fbb3767090b1b045e">SDIO_DCTRL_RWSTOP</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga3f1b5b6a32ce712fbb3767090b1b045e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bf721a25f656b3de6fa0b0fe32edb6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bf721a25f656b3de6fa0b0fe32edb6a">SDIO_DCTRL_RWMOD</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga4bf721a25f656b3de6fa0b0fe32edb6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa16b4c4037cf974162a591aea753fc21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa16b4c4037cf974162a591aea753fc21">SDIO_DCTRL_SDIOEN</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="memitem:ga2f8ab9dfe9d4f809b61fa2b7826adbde"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f8ab9dfe9d4f809b61fa2b7826adbde">SDIO_DCOUNT_DATACOUNT</a>   ((uint32_t)0x01FFFFFF)</td></tr>
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<tr class="separator:ga2f8ab9dfe9d4f809b61fa2b7826adbde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad6dbe59c4bdd8b9a12b092cf84a9daef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad6dbe59c4bdd8b9a12b092cf84a9daef">SDIO_STA_CCRCFAIL</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:gad6dbe59c4bdd8b9a12b092cf84a9daef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga554d1f9986bf5c715dd6f27a6493ce31"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga554d1f9986bf5c715dd6f27a6493ce31">SDIO_STA_DCRCFAIL</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga554d1f9986bf5c715dd6f27a6493ce31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae72c4f34bb3ccffeef1d7cdcb7415bdc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae72c4f34bb3ccffeef1d7cdcb7415bdc">SDIO_STA_CTIMEOUT</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gae72c4f34bb3ccffeef1d7cdcb7415bdc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a2cad7ef3406a46ddba51f7ab5df94b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a2cad7ef3406a46ddba51f7ab5df94b">SDIO_STA_DTIMEOUT</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga8a2cad7ef3406a46ddba51f7ab5df94b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b9dcdb8b90d8266eb0c5a2be81238aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b9dcdb8b90d8266eb0c5a2be81238aa">SDIO_STA_TXUNDERR</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga4b9dcdb8b90d8266eb0c5a2be81238aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad4b91289c9f6b773f928706ae8a5ddfc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad4b91289c9f6b773f928706ae8a5ddfc">SDIO_STA_RXOVERR</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:gad4b91289c9f6b773f928706ae8a5ddfc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga096f11117736a2252f1cd5c4cccdc6e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga096f11117736a2252f1cd5c4cccdc6e6">SDIO_STA_CMDREND</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga096f11117736a2252f1cd5c4cccdc6e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa550641dc6aa942e1b524ad0e557a284"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa550641dc6aa942e1b524ad0e557a284">SDIO_STA_CMDSENT</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaa550641dc6aa942e1b524ad0e557a284"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafe7e354a903b957943cf5b6bed4cdf6b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafe7e354a903b957943cf5b6bed4cdf6b">SDIO_STA_DATAEND</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gafe7e354a903b957943cf5b6bed4cdf6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a9ef8e72604e9997da23601a2dd84a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a9ef8e72604e9997da23601a2dd84a4">SDIO_STA_STBITERR</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga7a9ef8e72604e9997da23601a2dd84a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2fabf2c02cba6d4de1e90d8d1dc9793c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2fabf2c02cba6d4de1e90d8d1dc9793c">SDIO_STA_DBCKEND</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga2fabf2c02cba6d4de1e90d8d1dc9793c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga99ccdac7a223635ee5b38a4bae8f30cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga99ccdac7a223635ee5b38a4bae8f30cc">SDIO_STA_CMDACT</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga99ccdac7a223635ee5b38a4bae8f30cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga908feb4957f48390bc2fc0bde47ac784"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga908feb4957f48390bc2fc0bde47ac784">SDIO_STA_TXACT</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga908feb4957f48390bc2fc0bde47ac784"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad2f52b50765fa449dcfabc39b099796"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad2f52b50765fa449dcfabc39b099796">SDIO_STA_RXACT</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:gaad2f52b50765fa449dcfabc39b099796"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga62b9e38be5956dde69049154facc62fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62b9e38be5956dde69049154facc62fd">SDIO_STA_TXFIFOHE</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:ga62b9e38be5956dde69049154facc62fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7916c47ee972376a0eaee584133ca36d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7916c47ee972376a0eaee584133ca36d">SDIO_STA_RXFIFOHF</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga7916c47ee972376a0eaee584133ca36d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae1497b46f9a906001dabb7d7604f6c05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1497b46f9a906001dabb7d7604f6c05">SDIO_STA_TXFIFOF</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:gae1497b46f9a906001dabb7d7604f6c05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga85f46f873ca5fe91a1e8206d157b9446"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga85f46f873ca5fe91a1e8206d157b9446">SDIO_STA_RXFIFOF</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:ga85f46f873ca5fe91a1e8206d157b9446"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4624f95c5224c631f99571b5454acd86"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4624f95c5224c631f99571b5454acd86">SDIO_STA_TXFIFOE</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga4624f95c5224c631f99571b5454acd86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44bf9f7321d65a3effd2df469a58a464"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44bf9f7321d65a3effd2df469a58a464">SDIO_STA_RXFIFOE</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:ga44bf9f7321d65a3effd2df469a58a464"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19b374518e813f7a1ac4aec3b24b7517"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19b374518e813f7a1ac4aec3b24b7517">SDIO_STA_TXDAVL</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga19b374518e813f7a1ac4aec3b24b7517"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadcad9b8c0e3ccba1aa389d7713db6803"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadcad9b8c0e3ccba1aa389d7713db6803">SDIO_STA_RXDAVL</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gadcad9b8c0e3ccba1aa389d7713db6803"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5df3c10c37285faedb2d853aea4e63dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5df3c10c37285faedb2d853aea4e63dc">SDIO_STA_SDIOIT</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga5df3c10c37285faedb2d853aea4e63dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d8ef3b4157374fd2b5fc8ed12b77a0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d8ef3b4157374fd2b5fc8ed12b77a0c">SDIO_STA_CEATAEND</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga5d8ef3b4157374fd2b5fc8ed12b77a0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44708c45f675cf065f1c7fc9311d6e43"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44708c45f675cf065f1c7fc9311d6e43">SDIO_ICR_CCRCFAILC</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga44708c45f675cf065f1c7fc9311d6e43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2cb6cde5f88a5d2b635a830dd401c4e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2cb6cde5f88a5d2b635a830dd401c4e0">SDIO_ICR_DCRCFAILC</a>   ((uint32_t)0x00000002)</td></tr>
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||
<tr class="separator:ga2cb6cde5f88a5d2b635a830dd401c4e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4d128bee8a97ae9971d42f844d2e297"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4d128bee8a97ae9971d42f844d2e297">SDIO_ICR_CTIMEOUTC</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:gac4d128bee8a97ae9971d42f844d2e297"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadcb64d3d07a5841ee9f18ff6bc75350b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadcb64d3d07a5841ee9f18ff6bc75350b">SDIO_ICR_DTIMEOUTC</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:gadcb64d3d07a5841ee9f18ff6bc75350b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9628d77973f35d628924172831b029f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9628d77973f35d628924172831b029f8">SDIO_ICR_TXUNDERRC</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga9628d77973f35d628924172831b029f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2513d040c7695b152b0b423ad6f5c81e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2513d040c7695b152b0b423ad6f5c81e">SDIO_ICR_RXOVERRC</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga2513d040c7695b152b0b423ad6f5c81e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8fb5c67aef48d5ee27b60107d938a58f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8fb5c67aef48d5ee27b60107d938a58f">SDIO_ICR_CMDRENDC</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga8fb5c67aef48d5ee27b60107d938a58f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa27fe45ef7461caf704186630b26a196"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa27fe45ef7461caf704186630b26a196">SDIO_ICR_CMDSENTC</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:gaa27fe45ef7461caf704186630b26a196"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga527e1f9cd295845d5be9975cf26bae7e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga527e1f9cd295845d5be9975cf26bae7e">SDIO_ICR_DATAENDC</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:ga527e1f9cd295845d5be9975cf26bae7e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae614b5ab8a8aecbc3c1ce74645cdc28c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae614b5ab8a8aecbc3c1ce74645cdc28c">SDIO_ICR_STBITERRC</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:gae614b5ab8a8aecbc3c1ce74645cdc28c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc5518c07e39dc1f91603737d1a7180b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadc5518c07e39dc1f91603737d1a7180b">SDIO_ICR_DBCKENDC</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:gadc5518c07e39dc1f91603737d1a7180b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2990db729fb017dfd659dc6cf8823761"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2990db729fb017dfd659dc6cf8823761">SDIO_ICR_SDIOITC</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:ga2990db729fb017dfd659dc6cf8823761"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6f1cebd40fd1eafb59635b284c5a3f34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6f1cebd40fd1eafb59635b284c5a3f34">SDIO_ICR_CEATAENDC</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga6f1cebd40fd1eafb59635b284c5a3f34"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e24d12a6c9af91337cb391d3ba698f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e24d12a6c9af91337cb391d3ba698f3">SDIO_MASK_CCRCFAILIE</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga5e24d12a6c9af91337cb391d3ba698f3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e2e106a1f7792f054c6cc1f60906a09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e2e106a1f7792f054c6cc1f60906a09">SDIO_MASK_DCRCFAILIE</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:ga5e2e106a1f7792f054c6cc1f60906a09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23f5a8c06e289522af0a679b08bdb014"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23f5a8c06e289522af0a679b08bdb014">SDIO_MASK_CTIMEOUTIE</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga23f5a8c06e289522af0a679b08bdb014"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b4cc63338fe72abd76e5b399c47379b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7b4cc63338fe72abd76e5b399c47379b">SDIO_MASK_DTIMEOUTIE</a>   ((uint32_t)0x00000008)</td></tr>
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<tr class="separator:ga7b4cc63338fe72abd76e5b399c47379b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e02e525dc6ca1bb294b174e7391753d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e02e525dc6ca1bb294b174e7391753d">SDIO_MASK_TXUNDERRIE</a>   ((uint32_t)0x00000010)</td></tr>
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<tr class="separator:ga1e02e525dc6ca1bb294b174e7391753d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39f494cf2a6af6ced9eaeac751ea81e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39f494cf2a6af6ced9eaeac751ea81e4">SDIO_MASK_RXOVERRIE</a>   ((uint32_t)0x00000020)</td></tr>
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<tr class="separator:ga39f494cf2a6af6ced9eaeac751ea81e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5fdedfc60a2019ff5f64533fcdd0c3f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fdedfc60a2019ff5f64533fcdd0c3f1">SDIO_MASK_CMDRENDIE</a>   ((uint32_t)0x00000040)</td></tr>
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<tr class="separator:ga5fdedfc60a2019ff5f64533fcdd0c3f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d541aea02974c03bd8a8426125c35ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d541aea02974c03bd8a8426125c35ff">SDIO_MASK_CMDSENTIE</a>   ((uint32_t)0x00000080)</td></tr>
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<tr class="separator:ga0d541aea02974c03bd8a8426125c35ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae6398bd3e8312eea3b986ab59b80b466"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae6398bd3e8312eea3b986ab59b80b466">SDIO_MASK_DATAENDIE</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gae6398bd3e8312eea3b986ab59b80b466"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4194bed51eb4a951a58a5d4062ba978f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4194bed51eb4a951a58a5d4062ba978f">SDIO_MASK_STBITERRIE</a>   ((uint32_t)0x00000200)</td></tr>
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<tr class="separator:ga4194bed51eb4a951a58a5d4062ba978f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga947e5da36c9eeca0b48f3356067dff00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga947e5da36c9eeca0b48f3356067dff00">SDIO_MASK_DBCKENDIE</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga947e5da36c9eeca0b48f3356067dff00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad63b504f02ea0b1e5ec48962799fde88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad63b504f02ea0b1e5ec48962799fde88">SDIO_MASK_CMDACTIE</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:gad63b504f02ea0b1e5ec48962799fde88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9bbfbc3f69ab77171eb1a0058783b1e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9bbfbc3f69ab77171eb1a0058783b1e0">SDIO_MASK_TXACTIE</a>   ((uint32_t)0x00001000)</td></tr>
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<tr class="separator:ga9bbfbc3f69ab77171eb1a0058783b1e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9768c39a5d9d3c5519eb522c62a75eae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9768c39a5d9d3c5519eb522c62a75eae">SDIO_MASK_RXACTIE</a>   ((uint32_t)0x00002000)</td></tr>
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<tr class="separator:ga9768c39a5d9d3c5519eb522c62a75eae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9cf28de8489fee023ea353df0e13fa7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9cf28de8489fee023ea353df0e13fa7">SDIO_MASK_TXFIFOHEIE</a>   ((uint32_t)0x00004000)</td></tr>
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<tr class="separator:gad9cf28de8489fee023ea353df0e13fa7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga04d50028fc671494508aecb04e727102"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga04d50028fc671494508aecb04e727102">SDIO_MASK_RXFIFOHFIE</a>   ((uint32_t)0x00008000)</td></tr>
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<tr class="separator:ga04d50028fc671494508aecb04e727102"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03a602b975ce16ef03083947aded0172"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03a602b975ce16ef03083947aded0172">SDIO_MASK_TXFIFOFIE</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga03a602b975ce16ef03083947aded0172"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf18c4bdf8fa4ee85596a89de00158fbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf18c4bdf8fa4ee85596a89de00158fbb">SDIO_MASK_RXFIFOFIE</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gaf18c4bdf8fa4ee85596a89de00158fbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga11e1d67150fad62dc1ca7783f3a19372"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d67150fad62dc1ca7783f3a19372">SDIO_MASK_TXFIFOEIE</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="separator:ga11e1d67150fad62dc1ca7783f3a19372"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbc23fa1c153a9e5216baeef7922e412"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbc23fa1c153a9e5216baeef7922e412">SDIO_MASK_RXFIFOEIE</a>   ((uint32_t)0x00080000)</td></tr>
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<tr class="separator:gadbc23fa1c153a9e5216baeef7922e412"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a1988093a6df087ebb8ff41a51962da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a1988093a6df087ebb8ff41a51962da">SDIO_MASK_TXDAVLIE</a>   ((uint32_t)0x00100000)</td></tr>
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<tr class="separator:ga9a1988093a6df087ebb8ff41a51962da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa9da7d15902e6f94b79968a07250696"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafa9da7d15902e6f94b79968a07250696">SDIO_MASK_RXDAVLIE</a>   ((uint32_t)0x00200000)</td></tr>
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<tr class="separator:gafa9da7d15902e6f94b79968a07250696"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad73b7c7d480d2d71613995cfecc59138"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad73b7c7d480d2d71613995cfecc59138">SDIO_MASK_SDIOITIE</a>   ((uint32_t)0x00400000)</td></tr>
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<tr class="separator:gad73b7c7d480d2d71613995cfecc59138"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0a19dd3039888ebdc40b2406be400749"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a19dd3039888ebdc40b2406be400749">SDIO_MASK_CEATAENDIE</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:ga0a19dd3039888ebdc40b2406be400749"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa45f5e0a2be89267f79cad57f456f0a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa45f5e0a2be89267f79cad57f456f0a2">SDIO_FIFOCNT_FIFOCOUNT</a>   ((uint32_t)0x00FFFFFF)</td></tr>
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<tr class="separator:gaa45f5e0a2be89267f79cad57f456f0a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5fc0d1e12c55398e2881fe917672da25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fc0d1e12c55398e2881fe917672da25">SDIO_FIFO_FIFODATA</a>   ((uint32_t)0xFFFFFFFF)</td></tr>
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<tr class="separator:ga5fc0d1e12c55398e2881fe917672da25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga97602d8ded14bbd2c1deadaf308755a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga97602d8ded14bbd2c1deadaf308755a3">SPI_CR1_CPHA</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga97602d8ded14bbd2c1deadaf308755a3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2616a10f5118cdc68fbdf0582481e124"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2616a10f5118cdc68fbdf0582481e124">SPI_CR1_CPOL</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga2616a10f5118cdc68fbdf0582481e124"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b3b6ae107fc37bf18e14506298d7a55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b3b6ae107fc37bf18e14506298d7a55">SPI_CR1_MSTR</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga5b3b6ae107fc37bf18e14506298d7a55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga261af22667719a32b3ce566c1e261936"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga261af22667719a32b3ce566c1e261936">SPI_CR1_BR</a>   ((uint16_t)0x0038)</td></tr>
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<tr class="separator:ga261af22667719a32b3ce566c1e261936"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa364b123cf797044094cc229330ce321"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa364b123cf797044094cc229330ce321">SPI_CR1_BR_0</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gaa364b123cf797044094cc229330ce321"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga45e93d18c8966964ed1926d5ca87ef46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45e93d18c8966964ed1926d5ca87ef46">SPI_CR1_BR_1</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga45e93d18c8966964ed1926d5ca87ef46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga28b823d564e9d90150bcc6744b4ed622"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga28b823d564e9d90150bcc6744b4ed622">SPI_CR1_BR_2</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga28b823d564e9d90150bcc6744b4ed622"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac5a646d978d3b98eb7c6a5d95d75c3f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac5a646d978d3b98eb7c6a5d95d75c3f9">SPI_CR1_SPE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="memitem:gab929e9d5ddbb66f229c501ab18d0e6e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab929e9d5ddbb66f229c501ab18d0e6e8">SPI_CR1_LSBFIRST</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="memitem:ga5f154374b58c0234f82ea326cb303a1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5f154374b58c0234f82ea326cb303a1e">SPI_CR1_SSI</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="memitem:ga0e236047e05106cf1ba7929766311382"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0e236047e05106cf1ba7929766311382">SPI_CR1_SSM</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="memitem:ga9ffecf774b84a8cdc11ab1f931791883"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9ffecf774b84a8cdc11ab1f931791883">SPI_CR1_RXONLY</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="memitem:ga3ffabea0de695a19198d906bf6a1d9fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ffabea0de695a19198d906bf6a1d9fd">SPI_CR1_DFF</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="memitem:ga57072f13c2e54c12186ae8c5fdecb250"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga57072f13c2e54c12186ae8c5fdecb250">SPI_CR1_CRCNEXT</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="memitem:gac9339b7c6466f09ad26c26b3bb81c51b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac9339b7c6466f09ad26c26b3bb81c51b">SPI_CR1_CRCEN</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="memitem:ga378953916b7701bd49f063c0366b703f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga378953916b7701bd49f063c0366b703f">SPI_CR1_BIDIOE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga378953916b7701bd49f063c0366b703f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43608d3c2959fc9ca64398d61cbf484e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43608d3c2959fc9ca64398d61cbf484e">SPI_CR1_BIDIMODE</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="memitem:gaf23c590d98279634af05550702a806da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf23c590d98279634af05550702a806da">SPI_CR2_RXDMAEN</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:gaf23c590d98279634af05550702a806da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3eee671793983a3bd669c9173b2ce210"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3eee671793983a3bd669c9173b2ce210">SPI_CR2_TXDMAEN</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:ga3eee671793983a3bd669c9173b2ce210"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae94612b95395eff626f5f3d7d28352dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae94612b95395eff626f5f3d7d28352dd">SPI_CR2_SSOE</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:gae94612b95395eff626f5f3d7d28352dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf18705567de7ab52a62e5ef3ba27418b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf18705567de7ab52a62e5ef3ba27418b">SPI_CR2_ERRIE</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:gaf18705567de7ab52a62e5ef3ba27418b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa7d4c37fbbcced7f2a0421e6ffd103ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7d4c37fbbcced7f2a0421e6ffd103ea">SPI_CR2_RXNEIE</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:gaa7d4c37fbbcced7f2a0421e6ffd103ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23f683a1252ccaf625cae1a978989b2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23f683a1252ccaf625cae1a978989b2c">SPI_CR2_TXEIE</a>   ((uint8_t)0x80)</td></tr>
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<tr class="separator:ga23f683a1252ccaf625cae1a978989b2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40e14de547aa06864abcd4b0422d8b48"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40e14de547aa06864abcd4b0422d8b48">SPI_SR_RXNE</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga40e14de547aa06864abcd4b0422d8b48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5bd5d21816947fcb25ccae7d3bf8eb2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5bd5d21816947fcb25ccae7d3bf8eb2c">SPI_SR_TXE</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:ga5bd5d21816947fcb25ccae7d3bf8eb2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81bd052f0b2e819ddd6bb16c2292a2de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81bd052f0b2e819ddd6bb16c2292a2de">SPI_SR_CHSIDE</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:ga81bd052f0b2e819ddd6bb16c2292a2de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga13d3292e963499c0e9a36869909229e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga13d3292e963499c0e9a36869909229e6">SPI_SR_UDR</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:ga13d3292e963499c0e9a36869909229e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga69e543fa9584fd636032a3ee735f750b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga69e543fa9584fd636032a3ee735f750b">SPI_SR_CRCERR</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:ga69e543fa9584fd636032a3ee735f750b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabaa043349833dc7b8138969c64f63adf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabaa043349833dc7b8138969c64f63adf">SPI_SR_MODF</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:gabaa043349833dc7b8138969c64f63adf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa8d902302c5eb81ce4a57029de281232"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa8d902302c5eb81ce4a57029de281232">SPI_SR_OVR</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:gaa8d902302c5eb81ce4a57029de281232"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa3498df67729ae048dc5f315ef7c16bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa3498df67729ae048dc5f315ef7c16bf">SPI_SR_BSY</a>   ((uint8_t)0x80)</td></tr>
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<tr class="memitem:gaa4da7d7f05a28d1aaa52ec557e55e1ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa4da7d7f05a28d1aaa52ec557e55e1ad">SPI_DR_DR</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gaa4da7d7f05a28d1aaa52ec557e55e1ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae968658ab837800723eafcc21af10247"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae968658ab837800723eafcc21af10247">SPI_CRCPR_CRCPOLY</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gae968658ab837800723eafcc21af10247"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a01a578c2c7bb4e587a8f1610843181"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3a01a578c2c7bb4e587a8f1610843181">SPI_RXCRCR_RXCRC</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga3a01a578c2c7bb4e587a8f1610843181"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c69dc721e89e40056999b64572dff09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c69dc721e89e40056999b64572dff09">SPI_TXCRCR_TXCRC</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga1c69dc721e89e40056999b64572dff09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c362b3d703698a7891f032f6b29056f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9c362b3d703698a7891f032f6b29056f">SPI_I2SCFGR_CHLEN</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga9c362b3d703698a7891f032f6b29056f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc12f9d2003ab169a3f68e9d809f84ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacc12f9d2003ab169a3f68e9d809f84ae">SPI_I2SCFGR_DATLEN</a>   ((uint16_t)0x0006)</td></tr>
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<tr class="separator:gacc12f9d2003ab169a3f68e9d809f84ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa20ad624085d2e533eea3662cb03d8fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa20ad624085d2e533eea3662cb03d8fa">SPI_I2SCFGR_DATLEN_0</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaa20ad624085d2e533eea3662cb03d8fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadf6e940d195fa1633cb1b23414f00412"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadf6e940d195fa1633cb1b23414f00412">SPI_I2SCFGR_DATLEN_1</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:ga5c5be1f1c8b4689643e04cd5034e7f5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c5be1f1c8b4689643e04cd5034e7f5f">SPI_I2SCFGR_CKPOL</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga5c5be1f1c8b4689643e04cd5034e7f5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a822a80be3a51524b42491248f8031f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a822a80be3a51524b42491248f8031f">SPI_I2SCFGR_I2SSTD</a>   ((uint16_t)0x0030)</td></tr>
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<tr class="separator:ga7a822a80be3a51524b42491248f8031f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafeba0a45703463dfe05334364bdacbe8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafeba0a45703463dfe05334364bdacbe8">SPI_I2SCFGR_I2SSTD_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga0142a3667f59bce9bae80d31e88a124a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0142a3667f59bce9bae80d31e88a124a">SPI_I2SCFGR_I2SSTD_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga0142a3667f59bce9bae80d31e88a124a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66a29efc32a31f903e89b7ddcd20857b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66a29efc32a31f903e89b7ddcd20857b">SPI_I2SCFGR_PCMSYNC</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga66a29efc32a31f903e89b7ddcd20857b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf09fd11f6f97000266b30b015bf2cb68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf09fd11f6f97000266b30b015bf2cb68">SPI_I2SCFGR_I2SCFG</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:gaf09fd11f6f97000266b30b015bf2cb68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga421c94680ee8a2583419e2b0c89e995e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga421c94680ee8a2583419e2b0c89e995e">SPI_I2SCFGR_I2SCFG_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga421c94680ee8a2583419e2b0c89e995e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80c398b9e79fcc61a497f9d7dd910352"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80c398b9e79fcc61a497f9d7dd910352">SPI_I2SCFGR_I2SCFG_1</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga80c398b9e79fcc61a497f9d7dd910352"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga30d76c7552c91bbd5cbac70d9c56ebb3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30d76c7552c91bbd5cbac70d9c56ebb3">SPI_I2SCFGR_I2SE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga30d76c7552c91bbd5cbac70d9c56ebb3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae99763414b3c2f11fcfecb1f93eb6701"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae99763414b3c2f11fcfecb1f93eb6701">SPI_I2SCFGR_I2SMOD</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gae99763414b3c2f11fcfecb1f93eb6701"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga406ce88b2580a421f5b28bdbeb303543"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga406ce88b2580a421f5b28bdbeb303543">SPI_I2SPR_I2SDIV</a>   ((uint16_t)0x00FF)</td></tr>
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<tr class="separator:ga406ce88b2580a421f5b28bdbeb303543"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3d6d4136a5ae12f9bd5940324282355a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3d6d4136a5ae12f9bd5940324282355a">SPI_I2SPR_ODD</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="memitem:ga25669c3686c0c577d2d371ac09200ff0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25669c3686c0c577d2d371ac09200ff0">SPI_I2SPR_MCKOE</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="memitem:ga3c05039ec67573c00da29f58b914f258"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3c05039ec67573c00da29f58b914f258">SYSCFG_MEMRMP_MEM_MODE</a>   ((uint32_t)0x00000007)</td></tr>
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<tr class="memitem:ga30d5f406535f94faea2e7f924d50201b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga30d5f406535f94faea2e7f924d50201b">SYSCFG_MEMRMP_MEM_MODE_0</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="memitem:gab5d76e8b4d801b35c31ef352b33407be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab5d76e8b4d801b35c31ef352b33407be">SYSCFG_MEMRMP_MEM_MODE_1</a>   ((uint32_t)0x00000002)</td></tr>
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<tr class="separator:gab5d76e8b4d801b35c31ef352b33407be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42eb2e54640311449d074871dc352819"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42eb2e54640311449d074871dc352819">SYSCFG_MEMRMP_MEM_MODE_2</a>   ((uint32_t)0x00000004)</td></tr>
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<tr class="separator:ga42eb2e54640311449d074871dc352819"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd7765535faf23de1a7038d97d44f014"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd7765535faf23de1a7038d97d44f014">SYSCFG_MEMRMP_FB_MODE</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gabd7765535faf23de1a7038d97d44f014"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5fc9935984aa2d506eb568944cf4a45f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5fc9935984aa2d506eb568944cf4a45f">SYSCFG_MEMRMP_SWP_FMC</a>   ((uint32_t)0x00000C00)</td></tr>
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<tr class="separator:ga5fc9935984aa2d506eb568944cf4a45f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga276499965fb1684630220852279130a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga276499965fb1684630220852279130a1">SYSCFG_MEMRMP_SWP_FMC_0</a>   ((uint32_t)0x00000400)</td></tr>
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<tr class="separator:ga276499965fb1684630220852279130a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5bb96fd21495e6aed7dee995c6e2bb47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5bb96fd21495e6aed7dee995c6e2bb47">SYSCFG_MEMRMP_SWP_FMC_1</a>   ((uint32_t)0x00000800)</td></tr>
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<tr class="separator:ga5bb96fd21495e6aed7dee995c6e2bb47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae44bae7ffc1cdebd5efbefbf679881df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae44bae7ffc1cdebd5efbefbf679881df">SYSCFG_PMC_ADCxDC2</a>   ((uint32_t)0x00070000)</td></tr>
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<tr class="separator:gae44bae7ffc1cdebd5efbefbf679881df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga69d0997434d521e50c9e7339d268482e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga69d0997434d521e50c9e7339d268482e">SYSCFG_PMC_ADC1DC2</a>   ((uint32_t)0x00010000)</td></tr>
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<tr class="separator:ga69d0997434d521e50c9e7339d268482e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2da0bee4d174489ae10478531aee6ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2da0bee4d174489ae10478531aee6ee">SYSCFG_PMC_ADC2DC2</a>   ((uint32_t)0x00020000)</td></tr>
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<tr class="separator:gae2da0bee4d174489ae10478531aee6ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa6d0af481dc291ff0419926ec1044bf5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa6d0af481dc291ff0419926ec1044bf5">SYSCFG_PMC_ADC3DC2</a>   ((uint32_t)0x00040000)</td></tr>
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<tr class="memitem:gae9d8ca35cdab213cb2400c49434de326"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9d8ca35cdab213cb2400c49434de326">SYSCFG_PMC_MII_RMII_SEL</a>   ((uint32_t)0x00800000)</td></tr>
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<tr class="separator:gae9d8ca35cdab213cb2400c49434de326"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf7af9191fbf95433bc0a76454118ce9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf7af9191fbf95433bc0a76454118ce9"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SYSCFG_PMC_MII_RMII</b>   <a class="el" href="group___peripheral___registers___bits___definition.html#gae9d8ca35cdab213cb2400c49434de326">SYSCFG_PMC_MII_RMII_SEL</a></td></tr>
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<tr class="separator:gaaf7af9191fbf95433bc0a76454118ce9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75b70d07448c3037234bc2abb8e3d884"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75b70d07448c3037234bc2abb8e3d884">SYSCFG_EXTICR1_EXTI0</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:ga75b70d07448c3037234bc2abb8e3d884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7fc84838c77f799cb7e57d6e97c6c16d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7fc84838c77f799cb7e57d6e97c6c16d">SYSCFG_EXTICR1_EXTI1</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:ga7fc84838c77f799cb7e57d6e97c6c16d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d0a0a6b8223777937d8c9012658d6cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d0a0a6b8223777937d8c9012658d6cd">SYSCFG_EXTICR1_EXTI2</a>   ((uint16_t)0x0F00)</td></tr>
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<tr class="separator:ga6d0a0a6b8223777937d8c9012658d6cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac3bf2306f79ebb709da5ecf83e59ded4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3bf2306f79ebb709da5ecf83e59ded4">SYSCFG_EXTICR1_EXTI3</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="separator:gac3bf2306f79ebb709da5ecf83e59ded4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6de6aa8e32ae5cd07fd69e42e7226bd1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6de6aa8e32ae5cd07fd69e42e7226bd1">SYSCFG_EXTICR1_EXTI0_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga6de6aa8e32ae5cd07fd69e42e7226bd1"><td class="mdescLeft"> </td><td class="mdescRight">EXTI0 configuration. <a href="group___peripheral___registers___bits___definition.html#ga6de6aa8e32ae5cd07fd69e42e7226bd1">More...</a><br /></td></tr>
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<tr class="separator:ga6de6aa8e32ae5cd07fd69e42e7226bd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf43c9ef6b61e39655cbe969967c79a69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf43c9ef6b61e39655cbe969967c79a69">SYSCFG_EXTICR1_EXTI0_PB</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gaf43c9ef6b61e39655cbe969967c79a69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga861a4d7b48ffd93997267baaad12fd51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga861a4d7b48ffd93997267baaad12fd51">SYSCFG_EXTICR1_EXTI0_PC</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga861a4d7b48ffd93997267baaad12fd51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6439042c8cd14f99fe3813cff47c0ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6439042c8cd14f99fe3813cff47c0ee">SYSCFG_EXTICR1_EXTI0_PD</a>   ((uint16_t)0x0003)</td></tr>
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<tr class="separator:gaf6439042c8cd14f99fe3813cff47c0ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb087e2ded8ac927ee9e1fc0234bfdef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb087e2ded8ac927ee9e1fc0234bfdef">SYSCFG_EXTICR1_EXTI0_PE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gacb087e2ded8ac927ee9e1fc0234bfdef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa897f1ac8311e57339eaf7813239eaf4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa897f1ac8311e57339eaf7813239eaf4">SYSCFG_EXTICR1_EXTI0_PF</a>   ((uint16_t)0x0005)</td></tr>
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<tr class="separator:gaa897f1ac8311e57339eaf7813239eaf4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98b2d929e79e5cc2ee7961a75a0ab094"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga98b2d929e79e5cc2ee7961a75a0ab094">SYSCFG_EXTICR1_EXTI0_PG</a>   ((uint16_t)0x0006)</td></tr>
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<tr class="separator:ga98b2d929e79e5cc2ee7961a75a0ab094"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga766d0bf3501e207b0baa066cf756688f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga766d0bf3501e207b0baa066cf756688f">SYSCFG_EXTICR1_EXTI0_PH</a>   ((uint16_t)0x0007)</td></tr>
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<tr class="separator:ga766d0bf3501e207b0baa066cf756688f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacfc4b69ff5f5d9b35bf01f26d6aa4e60"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacfc4b69ff5f5d9b35bf01f26d6aa4e60">SYSCFG_EXTICR1_EXTI0_PI</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gacfc4b69ff5f5d9b35bf01f26d6aa4e60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e700a5f59f337d03c187fa0362b7e25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e700a5f59f337d03c187fa0362b7e25">SYSCFG_EXTICR1_EXTI0_PJ</a>   ((uint16_t)0x0009)</td></tr>
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<tr class="separator:ga3e700a5f59f337d03c187fa0362b7e25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bc647540eb5508cb2ab48912d8109d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bc647540eb5508cb2ab48912d8109d6">SYSCFG_EXTICR1_EXTI0_PK</a>   ((uint16_t)0x000A)</td></tr>
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<tr class="separator:ga0bc647540eb5508cb2ab48912d8109d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4b78c30e4ef4fa441582eb3c102865d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf4b78c30e4ef4fa441582eb3c102865d">SYSCFG_EXTICR1_EXTI1_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:gaf4b78c30e4ef4fa441582eb3c102865d"><td class="mdescLeft"> </td><td class="mdescRight">EXTI1 configuration. <a href="group___peripheral___registers___bits___definition.html#gaf4b78c30e4ef4fa441582eb3c102865d">More...</a><br /></td></tr>
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<tr class="separator:gaf4b78c30e4ef4fa441582eb3c102865d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19a11fce288d19546c76257483e0dcb6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19a11fce288d19546c76257483e0dcb6">SYSCFG_EXTICR1_EXTI1_PB</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga19a11fce288d19546c76257483e0dcb6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae45a8c814b13fa19f157364dc715c08a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae45a8c814b13fa19f157364dc715c08a">SYSCFG_EXTICR1_EXTI1_PC</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gae45a8c814b13fa19f157364dc715c08a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93cb136eaf357affc4a28a8d423cabbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93cb136eaf357affc4a28a8d423cabbb">SYSCFG_EXTICR1_EXTI1_PD</a>   ((uint16_t)0x0030)</td></tr>
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<tr class="separator:ga93cb136eaf357affc4a28a8d423cabbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f5c3d1e914af78112179a13e9c736d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f5c3d1e914af78112179a13e9c736d6">SYSCFG_EXTICR1_EXTI1_PE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga8f5c3d1e914af78112179a13e9c736d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43ea410456aa31dfe6ec4889de62428b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43ea410456aa31dfe6ec4889de62428b">SYSCFG_EXTICR1_EXTI1_PF</a>   ((uint16_t)0x0050)</td></tr>
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<tr class="separator:ga43ea410456aa31dfe6ec4889de62428b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf9118efcafa89eeada012ff5ab98387d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf9118efcafa89eeada012ff5ab98387d">SYSCFG_EXTICR1_EXTI1_PG</a>   ((uint16_t)0x0060)</td></tr>
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<tr class="separator:gaf9118efcafa89eeada012ff5ab98387d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ac69d7f391e837d8e8adce27704d87d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ac69d7f391e837d8e8adce27704d87d">SYSCFG_EXTICR1_EXTI1_PH</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga0ac69d7f391e837d8e8adce27704d87d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga010784c7bdee3c742b48c500ee52e223"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga010784c7bdee3c742b48c500ee52e223">SYSCFG_EXTICR1_EXTI1_PI</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga010784c7bdee3c742b48c500ee52e223"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1232102a76f0a0ccb0324f44e64f4319"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1232102a76f0a0ccb0324f44e64f4319">SYSCFG_EXTICR1_EXTI1_PJ</a>   ((uint16_t)0x0090)</td></tr>
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<tr class="separator:ga1232102a76f0a0ccb0324f44e64f4319"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabeafb8444f108af88702f80fb2e4e8b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabeafb8444f108af88702f80fb2e4e8b7">SYSCFG_EXTICR1_EXTI1_PK</a>   ((uint16_t)0x00A0)</td></tr>
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<tr class="memitem:ga4096f472e87e021f4d4c94457ddaf5f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4096f472e87e021f4d4c94457ddaf5f1">SYSCFG_EXTICR1_EXTI2_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga4096f472e87e021f4d4c94457ddaf5f1"><td class="mdescLeft"> </td><td class="mdescRight">EXTI2 configuration. <a href="group___peripheral___registers___bits___definition.html#ga4096f472e87e021f4d4c94457ddaf5f1">More...</a><br /></td></tr>
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<tr class="separator:ga4096f472e87e021f4d4c94457ddaf5f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8cd240d61fd8a9666621f0dee07a08e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8cd240d61fd8a9666621f0dee07a08e5">SYSCFG_EXTICR1_EXTI2_PB</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga8cd240d61fd8a9666621f0dee07a08e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03ce7faaf56aa9efcc74af65619e275e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga03ce7faaf56aa9efcc74af65619e275e">SYSCFG_EXTICR1_EXTI2_PC</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="memitem:gafc35fcdcc89b487fab2901e1f5a7f41b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc35fcdcc89b487fab2901e1f5a7f41b">SYSCFG_EXTICR1_EXTI2_PD</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="memitem:gac3f2b7465d81745f7a772e7689a29618"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac3f2b7465d81745f7a772e7689a29618">SYSCFG_EXTICR1_EXTI2_PE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:gac3f2b7465d81745f7a772e7689a29618"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab538769f1da056b3f57fb984adeef252"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab538769f1da056b3f57fb984adeef252">SYSCFG_EXTICR1_EXTI2_PF</a>   ((uint16_t)0x0500)</td></tr>
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<tr class="separator:gab538769f1da056b3f57fb984adeef252"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe4f5fa56e98b42b64e894f7a9216e05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe4f5fa56e98b42b64e894f7a9216e05">SYSCFG_EXTICR1_EXTI2_PG</a>   ((uint16_t)0x0600)</td></tr>
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<tr class="separator:gabe4f5fa56e98b42b64e894f7a9216e05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada5ffab92c39cbfc695ce57a4e6177e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada5ffab92c39cbfc695ce57a4e6177e5">SYSCFG_EXTICR1_EXTI2_PH</a>   ((uint16_t)0x0700)</td></tr>
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<tr class="separator:gada5ffab92c39cbfc695ce57a4e6177e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00bc1224b7bfd46dcec32676a601de51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00bc1224b7bfd46dcec32676a601de51">SYSCFG_EXTICR1_EXTI2_PI</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga00bc1224b7bfd46dcec32676a601de51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53128c2b1f3e639d35a1f8e631fa2c13"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53128c2b1f3e639d35a1f8e631fa2c13">SYSCFG_EXTICR1_EXTI2_PJ</a>   ((uint16_t)0x0900)</td></tr>
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<tr class="separator:ga53128c2b1f3e639d35a1f8e631fa2c13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a107628f66d66e8df22fd6811a345bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7a107628f66d66e8df22fd6811a345bd">SYSCFG_EXTICR1_EXTI2_PK</a>   ((uint16_t)0x0A00)</td></tr>
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<tr class="memitem:ga45ed24773c389f4477944c2c43d106c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga45ed24773c389f4477944c2c43d106c0">SYSCFG_EXTICR1_EXTI3_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga45ed24773c389f4477944c2c43d106c0"><td class="mdescLeft"> </td><td class="mdescRight">EXTI3 configuration. <a href="group___peripheral___registers___bits___definition.html#ga45ed24773c389f4477944c2c43d106c0">More...</a><br /></td></tr>
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<tr class="separator:ga45ed24773c389f4477944c2c43d106c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga652183838bb096717551bf8a1917c257"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga652183838bb096717551bf8a1917c257">SYSCFG_EXTICR1_EXTI3_PB</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga652183838bb096717551bf8a1917c257"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb1809e5b8a9ebc4b1cbc8967d985929"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb1809e5b8a9ebc4b1cbc8967d985929">SYSCFG_EXTICR1_EXTI3_PC</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gacb1809e5b8a9ebc4b1cbc8967d985929"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga205440ffa174509d57c2b6a1814f8202"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga205440ffa174509d57c2b6a1814f8202">SYSCFG_EXTICR1_EXTI3_PD</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:ga205440ffa174509d57c2b6a1814f8202"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2b33beb6294fd7a257f0f3a36e0dcda"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab2b33beb6294fd7a257f0f3a36e0dcda">SYSCFG_EXTICR1_EXTI3_PE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:gab2b33beb6294fd7a257f0f3a36e0dcda"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40240ee616b6e06ecd8dabe9d8e56e71"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40240ee616b6e06ecd8dabe9d8e56e71">SYSCFG_EXTICR1_EXTI3_PF</a>   ((uint16_t)0x5000)</td></tr>
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<tr class="separator:ga40240ee616b6e06ecd8dabe9d8e56e71"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa73420dbafb7f20f16c350a12b0a0f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa73420dbafb7f20f16c350a12b0a0f5">SYSCFG_EXTICR1_EXTI3_PG</a>   ((uint16_t)0x6000)</td></tr>
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<tr class="separator:gaaa73420dbafb7f20f16c350a12b0a0f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae49def2961bf528448a4fbb4aa9c9d94"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae49def2961bf528448a4fbb4aa9c9d94">SYSCFG_EXTICR1_EXTI3_PH</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:gae49def2961bf528448a4fbb4aa9c9d94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga337e37f58e8710ea8305a16c08e390b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga337e37f58e8710ea8305a16c08e390b9">SYSCFG_EXTICR1_EXTI3_PI</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga337e37f58e8710ea8305a16c08e390b9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdad8f490346214ec7b3d61b4ea1c7ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafdad8f490346214ec7b3d61b4ea1c7ad">SYSCFG_EXTICR1_EXTI3_PJ</a>   ((uint16_t)0x9000)</td></tr>
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<tr class="separator:gafdad8f490346214ec7b3d61b4ea1c7ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c1bc7d66cef7e2c38001e533b5a2cb3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c1bc7d66cef7e2c38001e533b5a2cb3">SYSCFG_EXTICR1_EXTI3_PK</a>   ((uint16_t)0xA000)</td></tr>
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<tr class="separator:ga7c1bc7d66cef7e2c38001e533b5a2cb3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad2a57b4872977812e60d521268190e1e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad2a57b4872977812e60d521268190e1e">SYSCFG_EXTICR2_EXTI4</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:gad2a57b4872977812e60d521268190e1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6682a1b97b04c5c33085ffd2827ccd17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6682a1b97b04c5c33085ffd2827ccd17">SYSCFG_EXTICR2_EXTI5</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:ga6682a1b97b04c5c33085ffd2827ccd17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c50caf6019fd7d5038d77e61f57ad7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6c50caf6019fd7d5038d77e61f57ad7b">SYSCFG_EXTICR2_EXTI6</a>   ((uint16_t)0x0F00)</td></tr>
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<tr class="separator:ga6c50caf6019fd7d5038d77e61f57ad7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga638ea3bb014752813d064d37b3388950"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga638ea3bb014752813d064d37b3388950">SYSCFG_EXTICR2_EXTI7</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="separator:ga638ea3bb014752813d064d37b3388950"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51147f1747daf48dbcfad03285ae8889"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51147f1747daf48dbcfad03285ae8889">SYSCFG_EXTICR2_EXTI4_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga51147f1747daf48dbcfad03285ae8889"><td class="mdescLeft"> </td><td class="mdescRight">EXTI4 configuration. <a href="group___peripheral___registers___bits___definition.html#ga51147f1747daf48dbcfad03285ae8889">More...</a><br /></td></tr>
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<tr class="separator:ga51147f1747daf48dbcfad03285ae8889"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga917aeb0df688d6b34785085fc85d9e47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga917aeb0df688d6b34785085fc85d9e47">SYSCFG_EXTICR2_EXTI4_PB</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga917aeb0df688d6b34785085fc85d9e47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga14ac312beeb19d3bb34a552546477613"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga14ac312beeb19d3bb34a552546477613">SYSCFG_EXTICR2_EXTI4_PC</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga14ac312beeb19d3bb34a552546477613"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec62164e18d1b525e8272169b1efe642"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec62164e18d1b525e8272169b1efe642">SYSCFG_EXTICR2_EXTI4_PD</a>   ((uint16_t)0x0003)</td></tr>
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<tr class="separator:gaec62164e18d1b525e8272169b1efe642"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac1d2292b6a856a8a71d82f595b580b9b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac1d2292b6a856a8a71d82f595b580b9b">SYSCFG_EXTICR2_EXTI4_PE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gac1d2292b6a856a8a71d82f595b580b9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0adc3c72bddc65977e3ef56df74ed40e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0adc3c72bddc65977e3ef56df74ed40e">SYSCFG_EXTICR2_EXTI4_PF</a>   ((uint16_t)0x0005)</td></tr>
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<tr class="separator:ga0adc3c72bddc65977e3ef56df74ed40e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad5aad8ed8589e28677332ea0b200617b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad5aad8ed8589e28677332ea0b200617b">SYSCFG_EXTICR2_EXTI4_PG</a>   ((uint16_t)0x0006)</td></tr>
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<tr class="separator:gad5aad8ed8589e28677332ea0b200617b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga339f8994c317190a387a96b857aa79d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga339f8994c317190a387a96b857aa79d0">SYSCFG_EXTICR2_EXTI4_PH</a>   ((uint16_t)0x0007)</td></tr>
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<tr class="separator:ga339f8994c317190a387a96b857aa79d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad36a509bf6deabd5446a07c20964f83"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaad36a509bf6deabd5446a07c20964f83">SYSCFG_EXTICR2_EXTI4_PI</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gaad36a509bf6deabd5446a07c20964f83"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d44847f15e222328912aa17c89011ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d44847f15e222328912aa17c89011ba">SYSCFG_EXTICR2_EXTI4_PJ</a>   ((uint16_t)0x0009)</td></tr>
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<tr class="separator:ga8d44847f15e222328912aa17c89011ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga725442e7062a50081e6cde9824ef8dda"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga725442e7062a50081e6cde9824ef8dda">SYSCFG_EXTICR2_EXTI4_PK</a>   ((uint16_t)0x000A)</td></tr>
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<tr class="separator:ga725442e7062a50081e6cde9824ef8dda"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb9581c515a4bdf1ed88fe96d8c24794"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb9581c515a4bdf1ed88fe96d8c24794">SYSCFG_EXTICR2_EXTI5_PA</a>   ((uint16_t)0x0000)</td></tr>
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||
<tr class="memdesc:gafb9581c515a4bdf1ed88fe96d8c24794"><td class="mdescLeft"> </td><td class="mdescRight">EXTI5 configuration. <a href="group___peripheral___registers___bits___definition.html#gafb9581c515a4bdf1ed88fe96d8c24794">More...</a><br /></td></tr>
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<tr class="separator:gafb9581c515a4bdf1ed88fe96d8c24794"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga90a3f610234dfa13f56e72c76a12be74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga90a3f610234dfa13f56e72c76a12be74">SYSCFG_EXTICR2_EXTI5_PB</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga33b6bdc1b4bfeda0d4034dc67f1a6046"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga33b6bdc1b4bfeda0d4034dc67f1a6046">SYSCFG_EXTICR2_EXTI5_PC</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga33b6bdc1b4bfeda0d4034dc67f1a6046"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0eea392f1530c7cb794a63d04e268a70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0eea392f1530c7cb794a63d04e268a70">SYSCFG_EXTICR2_EXTI5_PD</a>   ((uint16_t)0x0030)</td></tr>
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<tr class="separator:ga0eea392f1530c7cb794a63d04e268a70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8a4e6644d0144bfb0f913cf20eaf2f8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8a4e6644d0144bfb0f913cf20eaf2f8e">SYSCFG_EXTICR2_EXTI5_PE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga8a4e6644d0144bfb0f913cf20eaf2f8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga740e27c5bead2c914a134ac4ed4d05b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga740e27c5bead2c914a134ac4ed4d05b3">SYSCFG_EXTICR2_EXTI5_PF</a>   ((uint16_t)0x0050)</td></tr>
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<tr class="separator:ga740e27c5bead2c914a134ac4ed4d05b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d78839e577ab90090abcdcff88e18c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d78839e577ab90090abcdcff88e18c8">SYSCFG_EXTICR2_EXTI5_PG</a>   ((uint16_t)0x0060)</td></tr>
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<tr class="separator:ga7d78839e577ab90090abcdcff88e18c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a06842a64138b5010186d980cb594f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a06842a64138b5010186d980cb594f9">SYSCFG_EXTICR2_EXTI5_PH</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga4a06842a64138b5010186d980cb594f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4f3c4ebe4d750f89465acd067ab0ee30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4f3c4ebe4d750f89465acd067ab0ee30">SYSCFG_EXTICR2_EXTI5_PI</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga4f3c4ebe4d750f89465acd067ab0ee30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab46385d25f48fdde97f44899f2b4e575"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab46385d25f48fdde97f44899f2b4e575">SYSCFG_EXTICR2_EXTI5_PJ</a>   ((uint16_t)0x0090)</td></tr>
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<tr class="separator:gab46385d25f48fdde97f44899f2b4e575"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3dacedcac988ae8fdf497c8ffcd4abd6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3dacedcac988ae8fdf497c8ffcd4abd6">SYSCFG_EXTICR2_EXTI5_PK</a>   ((uint16_t)0x00A0)</td></tr>
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<tr class="separator:ga3dacedcac988ae8fdf497c8ffcd4abd6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e87c78fb6dfde7c8b7f81fe3b65aae9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e87c78fb6dfde7c8b7f81fe3b65aae9">SYSCFG_EXTICR2_EXTI6_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga3e87c78fb6dfde7c8b7f81fe3b65aae9"><td class="mdescLeft"> </td><td class="mdescRight">EXTI6 configuration. <a href="group___peripheral___registers___bits___definition.html#ga3e87c78fb6dfde7c8b7f81fe3b65aae9">More...</a><br /></td></tr>
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<tr class="separator:ga3e87c78fb6dfde7c8b7f81fe3b65aae9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6528de8e4ca8741e86ae254e1d6b2a70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6528de8e4ca8741e86ae254e1d6b2a70">SYSCFG_EXTICR2_EXTI6_PB</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga6528de8e4ca8741e86ae254e1d6b2a70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53d8745705d5eb84c70a8554f61d59ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga53d8745705d5eb84c70a8554f61d59ac">SYSCFG_EXTICR2_EXTI6_PC</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga53d8745705d5eb84c70a8554f61d59ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26c97cdece451441e49120e754020cdc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26c97cdece451441e49120e754020cdc">SYSCFG_EXTICR2_EXTI6_PD</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:ga26c97cdece451441e49120e754020cdc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga804218f2dd83c72e672143ec4f283ad3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga804218f2dd83c72e672143ec4f283ad3">SYSCFG_EXTICR2_EXTI6_PE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga804218f2dd83c72e672143ec4f283ad3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d36de53e52c8a4c7991513fec326df6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0d36de53e52c8a4c7991513fec326df6">SYSCFG_EXTICR2_EXTI6_PF</a>   ((uint16_t)0x0500)</td></tr>
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<tr class="separator:ga0d36de53e52c8a4c7991513fec326df6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga278997204184bfe7c951c1da327e6fb5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga278997204184bfe7c951c1da327e6fb5">SYSCFG_EXTICR2_EXTI6_PG</a>   ((uint16_t)0x0600)</td></tr>
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<tr class="separator:ga278997204184bfe7c951c1da327e6fb5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga283486dccd660fbf830e8c44b0161a63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga283486dccd660fbf830e8c44b0161a63">SYSCFG_EXTICR2_EXTI6_PH</a>   ((uint16_t)0x0700)</td></tr>
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<tr class="separator:ga283486dccd660fbf830e8c44b0161a63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4222e7d9ed672ea2de3a038c23f9566b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4222e7d9ed672ea2de3a038c23f9566b">SYSCFG_EXTICR2_EXTI6_PI</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga4222e7d9ed672ea2de3a038c23f9566b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb3cdd7a752a460390d6ac94674d1ba0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb3cdd7a752a460390d6ac94674d1ba0">SYSCFG_EXTICR2_EXTI6_PJ</a>   ((uint16_t)0x0900)</td></tr>
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<tr class="separator:gadb3cdd7a752a460390d6ac94674d1ba0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49f0361d9e37199eea2e73bb113b7a48"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49f0361d9e37199eea2e73bb113b7a48">SYSCFG_EXTICR2_EXTI6_PK</a>   ((uint16_t)0x0A00)</td></tr>
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<tr class="separator:ga49f0361d9e37199eea2e73bb113b7a48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f1bfd3af524288b6ce54d7f9aef410a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f1bfd3af524288b6ce54d7f9aef410a">SYSCFG_EXTICR2_EXTI7_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga2f1bfd3af524288b6ce54d7f9aef410a"><td class="mdescLeft"> </td><td class="mdescRight">EXTI7 configuration. <a href="group___peripheral___registers___bits___definition.html#ga2f1bfd3af524288b6ce54d7f9aef410a">More...</a><br /></td></tr>
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<tr class="separator:ga2f1bfd3af524288b6ce54d7f9aef410a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab18d324986b18858f901febbcc2a57b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab18d324986b18858f901febbcc2a57b7">SYSCFG_EXTICR2_EXTI7_PB</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gab18d324986b18858f901febbcc2a57b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9f53618d9cf13af2b2ecf191da8595a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae9f53618d9cf13af2b2ecf191da8595a">SYSCFG_EXTICR2_EXTI7_PC</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gae9f53618d9cf13af2b2ecf191da8595a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae38aa3b76227bb8e9d8cedc31c023f63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae38aa3b76227bb8e9d8cedc31c023f63">SYSCFG_EXTICR2_EXTI7_PD</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:gae38aa3b76227bb8e9d8cedc31c023f63"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga90d097c1b5cbb62dc86327604907dcd4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga90d097c1b5cbb62dc86327604907dcd4">SYSCFG_EXTICR2_EXTI7_PE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga90d097c1b5cbb62dc86327604907dcd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf2c3a661be3569fffe11515e37de1e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf2c3a661be3569fffe11515e37de1e4">SYSCFG_EXTICR2_EXTI7_PF</a>   ((uint16_t)0x5000)</td></tr>
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<tr class="separator:gaaf2c3a661be3569fffe11515e37de1e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga987bc0488e57b14b0a98e4952df2b539"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga987bc0488e57b14b0a98e4952df2b539">SYSCFG_EXTICR2_EXTI7_PG</a>   ((uint16_t)0x6000)</td></tr>
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<tr class="separator:ga987bc0488e57b14b0a98e4952df2b539"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0ce56e15f4eb86a3e262deaa845cb99"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0ce56e15f4eb86a3e262deaa845cb99">SYSCFG_EXTICR2_EXTI7_PH</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:gab0ce56e15f4eb86a3e262deaa845cb99"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae68ca6758cf36232dd5ac63afae97cbc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae68ca6758cf36232dd5ac63afae97cbc">SYSCFG_EXTICR2_EXTI7_PI</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:gae68ca6758cf36232dd5ac63afae97cbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa22fad11dd80a70bfb0a91f56ff0e416"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa22fad11dd80a70bfb0a91f56ff0e416">SYSCFG_EXTICR2_EXTI7_PJ</a>   ((uint16_t)0x9000)</td></tr>
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<tr class="separator:gaa22fad11dd80a70bfb0a91f56ff0e416"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac51ba73786abb388c733ee96ee024de7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac51ba73786abb388c733ee96ee024de7">SYSCFG_EXTICR2_EXTI7_PK</a>   ((uint16_t)0xA000)</td></tr>
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<tr class="separator:gac51ba73786abb388c733ee96ee024de7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2a656b18cc728e38acb72cf8d7e7935"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf2a656b18cc728e38acb72cf8d7e7935">SYSCFG_EXTICR3_EXTI8</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:gaf2a656b18cc728e38acb72cf8d7e7935"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga002462e4c233adc6dd502de726994575"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga002462e4c233adc6dd502de726994575">SYSCFG_EXTICR3_EXTI9</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:ga002462e4c233adc6dd502de726994575"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8fc06b17c3b3d393b749bf9924a43a80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8fc06b17c3b3d393b749bf9924a43a80">SYSCFG_EXTICR3_EXTI10</a>   ((uint16_t)0x0F00)</td></tr>
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<tr class="separator:ga8fc06b17c3b3d393b749bf9924a43a80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa66cc9a579696c8f5c41f5f138ee1e67"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa66cc9a579696c8f5c41f5f138ee1e67">SYSCFG_EXTICR3_EXTI11</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="separator:gaa66cc9a579696c8f5c41f5f138ee1e67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae1c6843a871f1a06ca25c0de50048b10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1c6843a871f1a06ca25c0de50048b10">SYSCFG_EXTICR3_EXTI8_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:gae1c6843a871f1a06ca25c0de50048b10"><td class="mdescLeft"> </td><td class="mdescRight">EXTI8 configuration. <a href="group___peripheral___registers___bits___definition.html#gae1c6843a871f1a06ca25c0de50048b10">More...</a><br /></td></tr>
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<tr class="separator:gae1c6843a871f1a06ca25c0de50048b10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4818dc7bffc8dfc2acc48995a62e66c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4818dc7bffc8dfc2acc48995a62e66c5">SYSCFG_EXTICR3_EXTI8_PB</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga4818dc7bffc8dfc2acc48995a62e66c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba0d34ff57632d7753981404cef548e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaba0d34ff57632d7753981404cef548e2">SYSCFG_EXTICR3_EXTI8_PC</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaba0d34ff57632d7753981404cef548e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa15260ba354dee354f0a71e7913009c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa15260ba354dee354f0a71e7913009c3">SYSCFG_EXTICR3_EXTI8_PD</a>   ((uint16_t)0x0003)</td></tr>
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<tr class="memitem:ga185287204b8cead31d3760f65c5ca19d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga185287204b8cead31d3760f65c5ca19d">SYSCFG_EXTICR3_EXTI8_PE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:ga425e41001af4b205b8fbfba723572a81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga425e41001af4b205b8fbfba723572a81">SYSCFG_EXTICR3_EXTI8_PF</a>   ((uint16_t)0x0005)</td></tr>
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<tr class="memitem:ga2ecc7a12103b805da045093eb626614d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2ecc7a12103b805da045093eb626614d">SYSCFG_EXTICR3_EXTI8_PG</a>   ((uint16_t)0x0006)</td></tr>
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<tr class="memitem:ga0bf3fc7a2e35b7cbb9f08f2e3b06a3c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0bf3fc7a2e35b7cbb9f08f2e3b06a3c4">SYSCFG_EXTICR3_EXTI8_PH</a>   ((uint16_t)0x0007)</td></tr>
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<tr class="memitem:gaf0b679636c97041f5584012c78f6d7a3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0b679636c97041f5584012c78f6d7a3">SYSCFG_EXTICR3_EXTI8_PI</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="memitem:ga94bb21b628890c9cec186f42c7ead755"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga94bb21b628890c9cec186f42c7ead755">SYSCFG_EXTICR3_EXTI8_PJ</a>   ((uint16_t)0x0009)</td></tr>
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<tr class="memitem:ga93e284e59c4ff887b2e79851ac0a81c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93e284e59c4ff887b2e79851ac0a81c4">SYSCFG_EXTICR3_EXTI9_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga93e284e59c4ff887b2e79851ac0a81c4"><td class="mdescLeft"> </td><td class="mdescRight">EXTI9 configuration. <a href="group___peripheral___registers___bits___definition.html#ga93e284e59c4ff887b2e79851ac0a81c4">More...</a><br /></td></tr>
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<tr class="separator:ga93e284e59c4ff887b2e79851ac0a81c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa9271cbc1ed09774a5fef4b379cab260"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa9271cbc1ed09774a5fef4b379cab260">SYSCFG_EXTICR3_EXTI9_PB</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gaa9271cbc1ed09774a5fef4b379cab260"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1cc355176941881870c620c0837cab48"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1cc355176941881870c620c0837cab48">SYSCFG_EXTICR3_EXTI9_PC</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="memitem:ga75af3c7a94cfc78361c94b054f9fe064"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga75af3c7a94cfc78361c94b054f9fe064">SYSCFG_EXTICR3_EXTI9_PD</a>   ((uint16_t)0x0030)</td></tr>
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<tr class="separator:ga75af3c7a94cfc78361c94b054f9fe064"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafce176ef4b389251dadb98d9f59f8fe6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafce176ef4b389251dadb98d9f59f8fe6">SYSCFG_EXTICR3_EXTI9_PE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gafce176ef4b389251dadb98d9f59f8fe6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76ef2422b4d021d0cc038cb6325ed311"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76ef2422b4d021d0cc038cb6325ed311">SYSCFG_EXTICR3_EXTI9_PF</a>   ((uint16_t)0x0050)</td></tr>
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<tr class="memitem:gae1b37bf746ccfe0750aebd28cfa52a0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae1b37bf746ccfe0750aebd28cfa52a0c">SYSCFG_EXTICR3_EXTI9_PG</a>   ((uint16_t)0x0060)</td></tr>
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<tr class="separator:gae1b37bf746ccfe0750aebd28cfa52a0c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31fdedc4a90328881fe8817f4eef61b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31fdedc4a90328881fe8817f4eef61b2">SYSCFG_EXTICR3_EXTI9_PH</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga31fdedc4a90328881fe8817f4eef61b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8cd8a0da1b9ede601094f6c651a499e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8cd8a0da1b9ede601094f6c651a499e4">SYSCFG_EXTICR3_EXTI9_PI</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga8cd8a0da1b9ede601094f6c651a499e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga344339c633d16052647ab51a275922fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga344339c633d16052647ab51a275922fa">SYSCFG_EXTICR3_EXTI9_PJ</a>   ((uint16_t)0x0090)</td></tr>
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<tr class="memitem:ga25acdbb9e916c440c41a060d861130ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25acdbb9e916c440c41a060d861130ee">SYSCFG_EXTICR3_EXTI10_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga25acdbb9e916c440c41a060d861130ee"><td class="mdescLeft"> </td><td class="mdescRight">EXTI10 configuration. <a href="group___peripheral___registers___bits___definition.html#ga25acdbb9e916c440c41a060d861130ee">More...</a><br /></td></tr>
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<tr class="separator:ga25acdbb9e916c440c41a060d861130ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab8d9aec4349bf38a4a9753b267b7de7e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab8d9aec4349bf38a4a9753b267b7de7e">SYSCFG_EXTICR3_EXTI10_PB</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gab8d9aec4349bf38a4a9753b267b7de7e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga62d2b81d49e30ab4fe96572be5da8484"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga62d2b81d49e30ab4fe96572be5da8484">SYSCFG_EXTICR3_EXTI10_PC</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga62d2b81d49e30ab4fe96572be5da8484"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaab3553c540cd836d465824939c2e3b79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaab3553c540cd836d465824939c2e3b79">SYSCFG_EXTICR3_EXTI10_PD</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:gaab3553c540cd836d465824939c2e3b79"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabde568ef1c8f4bfaf18954e8ee0716a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabde568ef1c8f4bfaf18954e8ee0716a9">SYSCFG_EXTICR3_EXTI10_PE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:gabde568ef1c8f4bfaf18954e8ee0716a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga09ed841a11367cda67c7a416ed6d9b99"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga09ed841a11367cda67c7a416ed6d9b99">SYSCFG_EXTICR3_EXTI10_PF</a>   ((uint16_t)0x0500)</td></tr>
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<tr class="separator:ga09ed841a11367cda67c7a416ed6d9b99"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6dff840a6986b440e7633a3671ce57cc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6dff840a6986b440e7633a3671ce57cc">SYSCFG_EXTICR3_EXTI10_PG</a>   ((uint16_t)0x0600)</td></tr>
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<tr class="separator:ga6dff840a6986b440e7633a3671ce57cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga791e7d2bd23ae969540e5509c6718255"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga791e7d2bd23ae969540e5509c6718255">SYSCFG_EXTICR3_EXTI10_PH</a>   ((uint16_t)0x0700)</td></tr>
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<tr class="separator:ga791e7d2bd23ae969540e5509c6718255"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8bee76cf4bed88ff7b51145393b2cd19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8bee76cf4bed88ff7b51145393b2cd19">SYSCFG_EXTICR3_EXTI10_PI</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="memitem:ga59606bc6eef1b380640138cffd98979b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59606bc6eef1b380640138cffd98979b">SYSCFG_EXTICR3_EXTI10_PJ</a>   ((uint16_t)0x0900)</td></tr>
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<tr class="separator:ga59606bc6eef1b380640138cffd98979b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ca8a85d4512677eff6ed2aac897a366"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca8a85d4512677eff6ed2aac897a366">SYSCFG_EXTICR3_EXTI11_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga0ca8a85d4512677eff6ed2aac897a366"><td class="mdescLeft"> </td><td class="mdescRight">EXTI11 configuration. <a href="group___peripheral___registers___bits___definition.html#ga0ca8a85d4512677eff6ed2aac897a366">More...</a><br /></td></tr>
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<tr class="separator:ga0ca8a85d4512677eff6ed2aac897a366"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaedb3a8cc6b1763e303986553c0e4e7f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaedb3a8cc6b1763e303986553c0e4e7f8">SYSCFG_EXTICR3_EXTI11_PB</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gaedb3a8cc6b1763e303986553c0e4e7f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0b01c8ba6cb27899a4f5fa494bf2b3f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b01c8ba6cb27899a4f5fa494bf2b3f5">SYSCFG_EXTICR3_EXTI11_PC</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga0b01c8ba6cb27899a4f5fa494bf2b3f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a69d636cda0352da0982c54f582787d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a69d636cda0352da0982c54f582787d">SYSCFG_EXTICR3_EXTI11_PD</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:ga6a69d636cda0352da0982c54f582787d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44affe06868a0490f8d0cbbba51ff412"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga44affe06868a0490f8d0cbbba51ff412">SYSCFG_EXTICR3_EXTI11_PE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga44affe06868a0490f8d0cbbba51ff412"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66fb050835077047b576b3a510700d64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga66fb050835077047b576b3a510700d64">SYSCFG_EXTICR3_EXTI11_PF</a>   ((uint16_t)0x5000)</td></tr>
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<tr class="separator:ga66fb050835077047b576b3a510700d64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7b66390eeb4a8d50ebb7e87e2f281b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7b66390eeb4a8d50ebb7e87e2f281b3">SYSCFG_EXTICR3_EXTI11_PG</a>   ((uint16_t)0x6000)</td></tr>
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<tr class="separator:gaf7b66390eeb4a8d50ebb7e87e2f281b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa58cfe5d03072c259582ba8fefa322bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa58cfe5d03072c259582ba8fefa322bf">SYSCFG_EXTICR3_EXTI11_PH</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:gaa58cfe5d03072c259582ba8fefa322bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafadb14df8764208abeeaf6197489f1b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafadb14df8764208abeeaf6197489f1b4">SYSCFG_EXTICR3_EXTI11_PI</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:gafadb14df8764208abeeaf6197489f1b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8543b917331198709a24b7187dfb754f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8543b917331198709a24b7187dfb754f">SYSCFG_EXTICR3_EXTI11_PJ</a>   ((uint16_t)0x9000)</td></tr>
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<tr class="separator:ga8543b917331198709a24b7187dfb754f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d4b31f4a75d935b6a52afe6a16463d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9d4b31f4a75d935b6a52afe6a16463d1">SYSCFG_EXTICR4_EXTI12</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:ga9d4b31f4a75d935b6a52afe6a16463d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f04cda5bfe876431d5ad864302d7fa1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f04cda5bfe876431d5ad864302d7fa1">SYSCFG_EXTICR4_EXTI13</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:ga7f04cda5bfe876431d5ad864302d7fa1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabde06df3ec6e357374820a5a615991aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabde06df3ec6e357374820a5a615991aa">SYSCFG_EXTICR4_EXTI14</a>   ((uint16_t)0x0F00)</td></tr>
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<tr class="separator:gabde06df3ec6e357374820a5a615991aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd325c27cff1ae3de773d5e205a33f4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabd325c27cff1ae3de773d5e205a33f4e">SYSCFG_EXTICR4_EXTI15</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="memitem:ga3ceaa63866465faa8145ce0c5d9a44d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ceaa63866465faa8145ce0c5d9a44d0">SYSCFG_EXTICR4_EXTI12_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga3ceaa63866465faa8145ce0c5d9a44d0"><td class="mdescLeft"> </td><td class="mdescRight">EXTI12 configuration. <a href="group___peripheral___registers___bits___definition.html#ga3ceaa63866465faa8145ce0c5d9a44d0">More...</a><br /></td></tr>
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<tr class="separator:ga3ceaa63866465faa8145ce0c5d9a44d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8b00a462533a83c75c588340a2fa710"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad8b00a462533a83c75c588340a2fa710">SYSCFG_EXTICR4_EXTI12_PB</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gad8b00a462533a83c75c588340a2fa710"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d27668b1fa6b1accde06aa144faa970"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d27668b1fa6b1accde06aa144faa970">SYSCFG_EXTICR4_EXTI12_PC</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:gaa46ddd43a361d82abcb3cb7779ac74ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa46ddd43a361d82abcb3cb7779ac74ff">SYSCFG_EXTICR4_EXTI12_PD</a>   ((uint16_t)0x0003)</td></tr>
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<tr class="separator:gaa46ddd43a361d82abcb3cb7779ac74ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga102ee111e27fd67228c169836dd0849e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga102ee111e27fd67228c169836dd0849e">SYSCFG_EXTICR4_EXTI12_PE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga102ee111e27fd67228c169836dd0849e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad9785209e7e13fcf9c4f82d57bae0837"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad9785209e7e13fcf9c4f82d57bae0837">SYSCFG_EXTICR4_EXTI12_PF</a>   ((uint16_t)0x0005)</td></tr>
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<tr class="separator:gad9785209e7e13fcf9c4f82d57bae0837"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c78af5f130089bec32d6f782288765c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c78af5f130089bec32d6f782288765c">SYSCFG_EXTICR4_EXTI12_PG</a>   ((uint16_t)0x0006)</td></tr>
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<tr class="separator:ga5c78af5f130089bec32d6f782288765c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0b7baa5b844b78d3e05326607b2910a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0b7baa5b844b78d3e05326607b2910a6">SYSCFG_EXTICR4_EXTI12_PH</a>   ((uint16_t)0x0007)</td></tr>
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<tr class="separator:ga0b7baa5b844b78d3e05326607b2910a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58b0a128e5f877059ee8ca447e0baf64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga58b0a128e5f877059ee8ca447e0baf64">SYSCFG_EXTICR4_EXTI12_PI</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga58b0a128e5f877059ee8ca447e0baf64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec7d68aea236bccd244e00c3fced03c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec7d68aea236bccd244e00c3fced03c4">SYSCFG_EXTICR4_EXTI12_PJ</a>   ((uint16_t)0x0009)</td></tr>
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<tr class="separator:gaec7d68aea236bccd244e00c3fced03c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0514aaa894c9be44ba47c1346756f90b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0514aaa894c9be44ba47c1346756f90b">SYSCFG_EXTICR4_EXTI13_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga0514aaa894c9be44ba47c1346756f90b"><td class="mdescLeft"> </td><td class="mdescRight">EXTI13 configuration. <a href="group___peripheral___registers___bits___definition.html#ga0514aaa894c9be44ba47c1346756f90b">More...</a><br /></td></tr>
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<tr class="separator:ga0514aaa894c9be44ba47c1346756f90b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34e6776e3ebfecc9e78c5aec77c48eff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga34e6776e3ebfecc9e78c5aec77c48eff">SYSCFG_EXTICR4_EXTI13_PB</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga34e6776e3ebfecc9e78c5aec77c48eff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1c7833d4e3c6b7f3878f62a200a6ab14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c7833d4e3c6b7f3878f62a200a6ab14">SYSCFG_EXTICR4_EXTI13_PC</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga1c7833d4e3c6b7f3878f62a200a6ab14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabed530f628b3c37281f7a583af1cdb3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabed530f628b3c37281f7a583af1cdb3c">SYSCFG_EXTICR4_EXTI13_PD</a>   ((uint16_t)0x0030)</td></tr>
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<tr class="separator:gabed530f628b3c37281f7a583af1cdb3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7dc5424bf39509a989464a81ec0714da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7dc5424bf39509a989464a81ec0714da">SYSCFG_EXTICR4_EXTI13_PE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga7dc5424bf39509a989464a81ec0714da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaf4c995587d7bae6436e6793b8214627"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaf4c995587d7bae6436e6793b8214627">SYSCFG_EXTICR4_EXTI13_PF</a>   ((uint16_t)0x0050)</td></tr>
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<tr class="separator:gaaf4c995587d7bae6436e6793b8214627"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4dedb6adbf49c40e5a15ad2afc471155"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4dedb6adbf49c40e5a15ad2afc471155">SYSCFG_EXTICR4_EXTI13_PG</a>   ((uint16_t)0x0060)</td></tr>
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<tr class="separator:ga4dedb6adbf49c40e5a15ad2afc471155"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga61214ec3d87450f54b959aab49ea65b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga61214ec3d87450f54b959aab49ea65b6">SYSCFG_EXTICR4_EXTI13_PH</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga61214ec3d87450f54b959aab49ea65b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae849a9a49305e7d6cbdf64843f689fe8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae849a9a49305e7d6cbdf64843f689fe8">SYSCFG_EXTICR4_EXTI13_PI</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gae849a9a49305e7d6cbdf64843f689fe8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab24991447f0782993e757f4b40f9a240"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab24991447f0782993e757f4b40f9a240">SYSCFG_EXTICR4_EXTI13_PJ</a>   ((uint16_t)0x0009)</td></tr>
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<tr class="separator:gab24991447f0782993e757f4b40f9a240"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ad140a68e3e4e0406a182a504679ea9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ad140a68e3e4e0406a182a504679ea9">SYSCFG_EXTICR4_EXTI14_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:ga7ad140a68e3e4e0406a182a504679ea9"><td class="mdescLeft"> </td><td class="mdescRight">EXTI14 configuration. <a href="group___peripheral___registers___bits___definition.html#ga7ad140a68e3e4e0406a182a504679ea9">More...</a><br /></td></tr>
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<tr class="separator:ga7ad140a68e3e4e0406a182a504679ea9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae5c1b8a0f2b4f79bd868bbb2b4eff617"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae5c1b8a0f2b4f79bd868bbb2b4eff617">SYSCFG_EXTICR4_EXTI14_PB</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gae5c1b8a0f2b4f79bd868bbb2b4eff617"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8ca668cdd447acb1740566f46de5eb19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8ca668cdd447acb1740566f46de5eb19">SYSCFG_EXTICR4_EXTI14_PC</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga8ca668cdd447acb1740566f46de5eb19"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f20b2bfa9dc8b57a987c127c6dfa6fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f20b2bfa9dc8b57a987c127c6dfa6fe">SYSCFG_EXTICR4_EXTI14_PD</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:ga2f20b2bfa9dc8b57a987c127c6dfa6fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4c13c49f6d93865ba05361cd86fddabf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4c13c49f6d93865ba05361cd86fddabf">SYSCFG_EXTICR4_EXTI14_PE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga4c13c49f6d93865ba05361cd86fddabf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9df1ee6f60db93301acaa9220a591da9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9df1ee6f60db93301acaa9220a591da9">SYSCFG_EXTICR4_EXTI14_PF</a>   ((uint16_t)0x0500)</td></tr>
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<tr class="separator:ga9df1ee6f60db93301acaa9220a591da9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8ae4d091bb2c7148188ef430734020a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae8ae4d091bb2c7148188ef430734020a">SYSCFG_EXTICR4_EXTI14_PG</a>   ((uint16_t)0x0600)</td></tr>
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<tr class="separator:gae8ae4d091bb2c7148188ef430734020a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07b38f38fa3957c6bc45ef4282b58377"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga07b38f38fa3957c6bc45ef4282b58377">SYSCFG_EXTICR4_EXTI14_PH</a>   ((uint16_t)0x0700)</td></tr>
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<tr class="separator:ga07b38f38fa3957c6bc45ef4282b58377"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7eac0e4606773207d17bae55b9c98c48"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7eac0e4606773207d17bae55b9c98c48">SYSCFG_EXTICR4_EXTI14_PI</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga7eac0e4606773207d17bae55b9c98c48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63a22133144911fc2a0f2f4ba3169978"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga63a22133144911fc2a0f2f4ba3169978">SYSCFG_EXTICR4_EXTI14_PJ</a>   ((uint16_t)0x0900)</td></tr>
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<tr class="separator:ga63a22133144911fc2a0f2f4ba3169978"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2f28920677dd99f9132ed28f7b1d5e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2f28920677dd99f9132ed28f7b1d5e2">SYSCFG_EXTICR4_EXTI15_PA</a>   ((uint16_t)0x0000)</td></tr>
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<tr class="memdesc:gae2f28920677dd99f9132ed28f7b1d5e2"><td class="mdescLeft"> </td><td class="mdescRight">EXTI15 configuration. <a href="group___peripheral___registers___bits___definition.html#gae2f28920677dd99f9132ed28f7b1d5e2">More...</a><br /></td></tr>
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<tr class="separator:gae2f28920677dd99f9132ed28f7b1d5e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga412f44d6a8f8f60420d7e7f8b5635e09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga412f44d6a8f8f60420d7e7f8b5635e09">SYSCFG_EXTICR4_EXTI15_PB</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga412f44d6a8f8f60420d7e7f8b5635e09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49778592caef3a176ee82c9b83e25148"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga49778592caef3a176ee82c9b83e25148">SYSCFG_EXTICR4_EXTI15_PC</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga49778592caef3a176ee82c9b83e25148"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac23e07d92a68cf7f8c3e58b479638885"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac23e07d92a68cf7f8c3e58b479638885">SYSCFG_EXTICR4_EXTI15_PD</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:gac23e07d92a68cf7f8c3e58b479638885"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaefd64bc0ea005d03068f2e9b8f425944"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaefd64bc0ea005d03068f2e9b8f425944">SYSCFG_EXTICR4_EXTI15_PE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:gaefd64bc0ea005d03068f2e9b8f425944"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e88d51ebabe9f70e5b7c2ad60899d54"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e88d51ebabe9f70e5b7c2ad60899d54">SYSCFG_EXTICR4_EXTI15_PF</a>   ((uint16_t)0x5000)</td></tr>
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<tr class="separator:ga5e88d51ebabe9f70e5b7c2ad60899d54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga51d341c45e98ccbd82bf7003bfa56e6b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga51d341c45e98ccbd82bf7003bfa56e6b">SYSCFG_EXTICR4_EXTI15_PG</a>   ((uint16_t)0x6000)</td></tr>
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<tr class="separator:ga51d341c45e98ccbd82bf7003bfa56e6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga701c1065ec215a34329017bae69046c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga701c1065ec215a34329017bae69046c3">SYSCFG_EXTICR4_EXTI15_PH</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:ga701c1065ec215a34329017bae69046c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga10744f0cf063194bad45f820287ade46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga10744f0cf063194bad45f820287ade46">SYSCFG_EXTICR4_EXTI15_PI</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga10744f0cf063194bad45f820287ade46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaffa9c5da4a6103fc4e5bded02646de74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaffa9c5da4a6103fc4e5bded02646de74">SYSCFG_EXTICR4_EXTI15_PJ</a>   ((uint16_t)0x9000)</td></tr>
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<tr class="separator:gaffa9c5da4a6103fc4e5bded02646de74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga261292a3a7ca1f767915b2e2ec3a7806"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga261292a3a7ca1f767915b2e2ec3a7806">SYSCFG_CMPCR_CMP_PD</a>   ((uint32_t)0x00000001)</td></tr>
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<tr class="separator:ga261292a3a7ca1f767915b2e2ec3a7806"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae16bcca9b727e68f11467b6b3dad6215"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae16bcca9b727e68f11467b6b3dad6215">SYSCFG_CMPCR_READY</a>   ((uint32_t)0x00000100)</td></tr>
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<tr class="separator:gae16bcca9b727e68f11467b6b3dad6215"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga93d86355e5e3b399ed45e1ca83abed2a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga93d86355e5e3b399ed45e1ca83abed2a">TIM_CR1_CEN</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga93d86355e5e3b399ed45e1ca83abed2a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4f2a9f0cf7b60e3c623af451f141f3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa4f2a9f0cf7b60e3c623af451f141f3c">TIM_CR1_UDIS</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaa4f2a9f0cf7b60e3c623af451f141f3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga06c997c2c23e8bef7ca07579762c113b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga06c997c2c23e8bef7ca07579762c113b">TIM_CR1_URS</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga06c997c2c23e8bef7ca07579762c113b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d3d1488296350af6d36fbbf71905d29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d3d1488296350af6d36fbbf71905d29">TIM_CR1_OPM</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga6d3d1488296350af6d36fbbf71905d29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacea10770904af189f3aaeb97b45722aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacea10770904af189f3aaeb97b45722aa">TIM_CR1_DIR</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gacea10770904af189f3aaeb97b45722aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga352b3c389bde13dd6049de0afdd874f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga352b3c389bde13dd6049de0afdd874f1">TIM_CR1_CMS</a>   ((uint16_t)0x0060)</td></tr>
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<tr class="separator:ga352b3c389bde13dd6049de0afdd874f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83ca6f7810aba73dc8c12f22092d97a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83ca6f7810aba73dc8c12f22092d97a2">TIM_CR1_CMS_0</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga83ca6f7810aba73dc8c12f22092d97a2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3ee4adcde3c001d3b97d2eae1730ea9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3ee4adcde3c001d3b97d2eae1730ea9">TIM_CR1_CMS_1</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gab3ee4adcde3c001d3b97d2eae1730ea9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a3ad409f6b147cdcbafbfe29102f3fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a3ad409f6b147cdcbafbfe29102f3fd">TIM_CR1_ARPE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga4a3ad409f6b147cdcbafbfe29102f3fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacacc4ff7e5b75fd2e4e6b672ccd33a72"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacacc4ff7e5b75fd2e4e6b672ccd33a72">TIM_CR1_CKD</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:gacacc4ff7e5b75fd2e4e6b672ccd33a72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga458d536d82aa3db7d227b0f00b36808f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga458d536d82aa3db7d227b0f00b36808f">TIM_CR1_CKD_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga458d536d82aa3db7d227b0f00b36808f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ff2d6c2c350e8b719a8ad49c9a6bcbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ff2d6c2c350e8b719a8ad49c9a6bcbe">TIM_CR1_CKD_1</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga7ff2d6c2c350e8b719a8ad49c9a6bcbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae22c9c1197107d6fa629f419a29541e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaae22c9c1197107d6fa629f419a29541e">TIM_CR2_CCPC</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gaae22c9c1197107d6fa629f419a29541e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0328c1339b2b1633ef7a8db4c02d0d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf0328c1339b2b1633ef7a8db4c02d0d5">TIM_CR2_CCUS</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gaf0328c1339b2b1633ef7a8db4c02d0d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade656832d3ec303a2a7a422638dd560e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade656832d3ec303a2a7a422638dd560e">TIM_CR2_CCDS</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gade656832d3ec303a2a7a422638dd560e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa6987d980e5c4c71c7d0faa1eb97a45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa6987d980e5c4c71c7d0faa1eb97a45">TIM_CR2_MMS</a>   ((uint16_t)0x0070)</td></tr>
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||
<tr class="separator:gaaa6987d980e5c4c71c7d0faa1eb97a45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf3e55308e84106d6501201e66bd46ab6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e55308e84106d6501201e66bd46ab6">TIM_CR2_MMS_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gaf3e55308e84106d6501201e66bd46ab6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b1036929b0a4ba5bd5cced9b8e0f4c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b1036929b0a4ba5bd5cced9b8e0f4c3">TIM_CR2_MMS_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga4b1036929b0a4ba5bd5cced9b8e0f4c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb74a815afdd856d51cfcf1ddf3fce6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb74a815afdd856d51cfcf1ddf3fce6a">TIM_CR2_MMS_2</a>   ((uint16_t)0x0040)</td></tr>
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||
<tr class="separator:gacb74a815afdd856d51cfcf1ddf3fce6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad07504497b70af628fa1aee8fe7ef63c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad07504497b70af628fa1aee8fe7ef63c">TIM_CR2_TI1S</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:gad07504497b70af628fa1aee8fe7ef63c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31b26bf058f88d771c33aff85ec89358"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31b26bf058f88d771c33aff85ec89358">TIM_CR2_OIS1</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga31b26bf058f88d771c33aff85ec89358"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae61f8d54923999fffb6db381e81f2b69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae61f8d54923999fffb6db381e81f2b69">TIM_CR2_OIS1N</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gae61f8d54923999fffb6db381e81f2b69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga61467648a433bd887683b9a4760021fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga61467648a433bd887683b9a4760021fa">TIM_CR2_OIS2</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga61467648a433bd887683b9a4760021fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga769146db660b832f3ef26f892b567bd4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga769146db660b832f3ef26f892b567bd4">TIM_CR2_OIS2N</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga769146db660b832f3ef26f892b567bd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad974d7c91edf6f1bd47e892b3b6f7565"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad974d7c91edf6f1bd47e892b3b6f7565">TIM_CR2_OIS3</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gad974d7c91edf6f1bd47e892b3b6f7565"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20fb9b62a7e8d114fbd180abd9f8ceae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20fb9b62a7e8d114fbd180abd9f8ceae">TIM_CR2_OIS3N</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga20fb9b62a7e8d114fbd180abd9f8ceae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad644f2f4b26e46587abedc8d3164e56e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad644f2f4b26e46587abedc8d3164e56e">TIM_CR2_OIS4</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:gad644f2f4b26e46587abedc8d3164e56e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae92349731a6107e0f3a251b44a67c7ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae92349731a6107e0f3a251b44a67c7ea">TIM_SMCR_SMS</a>   ((uint16_t)0x0007)</td></tr>
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<tr class="separator:gae92349731a6107e0f3a251b44a67c7ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d1ebece401aeb12abd466d2eafa78b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d1ebece401aeb12abd466d2eafa78b2">TIM_SMCR_SMS_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga7d1ebece401aeb12abd466d2eafa78b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa980a3121ab6cda5a4a42b959da8421e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa980a3121ab6cda5a4a42b959da8421e">TIM_SMCR_SMS_1</a>   ((uint16_t)0x0002)</td></tr>
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||
<tr class="separator:gaa980a3121ab6cda5a4a42b959da8421e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63847fc3c71f582403e6301b1229c3ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga63847fc3c71f582403e6301b1229c3ed">TIM_SMCR_SMS_2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga63847fc3c71f582403e6301b1229c3ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8680e719bca2b672d850504220ae51fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8680e719bca2b672d850504220ae51fc">TIM_SMCR_TS</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga8680e719bca2b672d850504220ae51fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d1f040f9259acb3c2fba7b0c7eb3d96"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8d1f040f9259acb3c2fba7b0c7eb3d96">TIM_SMCR_TS_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga8d1f040f9259acb3c2fba7b0c7eb3d96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacb82212fcc89166a43ff97542da9182d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacb82212fcc89166a43ff97542da9182d">TIM_SMCR_TS_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gacb82212fcc89166a43ff97542da9182d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacf0dbaf4a2ec8759f283f82a958ef6a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacf0dbaf4a2ec8759f283f82a958ef6a8">TIM_SMCR_TS_2</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gacf0dbaf4a2ec8759f283f82a958ef6a8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52101db4ca2c7b3003f1b16a49b2032c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52101db4ca2c7b3003f1b16a49b2032c">TIM_SMCR_MSM</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga52101db4ca2c7b3003f1b16a49b2032c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2ed8b32d9eb8eea251bd1dac4f34668"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae2ed8b32d9eb8eea251bd1dac4f34668">TIM_SMCR_ETF</a>   ((uint16_t)0x0F00)</td></tr>
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<tr class="separator:gae2ed8b32d9eb8eea251bd1dac4f34668"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43745c2894cfc1e5ee619ac85d8d5a62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga43745c2894cfc1e5ee619ac85d8d5a62">TIM_SMCR_ETF_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga43745c2894cfc1e5ee619ac85d8d5a62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga661e6cce23553cf0ad3a60d8573b9a2c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga661e6cce23553cf0ad3a60d8573b9a2c">TIM_SMCR_ETF_1</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga661e6cce23553cf0ad3a60d8573b9a2c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb5528381fb64ffbcc719de478391ae2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafb5528381fb64ffbcc719de478391ae2">TIM_SMCR_ETF_2</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:gafb5528381fb64ffbcc719de478391ae2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6082700946fc61a6f9d6209e258fcc14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6082700946fc61a6f9d6209e258fcc14">TIM_SMCR_ETF_3</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga6082700946fc61a6f9d6209e258fcc14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ebb9e631876435e276211d88e797386"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ebb9e631876435e276211d88e797386">TIM_SMCR_ETPS</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:ga0ebb9e631876435e276211d88e797386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00b43cd09557a69ed10471ed76b228d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga00b43cd09557a69ed10471ed76b228d8">TIM_SMCR_ETPS_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga00b43cd09557a69ed10471ed76b228d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf12f04862dbc92ca238d1518b27b16b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabf12f04862dbc92ca238d1518b27b16b">TIM_SMCR_ETPS_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gabf12f04862dbc92ca238d1518b27b16b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga331a1d5f39d5f47b5409054e693fc651"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga331a1d5f39d5f47b5409054e693fc651">TIM_SMCR_ECE</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga331a1d5f39d5f47b5409054e693fc651"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a5f335c3d7a4f82d1e91dc1511e3322"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2a5f335c3d7a4f82d1e91dc1511e3322">TIM_SMCR_ETP</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga2a5f335c3d7a4f82d1e91dc1511e3322"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c6d3e0495e6c06da4bdd0ad8995a32b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5c6d3e0495e6c06da4bdd0ad8995a32b">TIM_DIER_UIE</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga5c6d3e0495e6c06da4bdd0ad8995a32b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ba7f7ca97eeaf6cc23cd6765c6bf678"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1ba7f7ca97eeaf6cc23cd6765c6bf678">TIM_DIER_CC1IE</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga1ba7f7ca97eeaf6cc23cd6765c6bf678"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga757c59b690770adebf33e20d3d9dec15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga757c59b690770adebf33e20d3d9dec15">TIM_DIER_CC2IE</a>   ((uint16_t)0x0004)</td></tr>
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||
<tr class="separator:ga757c59b690770adebf33e20d3d9dec15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4edf003f04bcf250bddf5ed284201c2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4edf003f04bcf250bddf5ed284201c2e">TIM_DIER_CC3IE</a>   ((uint16_t)0x0008)</td></tr>
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||
<tr class="separator:ga4edf003f04bcf250bddf5ed284201c2e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ad0f562a014572793b49fe87184338b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ad0f562a014572793b49fe87184338b">TIM_DIER_CC4IE</a>   ((uint16_t)0x0010)</td></tr>
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||
<tr class="separator:ga6ad0f562a014572793b49fe87184338b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade8a374e04740aac1ece248b868522fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade8a374e04740aac1ece248b868522fe">TIM_DIER_COMIE</a>   ((uint16_t)0x0020)</td></tr>
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||
<tr class="separator:gade8a374e04740aac1ece248b868522fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa755fef2c4e96c63f2ea1cd9a32f956a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa755fef2c4e96c63f2ea1cd9a32f956a">TIM_DIER_TIE</a>   ((uint16_t)0x0040)</td></tr>
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||
<tr class="separator:gaa755fef2c4e96c63f2ea1cd9a32f956a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1fcb0d6d9fb7486a5901032fd81aef6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1fcb0d6d9fb7486a5901032fd81aef6a">TIM_DIER_BIE</a>   ((uint16_t)0x0080)</td></tr>
|
||
<tr class="separator:ga1fcb0d6d9fb7486a5901032fd81aef6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9f47792b1c2f123464a2955f445c811"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9f47792b1c2f123464a2955f445c811">TIM_DIER_UDE</a>   ((uint16_t)0x0100)</td></tr>
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||
<tr class="separator:gab9f47792b1c2f123464a2955f445c811"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae181bb16ec916aba8ba86f58f745fdfd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae181bb16ec916aba8ba86f58f745fdfd">TIM_DIER_CC1DE</a>   ((uint16_t)0x0200)</td></tr>
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||
<tr class="separator:gae181bb16ec916aba8ba86f58f745fdfd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58f97064991095b28c91028ca3cca28e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga58f97064991095b28c91028ca3cca28e">TIM_DIER_CC2DE</a>   ((uint16_t)0x0400)</td></tr>
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||
<tr class="separator:ga58f97064991095b28c91028ca3cca28e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1567bff5dc0564b26a8b3cff1f0fe0a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1567bff5dc0564b26a8b3cff1f0fe0a4">TIM_DIER_CC3DE</a>   ((uint16_t)0x0800)</td></tr>
|
||
<tr class="separator:ga1567bff5dc0564b26a8b3cff1f0fe0a4"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gaaba034412c54fa07024e516492748614"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaba034412c54fa07024e516492748614">TIM_DIER_CC4DE</a>   ((uint16_t)0x1000)</td></tr>
|
||
<tr class="separator:gaaba034412c54fa07024e516492748614"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79c3fab9d33de953a0a7f7d6516c73bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga79c3fab9d33de953a0a7f7d6516c73bc">TIM_DIER_COMDE</a>   ((uint16_t)0x2000)</td></tr>
|
||
<tr class="separator:ga79c3fab9d33de953a0a7f7d6516c73bc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a752d4295f100708df9b8be5a7f439d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5a752d4295f100708df9b8be5a7f439d">TIM_DIER_TDE</a>   ((uint16_t)0x4000)</td></tr>
|
||
<tr class="separator:ga5a752d4295f100708df9b8be5a7f439d"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac8c03fabc10654d2a3f76ea40fcdbde6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8c03fabc10654d2a3f76ea40fcdbde6">TIM_SR_UIF</a>   ((uint16_t)0x0001)</td></tr>
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||
<tr class="separator:gac8c03fabc10654d2a3f76ea40fcdbde6"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga449a61344a97608d85384c29f003c0e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga449a61344a97608d85384c29f003c0e9">TIM_SR_CC1IF</a>   ((uint16_t)0x0002)</td></tr>
|
||
<tr class="separator:ga449a61344a97608d85384c29f003c0e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga25a48bf099467169aa50464fbf462bd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25a48bf099467169aa50464fbf462bd8">TIM_SR_CC2IF</a>   ((uint16_t)0x0004)</td></tr>
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||
<tr class="separator:ga25a48bf099467169aa50464fbf462bd8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3cf234a1059c0a04799e88382cdc0f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3cf234a1059c0a04799e88382cdc0f2">TIM_SR_CC3IF</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gad3cf234a1059c0a04799e88382cdc0f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacade8a06303bf216bfb03140c7e16cac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacade8a06303bf216bfb03140c7e16cac">TIM_SR_CC4IF</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gacade8a06303bf216bfb03140c7e16cac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91775c029171c4585e9cca6ebf1cd57a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91775c029171c4585e9cca6ebf1cd57a">TIM_SR_COMIF</a>   ((uint16_t)0x0020)</td></tr>
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||
<tr class="separator:ga91775c029171c4585e9cca6ebf1cd57a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c8b16f3ced6ec03e9001276b134846e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c8b16f3ced6ec03e9001276b134846e">TIM_SR_TIF</a>   ((uint16_t)0x0040)</td></tr>
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||
<tr class="separator:ga7c8b16f3ced6ec03e9001276b134846e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d52cd5a57c9a26b0d993c93d9875097"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6d52cd5a57c9a26b0d993c93d9875097">TIM_SR_BIF</a>   ((uint16_t)0x0080)</td></tr>
|
||
<tr class="separator:ga6d52cd5a57c9a26b0d993c93d9875097"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga819c4b27f8fa99b537c4407521f9780c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga819c4b27f8fa99b537c4407521f9780c">TIM_SR_CC1OF</a>   ((uint16_t)0x0200)</td></tr>
|
||
<tr class="separator:ga819c4b27f8fa99b537c4407521f9780c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b7798da5863d559ea9a642af6658050"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3b7798da5863d559ea9a642af6658050">TIM_SR_CC2OF</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga3b7798da5863d559ea9a642af6658050"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7a2d4c831eb641ba082156e41d03358"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7a2d4c831eb641ba082156e41d03358">TIM_SR_CC3OF</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gaf7a2d4c831eb641ba082156e41d03358"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81ba979e8309b66808e06e4de34bc740"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga81ba979e8309b66808e06e4de34bc740">TIM_SR_CC4OF</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga81ba979e8309b66808e06e4de34bc740"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16f52a8e9aad153223405b965566ae91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga16f52a8e9aad153223405b965566ae91">TIM_EGR_UG</a>   ((uint8_t)0x01)</td></tr>
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||
<tr class="separator:ga16f52a8e9aad153223405b965566ae91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0a1318609761df5de5213e9e75b5aa6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0a1318609761df5de5213e9e75b5aa6a">TIM_EGR_CC1G</a>   ((uint8_t)0x02)</td></tr>
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||
<tr class="separator:ga0a1318609761df5de5213e9e75b5aa6a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5423de00e86aeb8a4657a509af485055"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5423de00e86aeb8a4657a509af485055">TIM_EGR_CC2G</a>   ((uint8_t)0x04)</td></tr>
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||
<tr class="separator:ga5423de00e86aeb8a4657a509af485055"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga064d2030abccc099ded418fd81d6aa07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga064d2030abccc099ded418fd81d6aa07">TIM_EGR_CC3G</a>   ((uint8_t)0x08)</td></tr>
|
||
<tr class="separator:ga064d2030abccc099ded418fd81d6aa07"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1c4e5555dd3be8ab1e631d1053f4a305"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1c4e5555dd3be8ab1e631d1053f4a305">TIM_EGR_CC4G</a>   ((uint8_t)0x10)</td></tr>
|
||
<tr class="separator:ga1c4e5555dd3be8ab1e631d1053f4a305"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadb06f8bb364307695c7d6a028391de7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadb06f8bb364307695c7d6a028391de7b">TIM_EGR_COMG</a>   ((uint8_t)0x20)</td></tr>
|
||
<tr class="separator:gadb06f8bb364307695c7d6a028391de7b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2eabface433d6adaa2dee3df49852585"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2eabface433d6adaa2dee3df49852585">TIM_EGR_TG</a>   ((uint8_t)0x40)</td></tr>
|
||
<tr class="separator:ga2eabface433d6adaa2dee3df49852585"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga08c5635a0ac0ce5618485319a4fa0f18"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga08c5635a0ac0ce5618485319a4fa0f18">TIM_EGR_BG</a>   ((uint8_t)0x80)</td></tr>
|
||
<tr class="separator:ga08c5635a0ac0ce5618485319a4fa0f18"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga95291df1eaf532c5c996d176648938eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95291df1eaf532c5c996d176648938eb">TIM_CCMR1_CC1S</a>   ((uint16_t)0x0003)</td></tr>
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||
<tr class="separator:ga95291df1eaf532c5c996d176648938eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e4968b5500d58d1aebce888da31eb5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1e4968b5500d58d1aebce888da31eb5d">TIM_CCMR1_CC1S_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga1e4968b5500d58d1aebce888da31eb5d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga299207b757f31c9c02471ab5f4f59dbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga299207b757f31c9c02471ab5f4f59dbe">TIM_CCMR1_CC1S_1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga299207b757f31c9c02471ab5f4f59dbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9c5878e85ce02c22d8a374deebd1b6e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9c5878e85ce02c22d8a374deebd1b6e">TIM_CCMR1_OC1FE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gab9c5878e85ce02c22d8a374deebd1b6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1aa54ddf87a4b339881a8d5368ec80eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1aa54ddf87a4b339881a8d5368ec80eb">TIM_CCMR1_OC1PE</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga1aa54ddf87a4b339881a8d5368ec80eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6ddb3dc889733e71d812baa3873cb13b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6ddb3dc889733e71d812baa3873cb13b">TIM_CCMR1_OC1M</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga6ddb3dc889733e71d812baa3873cb13b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga410a4752a98081bad8ab3f72b28e7c5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga410a4752a98081bad8ab3f72b28e7c5f">TIM_CCMR1_OC1M_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga410a4752a98081bad8ab3f72b28e7c5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b5f6ec25063483641d6dc065d96d2b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5f6ec25063483641d6dc065d96d2b5">TIM_CCMR1_OC1M_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga8b5f6ec25063483641d6dc065d96d2b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac024f6b9972b940925ab5786ee38701b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac024f6b9972b940925ab5786ee38701b">TIM_CCMR1_OC1M_2</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gac024f6b9972b940925ab5786ee38701b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f44c50cf9928d2afab014e2ca29baba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8f44c50cf9928d2afab014e2ca29baba">TIM_CCMR1_OC1CE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga8f44c50cf9928d2afab014e2ca29baba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacdb0986b78bea5b53ea61e4ddd667cbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacdb0986b78bea5b53ea61e4ddd667cbf">TIM_CCMR1_CC2S</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:gacdb0986b78bea5b53ea61e4ddd667cbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52bb0e50c11c35dcf42aeff7f1c22874"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52bb0e50c11c35dcf42aeff7f1c22874">TIM_CCMR1_CC2S_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga52bb0e50c11c35dcf42aeff7f1c22874"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga78303c37fdbe0be80f5fc7d21e9eba45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga78303c37fdbe0be80f5fc7d21e9eba45">TIM_CCMR1_CC2S_1</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga78303c37fdbe0be80f5fc7d21e9eba45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3bf610cf77c3c6c936ce7c4f85992e6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3bf610cf77c3c6c936ce7c4f85992e6c">TIM_CCMR1_OC2FE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga3bf610cf77c3c6c936ce7c4f85992e6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabddbf508732039730125ab3e87e9d370"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabddbf508732039730125ab3e87e9d370">TIM_CCMR1_OC2PE</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gabddbf508732039730125ab3e87e9d370"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2326bafe64ba2ebdde908d66219eaa6f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2326bafe64ba2ebdde908d66219eaa6f">TIM_CCMR1_OC2M</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:ga2326bafe64ba2ebdde908d66219eaa6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadbb68b91da16ffd509a6c7a2a397083c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadbb68b91da16ffd509a6c7a2a397083c">TIM_CCMR1_OC2M_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gadbb68b91da16ffd509a6c7a2a397083c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaedb673b7e2c016191579de704eb842e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaedb673b7e2c016191579de704eb842e4">TIM_CCMR1_OC2M_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gaedb673b7e2c016191579de704eb842e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad039a41e5fe97ddf904a0f9f95eb539e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad039a41e5fe97ddf904a0f9f95eb539e">TIM_CCMR1_OC2M_2</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:gad039a41e5fe97ddf904a0f9f95eb539e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19a8dd4ea04d262ec4e97b5c7a8677a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga19a8dd4ea04d262ec4e97b5c7a8677a5">TIM_CCMR1_OC2CE</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga19a8dd4ea04d262ec4e97b5c7a8677a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab46b7186665f5308cd2ca52acfb63e72"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab46b7186665f5308cd2ca52acfb63e72">TIM_CCMR1_IC1PSC</a>   ((uint16_t)0x000C)</td></tr>
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<tr class="separator:gab46b7186665f5308cd2ca52acfb63e72"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05673358a44aeaa56daefca67341b29d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga05673358a44aeaa56daefca67341b29d">TIM_CCMR1_IC1PSC_0</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga05673358a44aeaa56daefca67341b29d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf42b75da9b2f127dca98b6ca616f7add"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf42b75da9b2f127dca98b6ca616f7add">TIM_CCMR1_IC1PSC_1</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gaf42b75da9b2f127dca98b6ca616f7add"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0ee123675d8b8f98b5a6eeeccf37912"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab0ee123675d8b8f98b5a6eeeccf37912">TIM_CCMR1_IC1F</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:gab0ee123675d8b8f98b5a6eeeccf37912"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7dde4afee556d2d8d22885f191da65a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7dde4afee556d2d8d22885f191da65a6">TIM_CCMR1_IC1F_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga7dde4afee556d2d8d22885f191da65a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga201491465e6864088210bccb8491be84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga201491465e6864088210bccb8491be84">TIM_CCMR1_IC1F_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga201491465e6864088210bccb8491be84"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabaa55ab1e0109b055cabef579c32d67b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabaa55ab1e0109b055cabef579c32d67b">TIM_CCMR1_IC1F_2</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gabaa55ab1e0109b055cabef579c32d67b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga23da95530eb6d6451c7c9e451a580f42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga23da95530eb6d6451c7c9e451a580f42">TIM_CCMR1_IC1F_3</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga23da95530eb6d6451c7c9e451a580f42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e8e704f9ce5742f45e15e3b3126aa9d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e8e704f9ce5742f45e15e3b3126aa9d">TIM_CCMR1_IC2PSC</a>   ((uint16_t)0x0C00)</td></tr>
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<tr class="separator:ga5e8e704f9ce5742f45e15e3b3126aa9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39206b27b5b1c5941b2a14ee8e2f1223"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga39206b27b5b1c5941b2a14ee8e2f1223">TIM_CCMR1_IC2PSC_0</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga39206b27b5b1c5941b2a14ee8e2f1223"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae861d74943f3c045421f9fdc8b966841"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae861d74943f3c045421f9fdc8b966841">TIM_CCMR1_IC2PSC_1</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gae861d74943f3c045421f9fdc8b966841"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b942752d686c23323880ff576e7dffb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b942752d686c23323880ff576e7dffb">TIM_CCMR1_IC2F</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="separator:ga2b942752d686c23323880ff576e7dffb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d75acd7072f28844074702683d8493f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5d75acd7072f28844074702683d8493f">TIM_CCMR1_IC2F_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga5d75acd7072f28844074702683d8493f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40e49318b54b16bda6fd7feea7c9a7dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga40e49318b54b16bda6fd7feea7c9a7dd">TIM_CCMR1_IC2F_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga40e49318b54b16bda6fd7feea7c9a7dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga932148c784f5cbee4dfcafcbadaf0107"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga932148c784f5cbee4dfcafcbadaf0107">TIM_CCMR1_IC2F_2</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga932148c784f5cbee4dfcafcbadaf0107"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafece48b6f595ef9717d523fa23cea1e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafece48b6f595ef9717d523fa23cea1e8">TIM_CCMR1_IC2F_3</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:gafece48b6f595ef9717d523fa23cea1e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2eabcc7e322b02c9c406b3ff70308260"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2eabcc7e322b02c9c406b3ff70308260">TIM_CCMR2_CC3S</a>   ((uint16_t)0x0003)</td></tr>
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<tr class="separator:ga2eabcc7e322b02c9c406b3ff70308260"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga68c04aea2e89f1e89bd323d6d6e5e6c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga68c04aea2e89f1e89bd323d6d6e5e6c0">TIM_CCMR2_CC3S_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga68c04aea2e89f1e89bd323d6d6e5e6c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4bed6648aad6e8d16196246b355452dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4bed6648aad6e8d16196246b355452dc">TIM_CCMR2_CC3S_1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga4bed6648aad6e8d16196246b355452dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae6d8d2847058747ce23a648668ce4dba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae6d8d2847058747ce23a648668ce4dba">TIM_CCMR2_OC3FE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gae6d8d2847058747ce23a648668ce4dba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga276fd2250d2b085b73ef51cb4c099d24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga276fd2250d2b085b73ef51cb4c099d24">TIM_CCMR2_OC3PE</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga276fd2250d2b085b73ef51cb4c099d24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga52095cae524adb237339bfee92e8168a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga52095cae524adb237339bfee92e8168a">TIM_CCMR2_OC3M</a>   ((uint16_t)0x0070)</td></tr>
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<tr class="separator:ga52095cae524adb237339bfee92e8168a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga899b26ffa9c5f30f143306b8598a537f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga899b26ffa9c5f30f143306b8598a537f">TIM_CCMR2_OC3M_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga899b26ffa9c5f30f143306b8598a537f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91476ae2cc3449facafcad82569e14f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91476ae2cc3449facafcad82569e14f8">TIM_CCMR2_OC3M_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga91476ae2cc3449facafcad82569e14f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20394da7afcada6c3fc455b05004cff5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga20394da7afcada6c3fc455b05004cff5">TIM_CCMR2_OC3M_2</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga20394da7afcada6c3fc455b05004cff5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4209d414df704ce96c54abb2ea2df66a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4209d414df704ce96c54abb2ea2df66a">TIM_CCMR2_OC3CE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga4209d414df704ce96c54abb2ea2df66a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga294e216b50edd1c2f891143e1f971048"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga294e216b50edd1c2f891143e1f971048">TIM_CCMR2_CC4S</a>   ((uint16_t)0x0300)</td></tr>
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<tr class="separator:ga294e216b50edd1c2f891143e1f971048"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabebaa6bffd90b32563bd0fc1ff4a9499"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabebaa6bffd90b32563bd0fc1ff4a9499">TIM_CCMR2_CC4S_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:gabebaa6bffd90b32563bd0fc1ff4a9499"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6386ec77a3a451954325a1512d44f893"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6386ec77a3a451954325a1512d44f893">TIM_CCMR2_CC4S_1</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga6386ec77a3a451954325a1512d44f893"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70dc197250c2699d470aea1a7a42ad57"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga70dc197250c2699d470aea1a7a42ad57">TIM_CCMR2_OC4FE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga70dc197250c2699d470aea1a7a42ad57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e951cd3f6593e321cf79b662a1deaaa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3e951cd3f6593e321cf79b662a1deaaa">TIM_CCMR2_OC4PE</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga3e951cd3f6593e321cf79b662a1deaaa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacbed61ff3ba57c7fe6d3386ce3b7af2b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacbed61ff3ba57c7fe6d3386ce3b7af2b">TIM_CCMR2_OC4M</a>   ((uint16_t)0x7000)</td></tr>
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<tr class="separator:gacbed61ff3ba57c7fe6d3386ce3b7af2b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad866f52cce9ce32e3c0d181007b82de5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad866f52cce9ce32e3c0d181007b82de5">TIM_CCMR2_OC4M_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gad866f52cce9ce32e3c0d181007b82de5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafd97b1c86dd4953f3382fea317d165af"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafd97b1c86dd4953f3382fea317d165af">TIM_CCMR2_OC4M_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gafd97b1c86dd4953f3382fea317d165af"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga431e5cdc0f3dc02fa5a54aa5193ddbab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga431e5cdc0f3dc02fa5a54aa5193ddbab">TIM_CCMR2_OC4M_2</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga431e5cdc0f3dc02fa5a54aa5193ddbab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1447dfe94bdd234382bb1f43307ea5c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1447dfe94bdd234382bb1f43307ea5c3">TIM_CCMR2_OC4CE</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga1447dfe94bdd234382bb1f43307ea5c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc3d11f2e968752bc9ec7131c986c3a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafc3d11f2e968752bc9ec7131c986c3a6">TIM_CCMR2_IC3PSC</a>   ((uint16_t)0x000C)</td></tr>
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<tr class="separator:gafc3d11f2e968752bc9ec7131c986c3a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga588513395cbf8be6f4749c140fbf811c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga588513395cbf8be6f4749c140fbf811c">TIM_CCMR2_IC3PSC_0</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga588513395cbf8be6f4749c140fbf811c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd27b9bdcc161c90dc1712074a66f29d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gacd27b9bdcc161c90dc1712074a66f29d">TIM_CCMR2_IC3PSC_1</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gacd27b9bdcc161c90dc1712074a66f29d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad218af6bd1de72891e1b85d582b766cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad218af6bd1de72891e1b85d582b766cd">TIM_CCMR2_IC3F</a>   ((uint16_t)0x00F0)</td></tr>
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<tr class="separator:gad218af6bd1de72891e1b85d582b766cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga31d5450ebc9ac6ea833a2b341ceea061"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31d5450ebc9ac6ea833a2b341ceea061">TIM_CCMR2_IC3F_0</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga31d5450ebc9ac6ea833a2b341ceea061"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26f92a3f831685d6df7ab69e68181849"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga26f92a3f831685d6df7ab69e68181849">TIM_CCMR2_IC3F_1</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga26f92a3f831685d6df7ab69e68181849"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5e7d7a3c2686a6e31adc1adf2ce65df9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5e7d7a3c2686a6e31adc1adf2ce65df9">TIM_CCMR2_IC3F_2</a>   ((uint16_t)0x0040)</td></tr>
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||
<tr class="separator:ga5e7d7a3c2686a6e31adc1adf2ce65df9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9696c3da027f2b292d077f1ab4cdd14b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9696c3da027f2b292d077f1ab4cdd14b">TIM_CCMR2_IC3F_3</a>   ((uint16_t)0x0080)</td></tr>
|
||
<tr class="separator:ga9696c3da027f2b292d077f1ab4cdd14b"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga6fd7591e2de10272f7fafb08cdd1b7b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6fd7591e2de10272f7fafb08cdd1b7b0">TIM_CCMR2_IC4PSC</a>   ((uint16_t)0x0C00)</td></tr>
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||
<tr class="separator:ga6fd7591e2de10272f7fafb08cdd1b7b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga80f7d206409bc551eab06819e17451e4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga80f7d206409bc551eab06819e17451e4">TIM_CCMR2_IC4PSC_0</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga80f7d206409bc551eab06819e17451e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf6690f5e98e02addd5e75643767c6d66"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf6690f5e98e02addd5e75643767c6d66">TIM_CCMR2_IC4PSC_1</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gaf6690f5e98e02addd5e75643767c6d66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad51653fd06a591294d432385e794a19e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad51653fd06a591294d432385e794a19e">TIM_CCMR2_IC4F</a>   ((uint16_t)0xF000)</td></tr>
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<tr class="separator:gad51653fd06a591294d432385e794a19e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7d5fc8b9a6ea27582cb6c25f9654888c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7d5fc8b9a6ea27582cb6c25f9654888c">TIM_CCMR2_IC4F_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga7d5fc8b9a6ea27582cb6c25f9654888c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4dcc1562c0c017493e4ee6b32354e85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac4dcc1562c0c017493e4ee6b32354e85">TIM_CCMR2_IC4F_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:gac4dcc1562c0c017493e4ee6b32354e85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b96de7db8b71ac7e414f247b871a53c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b96de7db8b71ac7e414f247b871a53c">TIM_CCMR2_IC4F_2</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="separator:ga2b96de7db8b71ac7e414f247b871a53c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25d0f55e5b751f2caed6a943f5682a09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga25d0f55e5b751f2caed6a943f5682a09">TIM_CCMR2_IC4F_3</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga25d0f55e5b751f2caed6a943f5682a09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f494b9881e7b97bb2d79f7ad4e79937"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f494b9881e7b97bb2d79f7ad4e79937">TIM_CCER_CC1E</a>   ((uint16_t)0x0001)</td></tr>
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||
<tr class="separator:ga3f494b9881e7b97bb2d79f7ad4e79937"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ca0aedba14241caff739afb3c3ee291"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0ca0aedba14241caff739afb3c3ee291">TIM_CCER_CC1P</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga0ca0aedba14241caff739afb3c3ee291"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga813056b3f90a13c4432aeba55f28957e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga813056b3f90a13c4432aeba55f28957e">TIM_CCER_CC1NE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga813056b3f90a13c4432aeba55f28957e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga403fc501d4d8de6cabee6b07acb81a36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga403fc501d4d8de6cabee6b07acb81a36">TIM_CCER_CC1NP</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga403fc501d4d8de6cabee6b07acb81a36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76392a4d63674cd0db0a55762458f16c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76392a4d63674cd0db0a55762458f16c">TIM_CCER_CC2E</a>   ((uint16_t)0x0010)</td></tr>
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||
<tr class="separator:ga76392a4d63674cd0db0a55762458f16c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3136c6e776c6066509d298b6a9b34912"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3136c6e776c6066509d298b6a9b34912">TIM_CCER_CC2P</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga3136c6e776c6066509d298b6a9b34912"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6a784649120eddec31998f34323d4156"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6a784649120eddec31998f34323d4156">TIM_CCER_CC2NE</a>   ((uint16_t)0x0040)</td></tr>
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||
<tr class="separator:ga6a784649120eddec31998f34323d4156"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga387de559d8b16b16f3934fddd2aa969f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga387de559d8b16b16f3934fddd2aa969f">TIM_CCER_CC2NP</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga387de559d8b16b16f3934fddd2aa969f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1da114e666b61f09cf25f50cdaa7f81f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1da114e666b61f09cf25f50cdaa7f81f">TIM_CCER_CC3E</a>   ((uint16_t)0x0100)</td></tr>
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||
<tr class="separator:ga1da114e666b61f09cf25f50cdaa7f81f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6220a5cd34c7a7a39e10c854aa00d2e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga6220a5cd34c7a7a39e10c854aa00d2e5">TIM_CCER_CC3P</a>   ((uint16_t)0x0200)</td></tr>
|
||
<tr class="separator:ga6220a5cd34c7a7a39e10c854aa00d2e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad46cce61d3bd83b64257ba75e54ee1aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad46cce61d3bd83b64257ba75e54ee1aa">TIM_CCER_CC3NE</a>   ((uint16_t)0x0400)</td></tr>
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||
<tr class="separator:gad46cce61d3bd83b64257ba75e54ee1aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4029686d3307111d3f9f4400e29e4521"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4029686d3307111d3f9f4400e29e4521">TIM_CCER_CC3NP</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga4029686d3307111d3f9f4400e29e4521"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga940b041ab5975311f42f26d314a4b621"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga940b041ab5975311f42f26d314a4b621">TIM_CCER_CC4E</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga940b041ab5975311f42f26d314a4b621"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3faf23dc47e1b0877352d7f5a00f72e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3faf23dc47e1b0877352d7f5a00f72e1">TIM_CCER_CC4P</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga3faf23dc47e1b0877352d7f5a00f72e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41b88bff3f38cec0617ce66fa5aef260"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga41b88bff3f38cec0617ce66fa5aef260">TIM_CCER_CC4NP</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:ga41b88bff3f38cec0617ce66fa5aef260"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8bc45c0315de82c1c3a38a243bcd00fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8bc45c0315de82c1c3a38a243bcd00fc">TIM_CNT_CNT</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga8bc45c0315de82c1c3a38a243bcd00fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaefb85e4000ddab0ada67c5964810da35"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaefb85e4000ddab0ada67c5964810da35">TIM_PSC_PSC</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gaefb85e4000ddab0ada67c5964810da35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gace50256fdecc38f641050a4a3266e4d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gace50256fdecc38f641050a4a3266e4d9">TIM_ARR_ARR</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gace50256fdecc38f641050a4a3266e4d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadcef8f28580e36cdfda3be1f7561afc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadcef8f28580e36cdfda3be1f7561afc7">TIM_RCR_REP</a>   ((uint8_t)0xFF)</td></tr>
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<tr class="separator:gadcef8f28580e36cdfda3be1f7561afc7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac927cc11eff415210dcf94657d8dfbe0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac927cc11eff415210dcf94657d8dfbe0">TIM_CCR1_CCR1</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:gac927cc11eff415210dcf94657d8dfbe0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga751e5efd90bdd1fd5f38609f3f5762ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga751e5efd90bdd1fd5f38609f3f5762ba">TIM_CCR2_CCR2</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga751e5efd90bdd1fd5f38609f3f5762ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4e85064d37d387851e95c5c1f35315a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4e85064d37d387851e95c5c1f35315a1">TIM_CCR3_CCR3</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga4e85064d37d387851e95c5c1f35315a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15c9dd67a6701b5498926ae536773eca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga15c9dd67a6701b5498926ae536773eca">TIM_CCR4_CCR4</a>   ((uint16_t)0xFFFF)</td></tr>
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<tr class="separator:ga15c9dd67a6701b5498926ae536773eca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabcf985e9c78f15e1e44b2bc4d2bafc67"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabcf985e9c78f15e1e44b2bc4d2bafc67">TIM_BDTR_DTG</a>   ((uint16_t)0x00FF)</td></tr>
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<tr class="separator:gabcf985e9c78f15e1e44b2bc4d2bafc67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4b575cca31b0e22ef1d5b842aa162bfc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4b575cca31b0e22ef1d5b842aa162bfc">TIM_BDTR_DTG_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga4b575cca31b0e22ef1d5b842aa162bfc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f33ae1e9b7847a60032a60d0cc7f81d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga0f33ae1e9b7847a60032a60d0cc7f81d">TIM_BDTR_DTG_1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga0f33ae1e9b7847a60032a60d0cc7f81d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f06a132eba960bd6cc972e3580d537c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2f06a132eba960bd6cc972e3580d537c">TIM_BDTR_DTG_2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga2f06a132eba960bd6cc972e3580d537c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7868643a65285fc7132f040c8950f43"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae7868643a65285fc7132f040c8950f43">TIM_BDTR_DTG_3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gae7868643a65285fc7132f040c8950f43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga503b44e30a5fb77c34630d1faca70213"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga503b44e30a5fb77c34630d1faca70213">TIM_BDTR_DTG_4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga503b44e30a5fb77c34630d1faca70213"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga83a12ecb0a8dd21bc164d9a345ea564f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga83a12ecb0a8dd21bc164d9a345ea564f">TIM_BDTR_DTG_5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga83a12ecb0a8dd21bc164d9a345ea564f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf7d418cbd0db89991522cb6be34a017e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf7d418cbd0db89991522cb6be34a017e">TIM_BDTR_DTG_6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaf7d418cbd0db89991522cb6be34a017e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac945c8bcf5567912a88eb2acee53c45b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac945c8bcf5567912a88eb2acee53c45b">TIM_BDTR_DTG_7</a>   ((uint16_t)0x0080)</td></tr>
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||
<tr class="separator:gac945c8bcf5567912a88eb2acee53c45b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7e4215d17f0548dfcf0b15fe4d0f4651"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7e4215d17f0548dfcf0b15fe4d0f4651">TIM_BDTR_LOCK</a>   ((uint16_t)0x0300)</td></tr>
|
||
<tr class="separator:ga7e4215d17f0548dfcf0b15fe4d0f4651"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabbd1736c8172e7cd098bb591264b07bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabbd1736c8172e7cd098bb591264b07bf">TIM_BDTR_LOCK_0</a>   ((uint16_t)0x0100)</td></tr>
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||
<tr class="separator:gabbd1736c8172e7cd098bb591264b07bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga756df80ff8c34399435f52dca18e6eee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga756df80ff8c34399435f52dca18e6eee">TIM_BDTR_LOCK_1</a>   ((uint16_t)0x0200)</td></tr>
|
||
<tr class="separator:ga756df80ff8c34399435f52dca18e6eee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1cf04e70ccf3d4aba5afcf2496a411a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab1cf04e70ccf3d4aba5afcf2496a411a">TIM_BDTR_OSSI</a>   ((uint16_t)0x0400)</td></tr>
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||
<tr class="separator:gab1cf04e70ccf3d4aba5afcf2496a411a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf9435f36d53c6be1107e57ab6a82c16e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf9435f36d53c6be1107e57ab6a82c16e">TIM_BDTR_OSSR</a>   ((uint16_t)0x0800)</td></tr>
|
||
<tr class="separator:gaf9435f36d53c6be1107e57ab6a82c16e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74250b040dd9fd9c09dcc54cdd6d86d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga74250b040dd9fd9c09dcc54cdd6d86d8">TIM_BDTR_BKE</a>   ((uint16_t)0x1000)</td></tr>
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||
<tr class="separator:ga74250b040dd9fd9c09dcc54cdd6d86d8"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga3247abbbf0d00260be051d176d88020e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3247abbbf0d00260be051d176d88020e">TIM_BDTR_BKP</a>   ((uint16_t)0x2000)</td></tr>
|
||
<tr class="separator:ga3247abbbf0d00260be051d176d88020e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59f15008050f91fa3ecc9eaaa971a509"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga59f15008050f91fa3ecc9eaaa971a509">TIM_BDTR_AOE</a>   ((uint16_t)0x4000)</td></tr>
|
||
<tr class="separator:ga59f15008050f91fa3ecc9eaaa971a509"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga277a096614829feba2d0a4fbb7d3dffc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga277a096614829feba2d0a4fbb7d3dffc">TIM_BDTR_MOE</a>   ((uint16_t)0x8000)</td></tr>
|
||
<tr class="separator:ga277a096614829feba2d0a4fbb7d3dffc"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gabf9051ecac123cd89f9d2a835e4cde2e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabf9051ecac123cd89f9d2a835e4cde2e">TIM_DCR_DBA</a>   ((uint16_t)0x001F)</td></tr>
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||
<tr class="separator:gabf9051ecac123cd89f9d2a835e4cde2e"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaaaf610e5fe4bb4b10736242df3b62bba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaaf610e5fe4bb4b10736242df3b62bba">TIM_DCR_DBA_0</a>   ((uint16_t)0x0001)</td></tr>
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||
<tr class="separator:gaaaf610e5fe4bb4b10736242df3b62bba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a0185643c163930e30f0a1cf5fe364e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a0185643c163930e30f0a1cf5fe364e">TIM_DCR_DBA_1</a>   ((uint16_t)0x0002)</td></tr>
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||
<tr class="separator:ga9a0185643c163930e30f0a1cf5fe364e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa5a89b93b97b0968a7d5563a18ab9d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaa5a89b93b97b0968a7d5563a18ab9d1">TIM_DCR_DBA_2</a>   ((uint16_t)0x0004)</td></tr>
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||
<tr class="separator:gaaa5a89b93b97b0968a7d5563a18ab9d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga105f44ff18cbbd4ff4d60368c9184430"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga105f44ff18cbbd4ff4d60368c9184430">TIM_DCR_DBA_3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga105f44ff18cbbd4ff4d60368c9184430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabe1bc4b6dd7265dee2857f23d835b2dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabe1bc4b6dd7265dee2857f23d835b2dc">TIM_DCR_DBA_4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gabe1bc4b6dd7265dee2857f23d835b2dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab9e197a78484567d4c6093c28265f3eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab9e197a78484567d4c6093c28265f3eb">TIM_DCR_DBL</a>   ((uint16_t)0x1F00)</td></tr>
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<tr class="separator:gab9e197a78484567d4c6093c28265f3eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga677195c0b4892bb6717564c0528126a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga677195c0b4892bb6717564c0528126a9">TIM_DCR_DBL_0</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga677195c0b4892bb6717564c0528126a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad427ba987877e491f7a2be60e320dbea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad427ba987877e491f7a2be60e320dbea">TIM_DCR_DBL_1</a>   ((uint16_t)0x0200)</td></tr>
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||
<tr class="separator:gad427ba987877e491f7a2be60e320dbea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga369926f2a8ca5cf635ded9bb4619189c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga369926f2a8ca5cf635ded9bb4619189c">TIM_DCR_DBL_2</a>   ((uint16_t)0x0400)</td></tr>
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||
<tr class="separator:ga369926f2a8ca5cf635ded9bb4619189c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f1ec849c41d1abd46c528a4ac378c03"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f1ec849c41d1abd46c528a4ac378c03">TIM_DCR_DBL_3</a>   ((uint16_t)0x0800)</td></tr>
|
||
<tr class="separator:ga7f1ec849c41d1abd46c528a4ac378c03"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga607d7b87b1b4bf167aabad36f922a8f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga607d7b87b1b4bf167aabad36f922a8f9">TIM_DCR_DBL_4</a>   ((uint16_t)0x1000)</td></tr>
|
||
<tr class="separator:ga607d7b87b1b4bf167aabad36f922a8f9"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1afa2fc02bcd75c15122c4eb87d6cf83"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1afa2fc02bcd75c15122c4eb87d6cf83">TIM_DMAR_DMAB</a>   ((uint16_t)0xFFFF)</td></tr>
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||
<tr class="separator:ga1afa2fc02bcd75c15122c4eb87d6cf83"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga2916847c3545c06578d7ba8c381a4c20"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2916847c3545c06578d7ba8c381a4c20">TIM_OR_TI4_RMP</a>   ((uint16_t)0x00C0)</td></tr>
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||
<tr class="separator:ga2916847c3545c06578d7ba8c381a4c20"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9aea4f8a0abedbf08bb1e686933c1120"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9aea4f8a0abedbf08bb1e686933c1120">TIM_OR_TI4_RMP_0</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="memitem:gaa2a46aa18f15f2074b93233a18e85629"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa2a46aa18f15f2074b93233a18e85629">TIM_OR_TI4_RMP_1</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:gaa2a46aa18f15f2074b93233a18e85629"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4f413eac7f503dfddc9a9914efa555ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4f413eac7f503dfddc9a9914efa555ac">TIM_OR_ITR1_RMP</a>   ((uint16_t)0x0C00)</td></tr>
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<tr class="separator:ga4f413eac7f503dfddc9a9914efa555ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7141f22c81a83134d9bb35cdeca5549"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad7141f22c81a83134d9bb35cdeca5549">TIM_OR_ITR1_RMP_0</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="memitem:ga7ba54d02d962d04d2bdf16df11c7ccd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ba54d02d962d04d2bdf16df11c7ccd0">TIM_OR_ITR1_RMP_1</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga7ba54d02d962d04d2bdf16df11c7ccd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac88be3484245af8c1b271ae5c1b97a14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac88be3484245af8c1b271ae5c1b97a14">USART_SR_PE</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gac88be3484245af8c1b271ae5c1b97a14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9eb6fd3f820bd12e0b5a981de1894804"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9eb6fd3f820bd12e0b5a981de1894804">USART_SR_FE</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga9eb6fd3f820bd12e0b5a981de1894804"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8938468c5666a8305ade6d80d467c572"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8938468c5666a8305ade6d80d467c572">USART_SR_NE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga8938468c5666a8305ade6d80d467c572"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4560fc7a60df4bdf402fc7219ae7b558"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4560fc7a60df4bdf402fc7219ae7b558">USART_SR_ORE</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga4560fc7a60df4bdf402fc7219ae7b558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga336fa8c9965ce18c10972ac80ded611f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga336fa8c9965ce18c10972ac80ded611f">USART_SR_IDLE</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga336fa8c9965ce18c10972ac80ded611f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0c99e2bb265b3d58a91aca7a93f7836"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0c99e2bb265b3d58a91aca7a93f7836">USART_SR_RXNE</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:gaa0c99e2bb265b3d58a91aca7a93f7836"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76229b05ac37a5a688e6ba45851a29f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga76229b05ac37a5a688e6ba45851a29f1">USART_SR_TC</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga76229b05ac37a5a688e6ba45851a29f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga65e9cddf0890113d405342f1d8b5b980"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga65e9cddf0890113d405342f1d8b5b980">USART_SR_TXE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga65e9cddf0890113d405342f1d8b5b980"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b868b59576f42421226d35628c6b628"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5b868b59576f42421226d35628c6b628">USART_SR_LBD</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga5b868b59576f42421226d35628c6b628"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9250ae2793db0541e6c4bb8837424541"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9250ae2793db0541e6c4bb8837424541">USART_SR_CTS</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga9250ae2793db0541e6c4bb8837424541"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad84ad1e1d0202b41021e2d6e40486bff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad84ad1e1d0202b41021e2d6e40486bff">USART_DR_DR</a>   ((uint16_t)0x01FF)</td></tr>
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<tr class="separator:gad84ad1e1d0202b41021e2d6e40486bff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9dfae31be4ec2c8a3b0905eff30c7046"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9dfae31be4ec2c8a3b0905eff30c7046">USART_BRR_DIV_Fraction</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:ga9dfae31be4ec2c8a3b0905eff30c7046"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60cfa3802798306b86231f828ed2e71e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60cfa3802798306b86231f828ed2e71e">USART_BRR_DIV_Mantissa</a>   ((uint16_t)0xFFF0)</td></tr>
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<tr class="separator:ga60cfa3802798306b86231f828ed2e71e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac457c519baa28359ab7959fbe0c5cda1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac457c519baa28359ab7959fbe0c5cda1">USART_CR1_SBK</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gac457c519baa28359ab7959fbe0c5cda1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa7d61ab5a4e2beaa3f591c56bd15a27b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa7d61ab5a4e2beaa3f591c56bd15a27b">USART_CR1_RWU</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:gaa7d61ab5a4e2beaa3f591c56bd15a27b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada0d5d407a22264de847bc1b40a17aeb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gada0d5d407a22264de847bc1b40a17aeb">USART_CR1_RE</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:gada0d5d407a22264de847bc1b40a17aeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade7f090b04fd78b755b43357ecaa9622"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gade7f090b04fd78b755b43357ecaa9622">USART_CR1_TE</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gade7f090b04fd78b755b43357ecaa9622"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5221d09eebd12445a20f221bf98066f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5221d09eebd12445a20f221bf98066f8">USART_CR1_IDLEIE</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:ga5221d09eebd12445a20f221bf98066f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga91118f867adfdb2e805beea86666de04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga91118f867adfdb2e805beea86666de04">USART_CR1_RXNEIE</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga91118f867adfdb2e805beea86666de04"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa17130690a1ca95b972429eb64d4254e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa17130690a1ca95b972429eb64d4254e">USART_CR1_TCIE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaa17130690a1ca95b972429eb64d4254e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70422871d15f974b464365e7fe1877e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga70422871d15f974b464365e7fe1877e9">USART_CR1_TXEIE</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga70422871d15f974b464365e7fe1877e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27405d413b6d355ccdb076d52fef6875"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga27405d413b6d355ccdb076d52fef6875">USART_CR1_PEIE</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga27405d413b6d355ccdb076d52fef6875"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2e159d36ab2c93a2c1942df60e9eebbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2e159d36ab2c93a2c1942df60e9eebbe">USART_CR1_PS</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga2e159d36ab2c93a2c1942df60e9eebbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60f8fcf084f9a8514efafb617c70b074"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga60f8fcf084f9a8514efafb617c70b074">USART_CR1_PCE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga60f8fcf084f9a8514efafb617c70b074"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad831dfc169fcf14b7284984dbecf322d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad831dfc169fcf14b7284984dbecf322d">USART_CR1_WAKE</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:gad831dfc169fcf14b7284984dbecf322d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga95f0288b9c6aaeca7cb6550a2e6833e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga95f0288b9c6aaeca7cb6550a2e6833e2">USART_CR1_M</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:ga95f0288b9c6aaeca7cb6550a2e6833e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2bb650676aaae4a5203f372d497d5947"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2bb650676aaae4a5203f372d497d5947">USART_CR1_UE</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga2bb650676aaae4a5203f372d497d5947"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaed6caeb0cb48f1a7b34090f31a92a8e2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaed6caeb0cb48f1a7b34090f31a92a8e2">USART_CR1_OVER8</a>   ((uint16_t)0x8000)</td></tr>
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<tr class="separator:gaed6caeb0cb48f1a7b34090f31a92a8e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3ee77fac25142271ad56d49685e518b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3ee77fac25142271ad56d49685e518b3">USART_CR2_ADD</a>   ((uint16_t)0x000F)</td></tr>
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<tr class="separator:ga3ee77fac25142271ad56d49685e518b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7f9bc41700717fd93548e0e95b6072ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7f9bc41700717fd93548e0e95b6072ed">USART_CR2_LBDL</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga7f9bc41700717fd93548e0e95b6072ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa02ef5d22553f028ea48e5d9f08192b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa02ef5d22553f028ea48e5d9f08192b4">USART_CR2_LBDIE</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaa02ef5d22553f028ea48e5d9f08192b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4a62e93ae7864e89622bdd92508b615e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4a62e93ae7864e89622bdd92508b615e">USART_CR2_LBCL</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga4a62e93ae7864e89622bdd92508b615e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga362976ce813e58310399d113d2cf09cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga362976ce813e58310399d113d2cf09cb">USART_CR2_CPHA</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:ga362976ce813e58310399d113d2cf09cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafbb4336ac93d94d4e78f9fb7b3a0dc68"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gafbb4336ac93d94d4e78f9fb7b3a0dc68">USART_CR2_CPOL</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:gafbb4336ac93d94d4e78f9fb7b3a0dc68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga42a396cde02ffa0c4d3fd9817b6af853"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga42a396cde02ffa0c4d3fd9817b6af853">USART_CR2_CLKEN</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga42a396cde02ffa0c4d3fd9817b6af853"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf993e483318ebcecffd18649de766dc6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf993e483318ebcecffd18649de766dc6">USART_CR2_STOP</a>   ((uint16_t)0x3000)</td></tr>
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<tr class="separator:gaf993e483318ebcecffd18649de766dc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee6ee01c6e5325b378b2209ef20d0a61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaee6ee01c6e5325b378b2209ef20d0a61">USART_CR2_STOP_0</a>   ((uint16_t)0x1000)</td></tr>
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<tr class="separator:gaee6ee01c6e5325b378b2209ef20d0a61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b24d14f0e5d1c76c878b08aad44d02b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2b24d14f0e5d1c76c878b08aad44d02b">USART_CR2_STOP_1</a>   ((uint16_t)0x2000)</td></tr>
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<tr class="separator:ga2b24d14f0e5d1c76c878b08aad44d02b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8931efa62c29d92f5c0ec5a05f907ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac8931efa62c29d92f5c0ec5a05f907ef">USART_CR2_LINEN</a>   ((uint16_t)0x4000)</td></tr>
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<tr class="memitem:gaaed1a39c551b1641128f81893ff558d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaaed1a39c551b1641128f81893ff558d0">USART_CR3_EIE</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="memitem:ga31c66373bfbae7724c836ac63b8411dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga31c66373bfbae7724c836ac63b8411dd">USART_CR3_IREN</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="memitem:ga22af8d399f1adda62e31186f0309af80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga22af8d399f1adda62e31186f0309af80">USART_CR3_IRLP</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="memitem:gac71129810fab0b46d91161a39e3f8d01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gac71129810fab0b46d91161a39e3f8d01">USART_CR3_HDSEL</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:gac71129810fab0b46d91161a39e3f8d01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f3b70b2ee9ff0b59e952fd7ab04373c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga3f3b70b2ee9ff0b59e952fd7ab04373c">USART_CR3_NACK</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="memitem:ga9180b9249a26988f71d4bb2b0c3eec27"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9180b9249a26988f71d4bb2b0c3eec27">USART_CR3_SCEN</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga9180b9249a26988f71d4bb2b0c3eec27"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaff130f15493c765353ec2fd605667c5a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaff130f15493c765353ec2fd605667c5a">USART_CR3_DMAR</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:gaff130f15493c765353ec2fd605667c5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5bb515d3814d448f84e2c98bf44f3993"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga5bb515d3814d448f84e2c98bf44f3993">USART_CR3_DMAT</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga5bb515d3814d448f84e2c98bf44f3993"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7c5d6fcd84a4728cda578a0339b4cac2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7c5d6fcd84a4728cda578a0339b4cac2">USART_CR3_RTSE</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga7c5d6fcd84a4728cda578a0339b4cac2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa125f026b1ca2d76eab48b191baed265"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa125f026b1ca2d76eab48b191baed265">USART_CR3_CTSE</a>   ((uint16_t)0x0200)</td></tr>
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<tr class="separator:gaa125f026b1ca2d76eab48b191baed265"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga636d5ec2e9556949fc68d13ad45a1e90"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga636d5ec2e9556949fc68d13ad45a1e90">USART_CR3_CTSIE</a>   ((uint16_t)0x0400)</td></tr>
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<tr class="separator:ga636d5ec2e9556949fc68d13ad45a1e90"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a96fb1a7beab602cbc8cb0393593826"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9a96fb1a7beab602cbc8cb0393593826">USART_CR3_ONEBIT</a>   ((uint16_t)0x0800)</td></tr>
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<tr class="separator:ga9a96fb1a7beab602cbc8cb0393593826"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0b423f0f4baf7d510ea70477e5c9203"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa0b423f0f4baf7d510ea70477e5c9203">USART_GTPR_PSC</a>   ((uint16_t)0x00FF)</td></tr>
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<tr class="separator:gaa0b423f0f4baf7d510ea70477e5c9203"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c49c90d83a0e3746b56b2a0a3b0ddcb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2c49c90d83a0e3746b56b2a0a3b0ddcb">USART_GTPR_PSC_0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:ga2c49c90d83a0e3746b56b2a0a3b0ddcb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8eab5000ab993991d0da8ffbd386c92b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8eab5000ab993991d0da8ffbd386c92b">USART_GTPR_PSC_1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga8eab5000ab993991d0da8ffbd386c92b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d74604b6e1ab08a45ea4fe6b3f6b5cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9d74604b6e1ab08a45ea4fe6b3f6b5cd">USART_GTPR_PSC_2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga9d74604b6e1ab08a45ea4fe6b3f6b5cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1b6b237fcac675f8f047c4ff64248486"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga1b6b237fcac675f8f047c4ff64248486">USART_GTPR_PSC_3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga1b6b237fcac675f8f047c4ff64248486"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad1c0e92df8edb974008b3d37d12f655a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad1c0e92df8edb974008b3d37d12f655a">USART_GTPR_PSC_4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gad1c0e92df8edb974008b3d37d12f655a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12dda4877432bc181c9684b0830b1b7b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga12dda4877432bc181c9684b0830b1b7b">USART_GTPR_PSC_5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga12dda4877432bc181c9684b0830b1b7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga045e834b03e7a06b2005a13923af424a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga045e834b03e7a06b2005a13923af424a">USART_GTPR_PSC_6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga045e834b03e7a06b2005a13923af424a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3da67d3c9c3abf436098a86477d2dfc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gad3da67d3c9c3abf436098a86477d2dfc">USART_GTPR_PSC_7</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:gad3da67d3c9c3abf436098a86477d2dfc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8e927fad0bfa430f54007e158e01f43b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8e927fad0bfa430f54007e158e01f43b">USART_GTPR_GT</a>   ((uint16_t)0xFF00)</td></tr>
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<tr class="separator:ga8e927fad0bfa430f54007e158e01f43b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga400774feb33ed7544d57d6a0a76e0f70"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga400774feb33ed7544d57d6a0a76e0f70">WWDG_CR_T</a>   ((uint8_t)0x7F)</td></tr>
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<tr class="separator:ga400774feb33ed7544d57d6a0a76e0f70"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d510237467b8e10ca1001574671ad8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4d510237467b8e10ca1001574671ad8e">WWDG_CR_T0</a>   ((uint8_t)0x01)</td></tr>
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<tr class="separator:ga4d510237467b8e10ca1001574671ad8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaed4b5d3f4d2e0540058fd2253a8feb95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaed4b5d3f4d2e0540058fd2253a8feb95">WWDG_CR_T1</a>   ((uint8_t)0x02)</td></tr>
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<tr class="separator:gaed4b5d3f4d2e0540058fd2253a8feb95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4e9559da387f10bac2dc8ab0d4f6e6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaa4e9559da387f10bac2dc8ab0d4f6e6c">WWDG_CR_T2</a>   ((uint8_t)0x04)</td></tr>
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<tr class="separator:gaa4e9559da387f10bac2dc8ab0d4f6e6c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1e344f4a12c60e57cb643511379b261"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab1e344f4a12c60e57cb643511379b261">WWDG_CR_T3</a>   ((uint8_t)0x08)</td></tr>
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<tr class="separator:gab1e344f4a12c60e57cb643511379b261"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf1f89d17eb4b3bb1b67c2b0185061e45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaf1f89d17eb4b3bb1b67c2b0185061e45">WWDG_CR_T4</a>   ((uint8_t)0x10)</td></tr>
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<tr class="separator:gaf1f89d17eb4b3bb1b67c2b0185061e45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc9870e0e3a5c171b9c1db817afcf0ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gadc9870e0e3a5c171b9c1db817afcf0ee">WWDG_CR_T5</a>   ((uint8_t)0x20)</td></tr>
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<tr class="separator:gadc9870e0e3a5c171b9c1db817afcf0ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3a493575c9a7c6006a3af9d13399268"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab3a493575c9a7c6006a3af9d13399268">WWDG_CR_T6</a>   ((uint8_t)0x40)</td></tr>
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<tr class="separator:gab3a493575c9a7c6006a3af9d13399268"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab647e9997b8b8e67de72af1aaea3f52f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gab647e9997b8b8e67de72af1aaea3f52f">WWDG_CR_WDGA</a>   ((uint8_t)0x80)</td></tr>
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<tr class="separator:gab647e9997b8b8e67de72af1aaea3f52f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabfbb9991bd6a3699399ca569c71fe8c9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gabfbb9991bd6a3699399ca569c71fe8c9">WWDG_CFR_W</a>   ((uint16_t)0x007F)</td></tr>
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<tr class="separator:gabfbb9991bd6a3699399ca569c71fe8c9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae37e08098d003f44eb8770a9d9bd40d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gae37e08098d003f44eb8770a9d9bd40d0">WWDG_CFR_W0</a>   ((uint16_t)0x0001)</td></tr>
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<tr class="separator:gae37e08098d003f44eb8770a9d9bd40d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga698b68239773862647ef5f9d963b80c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga698b68239773862647ef5f9d963b80c4">WWDG_CFR_W1</a>   ((uint16_t)0x0002)</td></tr>
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<tr class="separator:ga698b68239773862647ef5f9d963b80c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga166845425e89d01552bac0baeec686d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga166845425e89d01552bac0baeec686d9">WWDG_CFR_W2</a>   ((uint16_t)0x0004)</td></tr>
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<tr class="separator:ga166845425e89d01552bac0baeec686d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga344253edc9710aa6db6047b76cce723b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga344253edc9710aa6db6047b76cce723b">WWDG_CFR_W3</a>   ((uint16_t)0x0008)</td></tr>
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<tr class="separator:ga344253edc9710aa6db6047b76cce723b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaec3a0817a2dcde78414d02c0cb5d201d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#gaec3a0817a2dcde78414d02c0cb5d201d">WWDG_CFR_W4</a>   ((uint16_t)0x0010)</td></tr>
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<tr class="separator:gaec3a0817a2dcde78414d02c0cb5d201d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8032c21626b10fcf5cd8ad36bc051663"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga8032c21626b10fcf5cd8ad36bc051663">WWDG_CFR_W5</a>   ((uint16_t)0x0020)</td></tr>
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<tr class="separator:ga8032c21626b10fcf5cd8ad36bc051663"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga106cdb96da03ce192628f54cefcbec2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga106cdb96da03ce192628f54cefcbec2f">WWDG_CFR_W6</a>   ((uint16_t)0x0040)</td></tr>
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<tr class="separator:ga106cdb96da03ce192628f54cefcbec2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga067b1d8238f1d5613481aba71a946638"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga067b1d8238f1d5613481aba71a946638">WWDG_CFR_WDGTB</a>   ((uint16_t)0x0180)</td></tr>
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<tr class="separator:ga067b1d8238f1d5613481aba71a946638"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4858525604534e493b8a09e0b04ace61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga4858525604534e493b8a09e0b04ace61">WWDG_CFR_WDGTB0</a>   ((uint16_t)0x0080)</td></tr>
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<tr class="separator:ga4858525604534e493b8a09e0b04ace61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d53e6fa74c43522ebacd6dd6f450d33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga9d53e6fa74c43522ebacd6dd6f450d33">WWDG_CFR_WDGTB1</a>   ((uint16_t)0x0100)</td></tr>
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<tr class="separator:ga9d53e6fa74c43522ebacd6dd6f450d33"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga931941dc5d795502371ac5dd8fbac1e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga931941dc5d795502371ac5dd8fbac1e9">WWDG_CFR_EWI</a>   ((uint16_t)0x0200)</td></tr>
|
||
<tr class="separator:ga931941dc5d795502371ac5dd8fbac1e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga96cf9ddd91b6079c5aceef6f3e857b69"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga96cf9ddd91b6079c5aceef6f3e857b69">WWDG_SR_EWIF</a>   ((uint8_t)0x01)</td></tr>
|
||
<tr class="separator:ga96cf9ddd91b6079c5aceef6f3e857b69"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd961fcddc40341a817a9ec85b7c80ac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd961fcddc40341a817a9ec85b7c80ac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_IDCODE_DEV_ID</b>   ((uint32_t)0x00000FFF)</td></tr>
|
||
<tr class="separator:gafd961fcddc40341a817a9ec85b7c80ac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga887eb26364a8693355024ca203323165"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga887eb26364a8693355024ca203323165"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_IDCODE_REV_ID</b>   ((uint32_t)0xFFFF0000)</td></tr>
|
||
<tr class="separator:ga887eb26364a8693355024ca203323165"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga037c80fe1d7308cee68245715ef6cd9a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga037c80fe1d7308cee68245715ef6cd9a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_CR_DBG_SLEEP</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:ga037c80fe1d7308cee68245715ef6cd9a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf511f21a8de5b0b66c862915eee8bf75"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf511f21a8de5b0b66c862915eee8bf75"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_CR_DBG_STOP</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gaf511f21a8de5b0b66c862915eee8bf75"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga107a9396d63c892a8e614897c9d0b132"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga107a9396d63c892a8e614897c9d0b132"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_CR_DBG_STANDBY</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga107a9396d63c892a8e614897c9d0b132"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9034b6eb9d4dceadffc6a1d1959056c9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9034b6eb9d4dceadffc6a1d1959056c9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_CR_TRACE_IOEN</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:ga9034b6eb9d4dceadffc6a1d1959056c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa1395189e10bdbc37bce9ea480e22d10"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa1395189e10bdbc37bce9ea480e22d10"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_CR_TRACE_MODE</b>   ((uint32_t)0x000000C0)</td></tr>
|
||
<tr class="separator:gaa1395189e10bdbc37bce9ea480e22d10"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2d41a4027853783633d929a43f8d6d85"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga2d41a4027853783633d929a43f8d6d85">DBGMCU_CR_TRACE_MODE_0</a>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga2d41a4027853783633d929a43f8d6d85"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7ba3a830051b53d43d850768242c503e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group___peripheral___registers___bits___definition.html#ga7ba3a830051b53d43d850768242c503e">DBGMCU_CR_TRACE_MODE_1</a>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga7ba3a830051b53d43d850768242c503e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaae3c5b87084934a18748f5ec168f5aef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaae3c5b87084934a18748f5ec168f5aef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM2_STOP</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaae3c5b87084934a18748f5ec168f5aef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2fea6834f4ef9fc6b403cd079a001cec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2fea6834f4ef9fc6b403cd079a001cec"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM3_STOP</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:ga2fea6834f4ef9fc6b403cd079a001cec"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7ac65bf9342bb8acbcb25938e93abc45"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7ac65bf9342bb8acbcb25938e93abc45"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM4_STOP</b>   ((uint32_t)0x00000004)</td></tr>
|
||
<tr class="separator:ga7ac65bf9342bb8acbcb25938e93abc45"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga42d29d40515d36ce6ed7e5d34ed17dcf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga42d29d40515d36ce6ed7e5d34ed17dcf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM5_STOP</b>   ((uint32_t)0x00000008)</td></tr>
|
||
<tr class="separator:ga42d29d40515d36ce6ed7e5d34ed17dcf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadea6a1e90739bcf1d0723a0566c66de7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadea6a1e90739bcf1d0723a0566c66de7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM6_STOP</b>   ((uint32_t)0x00000010)</td></tr>
|
||
<tr class="separator:gadea6a1e90739bcf1d0723a0566c66de7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafdade78c3d28a668f9826d0b72e5844b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafdade78c3d28a668f9826d0b72e5844b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM7_STOP</b>   ((uint32_t)0x00000020)</td></tr>
|
||
<tr class="separator:gafdade78c3d28a668f9826d0b72e5844b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7ca0e04ad8c94e5b7fe29d8b9c20ebff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7ca0e04ad8c94e5b7fe29d8b9c20ebff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM12_STOP</b>   ((uint32_t)0x00000040)</td></tr>
|
||
<tr class="separator:ga7ca0e04ad8c94e5b7fe29d8b9c20ebff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68ef63b3c086ede54396596798553299"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68ef63b3c086ede54396596798553299"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM13_STOP</b>   ((uint32_t)0x00000080)</td></tr>
|
||
<tr class="separator:ga68ef63b3c086ede54396596798553299"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd3acb3e632c74e326da7016073c7871"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd3acb3e632c74e326da7016073c7871"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM14_STOP</b>   ((uint32_t)0x00000100)</td></tr>
|
||
<tr class="separator:gafd3acb3e632c74e326da7016073c7871"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e20246d389229ff46006b405bb56b1d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e20246d389229ff46006b405bb56b1d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_RTC_STOP</b>   ((uint32_t)0x00000400)</td></tr>
|
||
<tr class="separator:ga1e20246d389229ff46006b405bb56b1d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8a49d5e849185d09ee6c7594512ffe88"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a49d5e849185d09ee6c7594512ffe88"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_WWDG_STOP</b>   ((uint32_t)0x00000800)</td></tr>
|
||
<tr class="separator:ga8a49d5e849185d09ee6c7594512ffe88"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gada8989cb96dd5d6dbdaaf16e1f127c6a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gada8989cb96dd5d6dbdaaf16e1f127c6a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_IWDG_STOP</b>   ((uint32_t)0x00001000)</td></tr>
|
||
<tr class="separator:gada8989cb96dd5d6dbdaaf16e1f127c6a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae83fb5d62c6e6fa1c2fd06084528404e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae83fb5d62c6e6fa1c2fd06084528404e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT</b>   ((uint32_t)0x00200000)</td></tr>
|
||
<tr class="separator:gae83fb5d62c6e6fa1c2fd06084528404e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f6320aba695f6c3f97608e478533e96"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f6320aba695f6c3f97608e478533e96"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT</b>   ((uint32_t)0x00400000)</td></tr>
|
||
<tr class="separator:ga8f6320aba695f6c3f97608e478533e96"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f7e5c708387aa1ddae35b892811b4e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f7e5c708387aa1ddae35b892811b4e9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT</b>   ((uint32_t)0x00800000)</td></tr>
|
||
<tr class="separator:ga7f7e5c708387aa1ddae35b892811b4e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1b404dcea4857bccabbb03d6cce6be8c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1b404dcea4857bccabbb03d6cce6be8c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_CAN1_STOP</b>   ((uint32_t)0x02000000)</td></tr>
|
||
<tr class="separator:ga1b404dcea4857bccabbb03d6cce6be8c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaadc3889d6b84d143c98ecbfd873a9a1a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaadc3889d6b84d143c98ecbfd873a9a1a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_CAN2_STOP</b>   ((uint32_t)0x04000000)</td></tr>
|
||
<tr class="separator:gaadc3889d6b84d143c98ecbfd873a9a1a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe48f858edb831fbcb8769421df7d8e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabe48f858edb831fbcb8769421df7d8e9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_IWDEG_STOP</b>   DBGMCU_APB1_FZ_DBG_IWDG_STOP</td></tr>
|
||
<tr class="separator:gabe48f858edb831fbcb8769421df7d8e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6c8373d4015b8c829bb1fb0d4408901"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6c8373d4015b8c829bb1fb0d4408901"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM1_STOP</b>   ((uint32_t)0x00000001)</td></tr>
|
||
<tr class="separator:gaf6c8373d4015b8c829bb1fb0d4408901"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafc43d2269e5091f7c257c42f0326ef71"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafc43d2269e5091f7c257c42f0326ef71"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM8_STOP</b>   ((uint32_t)0x00000002)</td></tr>
|
||
<tr class="separator:gafc43d2269e5091f7c257c42f0326ef71"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadefdf86a77ca00a08696ad867886bdea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadefdf86a77ca00a08696ad867886bdea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM9_STOP</b>   ((uint32_t)0x00010000)</td></tr>
|
||
<tr class="separator:gadefdf86a77ca00a08696ad867886bdea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaab5804342d2ec492c99bcd1287bd09c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab5804342d2ec492c99bcd1287bd09c4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM10_STOP</b>   ((uint32_t)0x00020000)</td></tr>
|
||
<tr class="separator:gaab5804342d2ec492c99bcd1287bd09c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf450001985d6dd008bd5753580f06007"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf450001985d6dd008bd5753580f06007"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>DBGMCU_APB1_FZ_DBG_TIM11_STOP</b>   ((uint32_t)0x00040000)</td></tr>
|
||
<tr class="separator:gaf450001985d6dd008bd5753580f06007"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b90fbae827b1368b83cd9b0d9c64cc8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b90fbae827b1368b83cd9b0d9c64cc8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_WD</b>   ((uint32_t)0x00800000) /* Watchdog disable */</td></tr>
|
||
<tr class="separator:ga6b90fbae827b1368b83cd9b0d9c64cc8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1ef1243e257142caa99c086b07fa5d42"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1ef1243e257142caa99c086b07fa5d42"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_JD</b>   ((uint32_t)0x00400000) /* Jabber disable */</td></tr>
|
||
<tr class="separator:ga1ef1243e257142caa99c086b07fa5d42"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga989c71f66d1361519d2b0586f30b148f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga989c71f66d1361519d2b0586f30b148f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG</b>   ((uint32_t)0x000E0000) /* Inter-frame gap */</td></tr>
|
||
<tr class="separator:ga989c71f66d1361519d2b0586f30b148f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga004e9dab4a5e1ed4f165facca6fd80aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga004e9dab4a5e1ed4f165facca6fd80aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_96Bit</b>   ((uint32_t)0x00000000) /* Minimum IFG between frames during transmission is 96Bit */</td></tr>
|
||
<tr class="separator:ga004e9dab4a5e1ed4f165facca6fd80aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacf0f2ad0cd583f00dd2739cbb3dbdeea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacf0f2ad0cd583f00dd2739cbb3dbdeea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_88Bit</b>   ((uint32_t)0x00020000) /* Minimum IFG between frames during transmission is 88Bit */</td></tr>
|
||
<tr class="separator:gacf0f2ad0cd583f00dd2739cbb3dbdeea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56adc3166c71f29d2d30efc6ed3a4369"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56adc3166c71f29d2d30efc6ed3a4369"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_80Bit</b>   ((uint32_t)0x00040000) /* Minimum IFG between frames during transmission is 80Bit */</td></tr>
|
||
<tr class="separator:ga56adc3166c71f29d2d30efc6ed3a4369"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab2e77bc6fa5effe78706bfda4a51d1e2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab2e77bc6fa5effe78706bfda4a51d1e2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_72Bit</b>   ((uint32_t)0x00060000) /* Minimum IFG between frames during transmission is 72Bit */</td></tr>
|
||
<tr class="separator:gab2e77bc6fa5effe78706bfda4a51d1e2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga75c191358878ffd90ad6a6af336b935b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga75c191358878ffd90ad6a6af336b935b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_64Bit</b>   ((uint32_t)0x00080000) /* Minimum IFG between frames during transmission is 64Bit */</td></tr>
|
||
<tr class="separator:ga75c191358878ffd90ad6a6af336b935b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaebea1ff24623d7ba11f9eea98cd5466b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaebea1ff24623d7ba11f9eea98cd5466b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_56Bit</b>   ((uint32_t)0x000A0000) /* Minimum IFG between frames during transmission is 56Bit */</td></tr>
|
||
<tr class="separator:gaebea1ff24623d7ba11f9eea98cd5466b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8984fcb3cf6fb85c26878d9341324d77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8984fcb3cf6fb85c26878d9341324d77"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_48Bit</b>   ((uint32_t)0x000C0000) /* Minimum IFG between frames during transmission is 48Bit */</td></tr>
|
||
<tr class="separator:ga8984fcb3cf6fb85c26878d9341324d77"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1bc414a4c1360538a9ccbea64009d581"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1bc414a4c1360538a9ccbea64009d581"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IFG_40Bit</b>   ((uint32_t)0x000E0000) /* Minimum IFG between frames during transmission is 40Bit */</td></tr>
|
||
<tr class="separator:ga1bc414a4c1360538a9ccbea64009d581"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad298d344663cc1213716b5981c61682c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad298d344663cc1213716b5981c61682c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_CSD</b>   ((uint32_t)0x00010000) /* Carrier sense disable (during transmission) */</td></tr>
|
||
<tr class="separator:gad298d344663cc1213716b5981c61682c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafaa2d12a706f5c166e1ed620ec53177c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafaa2d12a706f5c166e1ed620ec53177c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_FES</b>   ((uint32_t)0x00004000) /* Fast ethernet speed */</td></tr>
|
||
<tr class="separator:gafaa2d12a706f5c166e1ed620ec53177c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga13f0065edda127d3f1fb6e88ca6f465b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga13f0065edda127d3f1fb6e88ca6f465b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_ROD</b>   ((uint32_t)0x00002000) /* Receive own disable */</td></tr>
|
||
<tr class="separator:ga13f0065edda127d3f1fb6e88ca6f465b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga38ad823b7d50c85fc620a9a93d250d54"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38ad823b7d50c85fc620a9a93d250d54"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_LM</b>   ((uint32_t)0x00001000) /* loopback mode */</td></tr>
|
||
<tr class="separator:ga38ad823b7d50c85fc620a9a93d250d54"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga83e463b0497de6801773acd7984722b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga83e463b0497de6801773acd7984722b2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_DM</b>   ((uint32_t)0x00000800) /* Duplex mode */</td></tr>
|
||
<tr class="separator:ga83e463b0497de6801773acd7984722b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadbd6f6975a04c0ded0e1a9e98035e802"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadbd6f6975a04c0ded0e1a9e98035e802"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_IPCO</b>   ((uint32_t)0x00000400) /* IP Checksum offload */</td></tr>
|
||
<tr class="separator:gadbd6f6975a04c0ded0e1a9e98035e802"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad2771077782e2dcac94367e54353696e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad2771077782e2dcac94367e54353696e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_RD</b>   ((uint32_t)0x00000200) /* Retry disable */</td></tr>
|
||
<tr class="separator:gad2771077782e2dcac94367e54353696e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b5d2fe7260609d8186a7005f925dc28"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0b5d2fe7260609d8186a7005f925dc28"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_APCS</b>   ((uint32_t)0x00000080) /* Automatic Pad/CRC stripping */</td></tr>
|
||
<tr class="separator:ga0b5d2fe7260609d8186a7005f925dc28"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa0fab432a0d01c8c1786b3d48489c0f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_BL</b></td></tr>
|
||
<tr class="separator:gaa0fab432a0d01c8c1786b3d48489c0f9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bc0bcf13d6a51de76a67299ba40561f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9bc0bcf13d6a51de76a67299ba40561f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_BL_10</b>   ((uint32_t)0x00000000) /* k = min (n, 10) */</td></tr>
|
||
<tr class="separator:ga9bc0bcf13d6a51de76a67299ba40561f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga135a78ac267e35d598ed17aa776a1505"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga135a78ac267e35d598ed17aa776a1505"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_BL_8</b>   ((uint32_t)0x00000020) /* k = min (n, 8) */</td></tr>
|
||
<tr class="separator:ga135a78ac267e35d598ed17aa776a1505"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6d5f35dc63a68792a4abfaf9d11a2feb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d5f35dc63a68792a4abfaf9d11a2feb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_BL_4</b>   ((uint32_t)0x00000040) /* k = min (n, 4) */</td></tr>
|
||
<tr class="separator:ga6d5f35dc63a68792a4abfaf9d11a2feb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacf4db303c5f5822875770938f7cfb7c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacf4db303c5f5822875770938f7cfb7c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_BL_1</b>   ((uint32_t)0x00000060) /* k = min (n, 1) */</td></tr>
|
||
<tr class="separator:gacf4db303c5f5822875770938f7cfb7c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga90347f47e9623d4714e0631b1afbccc9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90347f47e9623d4714e0631b1afbccc9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_DC</b>   ((uint32_t)0x00000010) /* Defferal check */</td></tr>
|
||
<tr class="separator:ga90347f47e9623d4714e0631b1afbccc9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga87c3818396ef51cad8be1f4c68fff164"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga87c3818396ef51cad8be1f4c68fff164"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_TE</b>   ((uint32_t)0x00000008) /* Transmitter enable */</td></tr>
|
||
<tr class="separator:ga87c3818396ef51cad8be1f4c68fff164"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga77984e7a5202bdc300bccc9cc90fad3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga77984e7a5202bdc300bccc9cc90fad3e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACCR_RE</b>   ((uint32_t)0x00000004) /* Receiver enable */</td></tr>
|
||
<tr class="separator:ga77984e7a5202bdc300bccc9cc90fad3e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7970ce2fd938029f0a58cf668a82a0fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7970ce2fd938029f0a58cf668a82a0fb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_RA</b>   ((uint32_t)0x80000000) /* Receive all */</td></tr>
|
||
<tr class="separator:ga7970ce2fd938029f0a58cf668a82a0fb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8b902b5561e392e47ce5d66275902e29"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8b902b5561e392e47ce5d66275902e29"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_HPF</b>   ((uint32_t)0x00000400) /* Hash or perfect filter */</td></tr>
|
||
<tr class="separator:ga8b902b5561e392e47ce5d66275902e29"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1e710eda13cca42c8da46d5d37f34552"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1e710eda13cca42c8da46d5d37f34552"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_SAF</b>   ((uint32_t)0x00000200) /* Source address filter enable */</td></tr>
|
||
<tr class="separator:ga1e710eda13cca42c8da46d5d37f34552"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaa351de2818df9599ce6b3378ca31f87"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa351de2818df9599ce6b3378ca31f87"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_SAIF</b>   ((uint32_t)0x00000100) /* SA inverse filtering */</td></tr>
|
||
<tr class="separator:gaaa351de2818df9599ce6b3378ca31f87"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga25724ed070e5948cb5541d890d2af603"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25724ed070e5948cb5541d890d2af603"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PCF</b>   ((uint32_t)0x000000C0) /* Pass control frames: 3 cases */</td></tr>
|
||
<tr class="separator:ga25724ed070e5948cb5541d890d2af603"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9bcec681af42037508574944fe68d6ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9bcec681af42037508574944fe68d6ff"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PCF_BlockAll</b>   ((uint32_t)0x00000040) /* MAC filters all control frames from reaching the application */</td></tr>
|
||
<tr class="separator:ga9bcec681af42037508574944fe68d6ff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf694466716e26c52452e21ce2a76f2fe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf694466716e26c52452e21ce2a76f2fe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PCF_ForwardAll</b>   ((uint32_t)0x00000080) /* MAC forwards all control frames to application even if they fail the Address Filter */</td></tr>
|
||
<tr class="separator:gaf694466716e26c52452e21ce2a76f2fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa3e83e62d864be50e58455719d6df217"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa3e83e62d864be50e58455719d6df217"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PCF_ForwardPassedAddrFilter</b>   ((uint32_t)0x000000C0) /* MAC forwards control frames that pass the Address Filter. */</td></tr>
|
||
<tr class="separator:gaa3e83e62d864be50e58455719d6df217"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8fea3f3e6b264e362a84675e09f33cbd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8fea3f3e6b264e362a84675e09f33cbd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_BFD</b>   ((uint32_t)0x00000020) /* Broadcast frame disable */</td></tr>
|
||
<tr class="separator:ga8fea3f3e6b264e362a84675e09f33cbd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaafaa7da9e50e9ecf39bdc614c01bc22e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaafaa7da9e50e9ecf39bdc614c01bc22e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PAM</b>   ((uint32_t)0x00000010) /* Pass all mutlicast */</td></tr>
|
||
<tr class="separator:gaafaa7da9e50e9ecf39bdc614c01bc22e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f50c885917d6df63e6250a530a9ce0c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f50c885917d6df63e6250a530a9ce0c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_DAIF</b>   ((uint32_t)0x00000008) /* DA Inverse filtering */</td></tr>
|
||
<tr class="separator:ga7f50c885917d6df63e6250a530a9ce0c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaab1e7a61949844d578d7580b9d2c143"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaab1e7a61949844d578d7580b9d2c143"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_HM</b>   ((uint32_t)0x00000004) /* Hash multicast */</td></tr>
|
||
<tr class="separator:gaaab1e7a61949844d578d7580b9d2c143"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6d925e8aa55a6b07772f86abce601529"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d925e8aa55a6b07772f86abce601529"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_HU</b>   ((uint32_t)0x00000002) /* Hash unicast */</td></tr>
|
||
<tr class="separator:ga6d925e8aa55a6b07772f86abce601529"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga168f5e4a3eb11474c65396d75c07e086"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga168f5e4a3eb11474c65396d75c07e086"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFFR_PM</b>   ((uint32_t)0x00000001) /* Promiscuous mode */</td></tr>
|
||
<tr class="separator:ga168f5e4a3eb11474c65396d75c07e086"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee61bc9033449996ae9f8f701b3bae23"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee61bc9033449996ae9f8f701b3bae23"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACHTHR_HTH</b>   ((uint32_t)0xFFFFFFFF) /* Hash table high */</td></tr>
|
||
<tr class="separator:gaee61bc9033449996ae9f8f701b3bae23"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac90cb3090f29ee9e5e7d935e8a3f2340"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac90cb3090f29ee9e5e7d935e8a3f2340"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACHTLR_HTL</b>   ((uint32_t)0xFFFFFFFF) /* Hash table low */</td></tr>
|
||
<tr class="separator:gac90cb3090f29ee9e5e7d935e8a3f2340"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga712f44a77db4edfaf961e469153e34a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga712f44a77db4edfaf961e469153e34a4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_PA</b>   ((uint32_t)0x0000F800) /* Physical layer address */</td></tr>
|
||
<tr class="separator:ga712f44a77db4edfaf961e469153e34a4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa2ab5db007b55dca29e98ba3b31f7e66"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa2ab5db007b55dca29e98ba3b31f7e66"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_MR</b>   ((uint32_t)0x000007C0) /* MII register in the selected PHY */</td></tr>
|
||
<tr class="separator:gaa2ab5db007b55dca29e98ba3b31f7e66"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0747e464ca8bb685ee34d28eb2677c40"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0747e464ca8bb685ee34d28eb2677c40"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR</b>   ((uint32_t)0x0000001C) /* CR clock range: 6 cases */</td></tr>
|
||
<tr class="separator:ga0747e464ca8bb685ee34d28eb2677c40"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1fc1c108e8e7faa35839b3f72b5570d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1fc1c108e8e7faa35839b3f72b5570d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR_Div42</b>   ((uint32_t)0x00000000) /* HCLK:60-100 MHz; MDC clock= HCLK/42 */</td></tr>
|
||
<tr class="separator:ga1fc1c108e8e7faa35839b3f72b5570d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0002142eea07988f854915782bd691c9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0002142eea07988f854915782bd691c9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR_Div62</b>   ((uint32_t)0x00000004) /* HCLK:100-150 MHz; MDC clock= HCLK/62 */</td></tr>
|
||
<tr class="separator:ga0002142eea07988f854915782bd691c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga49474ccdc05637adbc870989373c6535"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga49474ccdc05637adbc870989373c6535"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR_Div16</b>   ((uint32_t)0x00000008) /* HCLK:20-35 MHz; MDC clock= HCLK/16 */</td></tr>
|
||
<tr class="separator:ga49474ccdc05637adbc870989373c6535"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga69a9da5dbeb77d96a729afc82d4f246d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga69a9da5dbeb77d96a729afc82d4f246d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR_Div26</b>   ((uint32_t)0x0000000C) /* HCLK:35-60 MHz; MDC clock= HCLK/26 */</td></tr>
|
||
<tr class="separator:ga69a9da5dbeb77d96a729afc82d4f246d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga372d485677cd2e3a995dab470abe66b8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga372d485677cd2e3a995dab470abe66b8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_CR_Div102</b>   ((uint32_t)0x00000010) /* HCLK:150-168 MHz; MDC clock= HCLK/102 */</td></tr>
|
||
<tr class="separator:ga372d485677cd2e3a995dab470abe66b8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaffdb940b35822107a5959cdd1ab06482"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaffdb940b35822107a5959cdd1ab06482"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_MW</b>   ((uint32_t)0x00000002) /* MII write */</td></tr>
|
||
<tr class="separator:gaffdb940b35822107a5959cdd1ab06482"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4e3bd36fdbb97a3ec5b541997bf952aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4e3bd36fdbb97a3ec5b541997bf952aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIAR_MB</b>   ((uint32_t)0x00000001) /* MII busy */</td></tr>
|
||
<tr class="separator:ga4e3bd36fdbb97a3ec5b541997bf952aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c1226bcd1fc955b69191cd84c1ffe6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c1226bcd1fc955b69191cd84c1ffe6e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACMIIDR_MD</b>   ((uint32_t)0x0000FFFF) /* MII data: read/write data from/to PHY */</td></tr>
|
||
<tr class="separator:ga0c1226bcd1fc955b69191cd84c1ffe6e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2b3bc8574eee69d1bf01d5ab91644bbc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b3bc8574eee69d1bf01d5ab91644bbc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PT</b>   ((uint32_t)0xFFFF0000) /* Pause time */</td></tr>
|
||
<tr class="separator:ga2b3bc8574eee69d1bf01d5ab91644bbc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf34f51c72bc9733694ca11993cc384e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf34f51c72bc9733694ca11993cc384e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_ZQPD</b>   ((uint32_t)0x00000080) /* Zero-quanta pause disable */</td></tr>
|
||
<tr class="separator:gaf34f51c72bc9733694ca11993cc384e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa299b14f248991ea740c352c2e2ec1e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa299b14f248991ea740c352c2e2ec1e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PLT</b>   ((uint32_t)0x00000030) /* Pause low threshold: 4 cases */</td></tr>
|
||
<tr class="separator:gaa299b14f248991ea740c352c2e2ec1e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga23d3e1992eec79fe65413ab67d3a3850"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga23d3e1992eec79fe65413ab67d3a3850"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PLT_Minus4</b>   ((uint32_t)0x00000000) /* Pause time minus 4 slot times */</td></tr>
|
||
<tr class="separator:ga23d3e1992eec79fe65413ab67d3a3850"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga006139afdeadd79e8ead0233a202b3aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga006139afdeadd79e8ead0233a202b3aa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PLT_Minus28</b>   ((uint32_t)0x00000010) /* Pause time minus 28 slot times */</td></tr>
|
||
<tr class="separator:ga006139afdeadd79e8ead0233a202b3aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2d71124fba7219f43938d8cc25ba4fad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d71124fba7219f43938d8cc25ba4fad"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PLT_Minus144</b>   ((uint32_t)0x00000020) /* Pause time minus 144 slot times */</td></tr>
|
||
<tr class="separator:ga2d71124fba7219f43938d8cc25ba4fad"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf55b57c1a06e060afd934e7883a6ebca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf55b57c1a06e060afd934e7883a6ebca"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_PLT_Minus256</b>   ((uint32_t)0x00000030) /* Pause time minus 256 slot times */</td></tr>
|
||
<tr class="separator:gaf55b57c1a06e060afd934e7883a6ebca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50539e6dcdc828a70c91ab0cb0c1c27c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50539e6dcdc828a70c91ab0cb0c1c27c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_UPFD</b>   ((uint32_t)0x00000008) /* Unicast pause frame detect */</td></tr>
|
||
<tr class="separator:ga50539e6dcdc828a70c91ab0cb0c1c27c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2eec52cb081cdba237e1195fe8c324b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2eec52cb081cdba237e1195fe8c324b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_RFCE</b>   ((uint32_t)0x00000004) /* Receive flow control enable */</td></tr>
|
||
<tr class="separator:gaf2eec52cb081cdba237e1195fe8c324b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa5cd88b7b637bef7a8022270ee02c64a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa5cd88b7b637bef7a8022270ee02c64a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_TFCE</b>   ((uint32_t)0x00000002) /* Transmit flow control enable */</td></tr>
|
||
<tr class="separator:gaa5cd88b7b637bef7a8022270ee02c64a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7dccd98a15d90caf17bcaa6ae13d60a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7dccd98a15d90caf17bcaa6ae13d60a3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACFCR_FCBBPA</b>   ((uint32_t)0x00000001) /* Flow control busy/backpressure activate */</td></tr>
|
||
<tr class="separator:ga7dccd98a15d90caf17bcaa6ae13d60a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabd45480752cd22efecf0d7465bf49500"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabd45480752cd22efecf0d7465bf49500"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACVLANTR_VLANTC</b>   ((uint32_t)0x00010000) /* 12-bit VLAN tag comparison */</td></tr>
|
||
<tr class="separator:gabd45480752cd22efecf0d7465bf49500"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga50874dc921fd523d84621a337aebc53d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga50874dc921fd523d84621a337aebc53d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACVLANTR_VLANTI</b>   ((uint32_t)0x0000FFFF) /* VLAN tag identifier (for receive frames) */</td></tr>
|
||
<tr class="separator:ga50874dc921fd523d84621a337aebc53d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaae49a607f4dc4ba71c695b3aa2fc0968"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaae49a607f4dc4ba71c695b3aa2fc0968"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACRWUFFR_D</b>   ((uint32_t)0xFFFFFFFF) /* Wake-up frame filter register data */</td></tr>
|
||
<tr class="separator:gaae49a607f4dc4ba71c695b3aa2fc0968"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaeaa7046c581aa1b663c819352930cdd8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeaa7046c581aa1b663c819352930cdd8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_WFFRPR</b>   ((uint32_t)0x80000000) /* Wake-Up Frame Filter Register Pointer Reset */</td></tr>
|
||
<tr class="separator:gaeaa7046c581aa1b663c819352930cdd8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3c2d01faf67db27fb0b2cfeaf94242b4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c2d01faf67db27fb0b2cfeaf94242b4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_GU</b>   ((uint32_t)0x00000200) /* Global Unicast */</td></tr>
|
||
<tr class="separator:ga3c2d01faf67db27fb0b2cfeaf94242b4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga597abfcc1408cb51980fa7a594a6cf30"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga597abfcc1408cb51980fa7a594a6cf30"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_WFR</b>   ((uint32_t)0x00000040) /* Wake-Up Frame Received */</td></tr>
|
||
<tr class="separator:ga597abfcc1408cb51980fa7a594a6cf30"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab855f00737fb7f828752e1353c3a1031"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab855f00737fb7f828752e1353c3a1031"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_MPR</b>   ((uint32_t)0x00000020) /* Magic Packet Received */</td></tr>
|
||
<tr class="separator:gab855f00737fb7f828752e1353c3a1031"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga998f1f5665f94008e39dfabb489faf8e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga998f1f5665f94008e39dfabb489faf8e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_WFE</b>   ((uint32_t)0x00000004) /* Wake-Up Frame Enable */</td></tr>
|
||
<tr class="separator:ga998f1f5665f94008e39dfabb489faf8e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81540e67436a755a7692b32a33871f63"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81540e67436a755a7692b32a33871f63"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_MPE</b>   ((uint32_t)0x00000002) /* Magic Packet Enable */</td></tr>
|
||
<tr class="separator:ga81540e67436a755a7692b32a33871f63"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab454be372dc141b6e515c4389cd18a12"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab454be372dc141b6e515c4389cd18a12"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACPMTCSR_PD</b>   ((uint32_t)0x00000001) /* Power Down */</td></tr>
|
||
<tr class="separator:gab454be372dc141b6e515c4389cd18a12"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac5e4af1a52a19f5b2d8f3ce74dd5c85e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5e4af1a52a19f5b2d8f3ce74dd5c85e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACSR_TSTS</b>   ((uint32_t)0x00000200) /* Time stamp trigger status */</td></tr>
|
||
<tr class="separator:gac5e4af1a52a19f5b2d8f3ce74dd5c85e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0f628abfb1f1076cd89ac76a373d48d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0f628abfb1f1076cd89ac76a373d48d6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACSR_MMCTS</b>   ((uint32_t)0x00000040) /* MMC transmit status */</td></tr>
|
||
<tr class="separator:ga0f628abfb1f1076cd89ac76a373d48d6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9faeaa8069b56260ffc8ed2daa06fcd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9faeaa8069b56260ffc8ed2daa06fcd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACSR_MMMCRS</b>   ((uint32_t)0x00000020) /* MMC receive status */</td></tr>
|
||
<tr class="separator:gaf9faeaa8069b56260ffc8ed2daa06fcd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga764dd9b736867f6c5b590c7ca49017c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga764dd9b736867f6c5b590c7ca49017c2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACSR_MMCS</b>   ((uint32_t)0x00000010) /* MMC status */</td></tr>
|
||
<tr class="separator:ga764dd9b736867f6c5b590c7ca49017c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaee99dd08ad3581436f53b7f22452dcb9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaee99dd08ad3581436f53b7f22452dcb9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACSR_PMTS</b>   ((uint32_t)0x00000008) /* PMT status */</td></tr>
|
||
<tr class="separator:gaee99dd08ad3581436f53b7f22452dcb9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f17c13903c30bc301c7897b93a16a24"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f17c13903c30bc301c7897b93a16a24"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACIMR_TSTIM</b>   ((uint32_t)0x00000200) /* Time stamp trigger interrupt mask */</td></tr>
|
||
<tr class="separator:ga8f17c13903c30bc301c7897b93a16a24"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2cdb4ba6c97aba3e82e8192ebddcb5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2cdb4ba6c97aba3e82e8192ebddcb5f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACIMR_PMTIM</b>   ((uint32_t)0x00000008) /* PMT interrupt mask */</td></tr>
|
||
<tr class="separator:gaf2cdb4ba6c97aba3e82e8192ebddcb5f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga142dbcbb7da81e8549dde3c239ed8251"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga142dbcbb7da81e8549dde3c239ed8251"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA0HR_MACA0H</b>   ((uint32_t)0x0000FFFF) /* MAC address0 high */</td></tr>
|
||
<tr class="separator:ga142dbcbb7da81e8549dde3c239ed8251"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf3ed9dbd9711ee9c19f40c73d8f33be3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3ed9dbd9711ee9c19f40c73d8f33be3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA0LR_MACA0L</b>   ((uint32_t)0xFFFFFFFF) /* MAC address0 low */</td></tr>
|
||
<tr class="separator:gaf3ed9dbd9711ee9c19f40c73d8f33be3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9f88c5ead1109f1e0abac07bcb2e44ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f88c5ead1109f1e0abac07bcb2e44ea"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_AE</b>   ((uint32_t)0x80000000) /* Address enable */</td></tr>
|
||
<tr class="separator:ga9f88c5ead1109f1e0abac07bcb2e44ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac3840a96465b73115d34360abf3704c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3840a96465b73115d34360abf3704c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_SA</b>   ((uint32_t)0x40000000) /* Source address */</td></tr>
|
||
<tr class="separator:gac3840a96465b73115d34360abf3704c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7bf2fe1242cce62c3fe1cc49ce513b6a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7bf2fe1242cce62c3fe1cc49ce513b6a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC</b>   ((uint32_t)0x3F000000) /* Mask byte control: bits to mask for comparison of the MAC Address bytes */</td></tr>
|
||
<tr class="separator:ga7bf2fe1242cce62c3fe1cc49ce513b6a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf3e731440906539ecb1c52a84df889c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3e731440906539ecb1c52a84df889c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_HBits15_8</b>   ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */</td></tr>
|
||
<tr class="separator:gaf3e731440906539ecb1c52a84df889c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac8ebf87cc6584613fea5a49a382b2d67"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8ebf87cc6584613fea5a49a382b2d67"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_HBits7_0</b>   ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */</td></tr>
|
||
<tr class="separator:gac8ebf87cc6584613fea5a49a382b2d67"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7fa211fa742d34dd8e8d2ca2ea5e865a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fa211fa742d34dd8e8d2ca2ea5e865a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_LBits31_24</b>   ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */</td></tr>
|
||
<tr class="separator:ga7fa211fa742d34dd8e8d2ca2ea5e865a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6d3767ea17fd333409e63262ab5f6878"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d3767ea17fd333409e63262ab5f6878"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_LBits23_16</b>   ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */</td></tr>
|
||
<tr class="separator:ga6d3767ea17fd333409e63262ab5f6878"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab3520a54e7e68617539b51885b7bb918"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab3520a54e7e68617539b51885b7bb918"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_LBits15_8</b>   ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */</td></tr>
|
||
<tr class="separator:gab3520a54e7e68617539b51885b7bb918"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3894de2dc133fd5e03e4d4817852adfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3894de2dc133fd5e03e4d4817852adfd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MBC_LBits7_0</b>   ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [7:0] */</td></tr>
|
||
<tr class="separator:ga3894de2dc133fd5e03e4d4817852adfd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaddd4d059d3d4734c2528ef12cadbd769"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaddd4d059d3d4734c2528ef12cadbd769"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1HR_MACA1H</b>   ((uint32_t)0x0000FFFF) /* MAC address1 high */</td></tr>
|
||
<tr class="separator:gaddd4d059d3d4734c2528ef12cadbd769"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacce742aa0eabc2a8b23ba4f79f18409a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacce742aa0eabc2a8b23ba4f79f18409a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA1LR_MACA1L</b>   ((uint32_t)0xFFFFFFFF) /* MAC address1 low */</td></tr>
|
||
<tr class="separator:gacce742aa0eabc2a8b23ba4f79f18409a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5713abb4f70f5514d2d44c44ea17254e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5713abb4f70f5514d2d44c44ea17254e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_AE</b>   ((uint32_t)0x80000000) /* Address enable */</td></tr>
|
||
<tr class="separator:ga5713abb4f70f5514d2d44c44ea17254e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8c3f0a2b08321c5441a87b385bfe0c41"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8c3f0a2b08321c5441a87b385bfe0c41"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_SA</b>   ((uint32_t)0x40000000) /* Source address */</td></tr>
|
||
<tr class="separator:ga8c3f0a2b08321c5441a87b385bfe0c41"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga270c0bb939fd71e02a8d221caada1071"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga270c0bb939fd71e02a8d221caada1071"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC</b>   ((uint32_t)0x3F000000) /* Mask byte control */</td></tr>
|
||
<tr class="separator:ga270c0bb939fd71e02a8d221caada1071"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga656070d9cc36501e927908e2f3903332"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga656070d9cc36501e927908e2f3903332"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_HBits15_8</b>   ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */</td></tr>
|
||
<tr class="separator:ga656070d9cc36501e927908e2f3903332"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga322aa03bccdcb0b2e85119629e95be57"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga322aa03bccdcb0b2e85119629e95be57"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_HBits7_0</b>   ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */</td></tr>
|
||
<tr class="separator:ga322aa03bccdcb0b2e85119629e95be57"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9519b002d1e0c04b1d5989bf410d24cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9519b002d1e0c04b1d5989bf410d24cb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_LBits31_24</b>   ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */</td></tr>
|
||
<tr class="separator:ga9519b002d1e0c04b1d5989bf410d24cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8cc71bd0499aaa5a76247a6bd6e5e79a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8cc71bd0499aaa5a76247a6bd6e5e79a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_LBits23_16</b>   ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */</td></tr>
|
||
<tr class="separator:ga8cc71bd0499aaa5a76247a6bd6e5e79a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga394acdc62df68dadb1190d4f83f6dbaa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga394acdc62df68dadb1190d4f83f6dbaa"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_LBits15_8</b>   ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */</td></tr>
|
||
<tr class="separator:ga394acdc62df68dadb1190d4f83f6dbaa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa87b47b25381694fdcc397cc63ea8810"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa87b47b25381694fdcc397cc63ea8810"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MBC_LBits7_0</b>   ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */</td></tr>
|
||
<tr class="separator:gaa87b47b25381694fdcc397cc63ea8810"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5c73a460038c40e28b27fe0cfcd17cef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5c73a460038c40e28b27fe0cfcd17cef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2HR_MACA2H</b>   ((uint32_t)0x0000FFFF) /* MAC address1 high */</td></tr>
|
||
<tr class="separator:ga5c73a460038c40e28b27fe0cfcd17cef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga757e0ceef1c6d529f28c7875ff3e88e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga757e0ceef1c6d529f28c7875ff3e88e7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA2LR_MACA2L</b>   ((uint32_t)0xFFFFFFFF) /* MAC address2 low */</td></tr>
|
||
<tr class="separator:ga757e0ceef1c6d529f28c7875ff3e88e7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf3bb6d5c1237b2c573f22876a62dcaa9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3bb6d5c1237b2c573f22876a62dcaa9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_AE</b>   ((uint32_t)0x80000000) /* Address enable */</td></tr>
|
||
<tr class="separator:gaf3bb6d5c1237b2c573f22876a62dcaa9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga54c41346fd61170b413812a19fcac8db"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga54c41346fd61170b413812a19fcac8db"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_SA</b>   ((uint32_t)0x40000000) /* Source address */</td></tr>
|
||
<tr class="separator:ga54c41346fd61170b413812a19fcac8db"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga64ec855ed04aea21b400ae947b54a353"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga64ec855ed04aea21b400ae947b54a353"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC</b>   ((uint32_t)0x3F000000) /* Mask byte control */</td></tr>
|
||
<tr class="separator:ga64ec855ed04aea21b400ae947b54a353"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga019fe5bc7d94ee1ee4a605e06e777bb5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga019fe5bc7d94ee1ee4a605e06e777bb5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_HBits15_8</b>   ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */</td></tr>
|
||
<tr class="separator:ga019fe5bc7d94ee1ee4a605e06e777bb5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33587cdbe844563e853e3815b63c7c47"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33587cdbe844563e853e3815b63c7c47"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_HBits7_0</b>   ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */</td></tr>
|
||
<tr class="separator:ga33587cdbe844563e853e3815b63c7c47"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae147613a45eb3d13b84b66158217bb89"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae147613a45eb3d13b84b66158217bb89"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_LBits31_24</b>   ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */</td></tr>
|
||
<tr class="separator:gae147613a45eb3d13b84b66158217bb89"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6b47f3fddf3dcd39b3af7785c1e5cced"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b47f3fddf3dcd39b3af7785c1e5cced"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_LBits23_16</b>   ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */</td></tr>
|
||
<tr class="separator:ga6b47f3fddf3dcd39b3af7785c1e5cced"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4744ba01934291f07b1b132b82cb1bd4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4744ba01934291f07b1b132b82cb1bd4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_LBits15_8</b>   ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */</td></tr>
|
||
<tr class="separator:ga4744ba01934291f07b1b132b82cb1bd4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga60f2f1ab81a02837ed96e5f92fe96181"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga60f2f1ab81a02837ed96e5f92fe96181"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MBC_LBits7_0</b>   ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */</td></tr>
|
||
<tr class="separator:ga60f2f1ab81a02837ed96e5f92fe96181"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0b5d9faa67c4cc6d1c42ec26ad99d57b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0b5d9faa67c4cc6d1c42ec26ad99d57b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3HR_MACA3H</b>   ((uint32_t)0x0000FFFF) /* MAC address3 high */</td></tr>
|
||
<tr class="separator:ga0b5d9faa67c4cc6d1c42ec26ad99d57b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa08b4ccde1b7251ba6317e744b09a95f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa08b4ccde1b7251ba6317e744b09a95f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MACA3LR_MACA3L</b>   ((uint32_t)0xFFFFFFFF) /* MAC address3 low */</td></tr>
|
||
<tr class="separator:gaa08b4ccde1b7251ba6317e744b09a95f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0eb309947d400951235c17953254fbf8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0eb309947d400951235c17953254fbf8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_MCFHP</b>   ((uint32_t)0x00000020) /* MMC counter Full-Half preset */</td></tr>
|
||
<tr class="separator:ga0eb309947d400951235c17953254fbf8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a6eeda6ffcafe7d8ba531ccaa3abf90"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a6eeda6ffcafe7d8ba531ccaa3abf90"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_MCP</b>   ((uint32_t)0x00000010) /* MMC counter preset */</td></tr>
|
||
<tr class="separator:ga2a6eeda6ffcafe7d8ba531ccaa3abf90"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17ab5fbe6c5189b3f98095f9adb1eeeb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17ab5fbe6c5189b3f98095f9adb1eeeb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_MCF</b>   ((uint32_t)0x00000008) /* MMC Counter Freeze */</td></tr>
|
||
<tr class="separator:ga17ab5fbe6c5189b3f98095f9adb1eeeb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga243ae6b3acbbd295be6f76a84657a48d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga243ae6b3acbbd295be6f76a84657a48d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_ROR</b>   ((uint32_t)0x00000004) /* Reset on Read */</td></tr>
|
||
<tr class="separator:ga243ae6b3acbbd295be6f76a84657a48d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga948b685211ced94ef5d4b8d2c94df78a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga948b685211ced94ef5d4b8d2c94df78a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_CSR</b>   ((uint32_t)0x00000002) /* Counter Stop Rollover */</td></tr>
|
||
<tr class="separator:ga948b685211ced94ef5d4b8d2c94df78a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7cb520c80fc0b2f00304bb7f8f7c5d4e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7cb520c80fc0b2f00304bb7f8f7c5d4e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCCR_CR</b>   ((uint32_t)0x00000001) /* Counters Reset */</td></tr>
|
||
<tr class="separator:ga7cb520c80fc0b2f00304bb7f8f7c5d4e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa4b78bde6602ca062513389b8bf43e17"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa4b78bde6602ca062513389b8bf43e17"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIR_RGUFS</b>   ((uint32_t)0x00020000) /* Set when Rx good unicast frames counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:gaa4b78bde6602ca062513389b8bf43e17"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7d3859ff0eb6fff48fb98919fe72da15"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7d3859ff0eb6fff48fb98919fe72da15"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIR_RFAES</b>   ((uint32_t)0x00000040) /* Set when Rx alignment error counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:ga7d3859ff0eb6fff48fb98919fe72da15"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac74e35d76820f3c2b0eb743f26023792"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac74e35d76820f3c2b0eb743f26023792"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIR_RFCES</b>   ((uint32_t)0x00000020) /* Set when Rx crc error counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:gac74e35d76820f3c2b0eb743f26023792"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab5d5dcc69902946befc317ea5719a34c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5d5dcc69902946befc317ea5719a34c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIR_TGFS</b>   ((uint32_t)0x00200000) /* Set when Tx good frame count counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:gab5d5dcc69902946befc317ea5719a34c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga796d834a29d0fc6fdc1908ba6db487c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga796d834a29d0fc6fdc1908ba6db487c3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIR_TGFMSCS</b>   ((uint32_t)0x00008000) /* Set when Tx good multi col counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:ga796d834a29d0fc6fdc1908ba6db487c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gabe8e920b9e135d3e3ba61e0db758ff19"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabe8e920b9e135d3e3ba61e0db758ff19"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIR_TGFSCS</b>   ((uint32_t)0x00004000) /* Set when Tx good single col counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:gabe8e920b9e135d3e3ba61e0db758ff19"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga873a3b1c0a7756647be8455ea6bea8df"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga873a3b1c0a7756647be8455ea6bea8df"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIMR_RGUFM</b>   ((uint32_t)0x00020000) /* Mask the interrupt when Rx good unicast frames counter reaches half the maximum value */</td></tr>
|
||
<tr class="separator:ga873a3b1c0a7756647be8455ea6bea8df"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga3c763ea4da19192ab30828971579400c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c763ea4da19192ab30828971579400c"></a>
|
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#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIMR_RFAEM</b>   ((uint32_t)0x00000040) /* Mask the interrupt when when Rx alignment error counter reaches half the maximum value */</td></tr>
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||
<tr class="separator:ga3c763ea4da19192ab30828971579400c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad3eb72a19c5a4bd34a9ec2c624bd8a8c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3eb72a19c5a4bd34a9ec2c624bd8a8c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRIMR_RFCEM</b>   ((uint32_t)0x00000020) /* Mask the interrupt when Rx crc error counter reaches half the maximum value */</td></tr>
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||
<tr class="separator:gad3eb72a19c5a4bd34a9ec2c624bd8a8c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae67e69315d2e64d3f4c9b7e65aacf8be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae67e69315d2e64d3f4c9b7e65aacf8be"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIMR_TGFM</b>   ((uint32_t)0x00200000) /* Mask the interrupt when Tx good frame count counter reaches half the maximum value */</td></tr>
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||
<tr class="separator:gae67e69315d2e64d3f4c9b7e65aacf8be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20b6f12c07d34bcc014eaa31c6719486"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga20b6f12c07d34bcc014eaa31c6719486"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIMR_TGFMSCM</b>   ((uint32_t)0x00008000) /* Mask the interrupt when Tx good multi col counter reaches half the maximum value */</td></tr>
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||
<tr class="separator:ga20b6f12c07d34bcc014eaa31c6719486"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f41666a525c61be9c88f3d54632ce34"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2f41666a525c61be9c88f3d54632ce34"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTIMR_TGFSCM</b>   ((uint32_t)0x00004000) /* Mask the interrupt when Tx good single col counter reaches half the maximum value */</td></tr>
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<tr class="separator:ga2f41666a525c61be9c88f3d54632ce34"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga784008b2facbc9cab1982e0382057d1c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga784008b2facbc9cab1982e0382057d1c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTGFSCCR_TGFSCC</b>   ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after a single collision in Half-duplex mode. */</td></tr>
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<tr class="separator:ga784008b2facbc9cab1982e0382057d1c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad4a8b771ec947fe2b944108f72e64fbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4a8b771ec947fe2b944108f72e64fbf"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTGFMSCCR_TGFMSCC</b>   ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after more than a single collision in Half-duplex mode. */</td></tr>
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||
<tr class="separator:gad4a8b771ec947fe2b944108f72e64fbf"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga68b659b400b12fd5c539e24bc115dff2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68b659b400b12fd5c539e24bc115dff2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCTGFCR_TGFC</b>   ((uint32_t)0xFFFFFFFF) /* Number of good frames transmitted. */</td></tr>
|
||
<tr class="separator:ga68b659b400b12fd5c539e24bc115dff2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8ed4e2c7449a522ecbc811252ba1f12b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ed4e2c7449a522ecbc811252ba1f12b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRFCECR_RFCEC</b>   ((uint32_t)0xFFFFFFFF) /* Number of frames received with CRC error. */</td></tr>
|
||
<tr class="separator:ga8ed4e2c7449a522ecbc811252ba1f12b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac52a70effea67d543da0842e323d2123"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac52a70effea67d543da0842e323d2123"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRFAECR_RFAEC</b>   ((uint32_t)0xFFFFFFFF) /* Number of frames received with alignment (dribble) error */</td></tr>
|
||
<tr class="separator:gac52a70effea67d543da0842e323d2123"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2dd42857738b46f748bc6a9109ab0f9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2dd42857738b46f748bc6a9109ab0f9e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_MMCRGUFCR_RGUFC</b>   ((uint32_t)0xFFFFFFFF) /* Number of good unicast frames received. */</td></tr>
|
||
<tr class="separator:ga2dd42857738b46f748bc6a9109ab0f9e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9d47a61f30e11b514ef0840f3a0fb91"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9d47a61f30e11b514ef0840f3a0fb91"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSCNT</b>   ((uint32_t)0x00030000) /* Time stamp clock node type */</td></tr>
|
||
<tr class="separator:gaf9d47a61f30e11b514ef0840f3a0fb91"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac4fc513069f3282a3eb0882aed3bbfd1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac4fc513069f3282a3eb0882aed3bbfd1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSMRME</b>   ((uint32_t)0x00008000) /* Time stamp snapshot for message relevant to master enable */</td></tr>
|
||
<tr class="separator:gac4fc513069f3282a3eb0882aed3bbfd1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0eaf5fc7cc8783ac1ca9ace803bb0160"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0eaf5fc7cc8783ac1ca9ace803bb0160"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSEME</b>   ((uint32_t)0x00004000) /* Time stamp snapshot for event message enable */</td></tr>
|
||
<tr class="separator:ga0eaf5fc7cc8783ac1ca9ace803bb0160"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa2f42e1b4f3b0a00d0dce8d5bd59dee3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa2f42e1b4f3b0a00d0dce8d5bd59dee3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSIPV4FE</b>   ((uint32_t)0x00002000) /* Time stamp snapshot for IPv4 frames enable */</td></tr>
|
||
<tr class="separator:gaa2f42e1b4f3b0a00d0dce8d5bd59dee3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga428ee209868452ee95f36fe45d0a4b4f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga428ee209868452ee95f36fe45d0a4b4f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSIPV6FE</b>   ((uint32_t)0x00001000) /* Time stamp snapshot for IPv6 frames enable */</td></tr>
|
||
<tr class="separator:ga428ee209868452ee95f36fe45d0a4b4f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga69cfe467495afe0d32ec28b909b3eb9b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga69cfe467495afe0d32ec28b909b3eb9b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSPTPOEFE</b>   ((uint32_t)0x00000800) /* Time stamp snapshot for PTP over ethernet frames enable */</td></tr>
|
||
<tr class="separator:ga69cfe467495afe0d32ec28b909b3eb9b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga335a3940df21b9ee09ba00c46e2b161a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga335a3940df21b9ee09ba00c46e2b161a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSPTPPSV2E</b>   ((uint32_t)0x00000400) /* Time stamp PTP packet snooping for version2 format enable */</td></tr>
|
||
<tr class="separator:ga335a3940df21b9ee09ba00c46e2b161a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2037dd72baca0b1c16a560b8488d92c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2037dd72baca0b1c16a560b8488d92c5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSSR</b>   ((uint32_t)0x00000200) /* Time stamp Sub-seconds rollover */</td></tr>
|
||
<tr class="separator:ga2037dd72baca0b1c16a560b8488d92c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae3b00141a354c03c06e49046cde7a7e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae3b00141a354c03c06e49046cde7a7e5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSARFE</b>   ((uint32_t)0x00000100) /* Time stamp snapshot for all received frames enable */</td></tr>
|
||
<tr class="separator:gae3b00141a354c03c06e49046cde7a7e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga19406b465c944a3e465a8077cbfbf39e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga19406b465c944a3e465a8077cbfbf39e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSARU</b>   ((uint32_t)0x00000020) /* Addend register update */</td></tr>
|
||
<tr class="separator:ga19406b465c944a3e465a8077cbfbf39e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga44670d6793da45549fb7ea38c3523783"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44670d6793da45549fb7ea38c3523783"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSITE</b>   ((uint32_t)0x00000010) /* Time stamp interrupt trigger enable */</td></tr>
|
||
<tr class="separator:ga44670d6793da45549fb7ea38c3523783"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga589a3a200c3f68543f556432cdb98075"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga589a3a200c3f68543f556432cdb98075"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSSTU</b>   ((uint32_t)0x00000008) /* Time stamp update */</td></tr>
|
||
<tr class="separator:ga589a3a200c3f68543f556432cdb98075"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad484f7a6e6df6b3f2131d3bfb3dba856"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad484f7a6e6df6b3f2131d3bfb3dba856"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSSTI</b>   ((uint32_t)0x00000004) /* Time stamp initialize */</td></tr>
|
||
<tr class="separator:gad484f7a6e6df6b3f2131d3bfb3dba856"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9e58e22d5668ebf118f67df5eb13e834"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e58e22d5668ebf118f67df5eb13e834"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSFCU</b>   ((uint32_t)0x00000002) /* Time stamp fine or coarse update */</td></tr>
|
||
<tr class="separator:ga9e58e22d5668ebf118f67df5eb13e834"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9c1129b1d368bdef0c5c07d9acf8edd7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c1129b1d368bdef0c5c07d9acf8edd7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSCR_TSE</b>   ((uint32_t)0x00000001) /* Time stamp enable */</td></tr>
|
||
<tr class="separator:ga9c1129b1d368bdef0c5c07d9acf8edd7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab51d59cd679f65a179fe5e271b63a22c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab51d59cd679f65a179fe5e271b63a22c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPSSIR_STSSI</b>   ((uint32_t)0x000000FF) /* System time Sub-second increment value */</td></tr>
|
||
<tr class="separator:gab51d59cd679f65a179fe5e271b63a22c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad4e066e9342e4f16955c1506d64b26d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4e066e9342e4f16955c1506d64b26d5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSHR_STS</b>   ((uint32_t)0xFFFFFFFF) /* System Time second */</td></tr>
|
||
<tr class="separator:gad4e066e9342e4f16955c1506d64b26d5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5db7e66364e5d2022b53561fc6fcbfc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5db7e66364e5d2022b53561fc6fcbfc6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSLR_STPNS</b>   ((uint32_t)0x80000000) /* System Time Positive or negative time */</td></tr>
|
||
<tr class="separator:ga5db7e66364e5d2022b53561fc6fcbfc6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga56d984d62fb4bfdc0677734863135ade"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga56d984d62fb4bfdc0677734863135ade"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSLR_STSS</b>   ((uint32_t)0x7FFFFFFF) /* System Time sub-seconds */</td></tr>
|
||
<tr class="separator:ga56d984d62fb4bfdc0677734863135ade"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga790cfc8e9a003b703e25d158e3490066"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga790cfc8e9a003b703e25d158e3490066"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSHUR_TSUS</b>   ((uint32_t)0xFFFFFFFF) /* Time stamp update seconds */</td></tr>
|
||
<tr class="separator:ga790cfc8e9a003b703e25d158e3490066"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae03c675fcd71d14198665cb8c5956086"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae03c675fcd71d14198665cb8c5956086"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSLUR_TSUPNS</b>   ((uint32_t)0x80000000) /* Time stamp update Positive or negative time */</td></tr>
|
||
<tr class="separator:gae03c675fcd71d14198665cb8c5956086"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga17fdf1f11b40e68b24a27eb2c60f50b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17fdf1f11b40e68b24a27eb2c60f50b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSLUR_TSUSS</b>   ((uint32_t)0x7FFFFFFF) /* Time stamp update sub-seconds */</td></tr>
|
||
<tr class="separator:ga17fdf1f11b40e68b24a27eb2c60f50b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab944b9f1ceff57bb31beb689a19537c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab944b9f1ceff57bb31beb689a19537c4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSAR_TSA</b>   ((uint32_t)0xFFFFFFFF) /* Time stamp addend */</td></tr>
|
||
<tr class="separator:gab944b9f1ceff57bb31beb689a19537c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga21db9a6b88a17aef32ccce70f017329e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga21db9a6b88a17aef32ccce70f017329e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTTHR_TTSH</b>   ((uint32_t)0xFFFFFFFF) /* Target time stamp high */</td></tr>
|
||
<tr class="separator:ga21db9a6b88a17aef32ccce70f017329e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga61e7a9592215e36a8db010374f57d210"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga61e7a9592215e36a8db010374f57d210"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTTLR_TTSL</b>   ((uint32_t)0xFFFFFFFF) /* Target time stamp low */</td></tr>
|
||
<tr class="separator:ga61e7a9592215e36a8db010374f57d210"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga491e96ebf2d049900f049cead51f320a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga491e96ebf2d049900f049cead51f320a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSTTR</b>   ((uint32_t)0x00000020) /* Time stamp target time reached */</td></tr>
|
||
<tr class="separator:ga491e96ebf2d049900f049cead51f320a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa245035f820779346591bee91d96b473"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa245035f820779346591bee91d96b473"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_PTPTSSR_TSSO</b>   ((uint32_t)0x00000010) /* Time stamp seconds overflow */</td></tr>
|
||
<tr class="separator:gaa245035f820779346591bee91d96b473"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacec4fa12c34dc8fcacc2271f09ed0cbd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacec4fa12c34dc8fcacc2271f09ed0cbd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_AAB</b>   ((uint32_t)0x02000000) /* Address-Aligned beats */</td></tr>
|
||
<tr class="separator:gacec4fa12c34dc8fcacc2271f09ed0cbd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafcb4414b6567f8b131712e0dc5c62beb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafcb4414b6567f8b131712e0dc5c62beb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_FPM</b>   ((uint32_t)0x01000000) /* 4xPBL mode */</td></tr>
|
||
<tr class="separator:gafcb4414b6567f8b131712e0dc5c62beb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga91e71c4054613222a8610bde0b191d00"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga91e71c4054613222a8610bde0b191d00"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_USP</b>   ((uint32_t)0x00800000) /* Use separate PBL */</td></tr>
|
||
<tr class="separator:ga91e71c4054613222a8610bde0b191d00"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4f8be5fad8f704e418e3d799d4c6d3d1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4f8be5fad8f704e418e3d799d4c6d3d1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP</b>   ((uint32_t)0x007E0000) /* RxDMA PBL */</td></tr>
|
||
<tr class="separator:ga4f8be5fad8f704e418e3d799d4c6d3d1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac56caa9d3b3a4300bd1aa0405131d7b9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac56caa9d3b3a4300bd1aa0405131d7b9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_1Beat</b>   ((uint32_t)0x00020000) /* maximum number of beats to be transferred in one RxDMA transaction is 1 */</td></tr>
|
||
<tr class="separator:gac56caa9d3b3a4300bd1aa0405131d7b9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaaf9bcd9870547bd6f454db6667ccdecb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf9bcd9870547bd6f454db6667ccdecb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_2Beat</b>   ((uint32_t)0x00040000) /* maximum number of beats to be transferred in one RxDMA transaction is 2 */</td></tr>
|
||
<tr class="separator:gaaf9bcd9870547bd6f454db6667ccdecb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf514499cdf6581fdcff5eaad5e6ab12f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf514499cdf6581fdcff5eaad5e6ab12f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4Beat</b>   ((uint32_t)0x00080000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */</td></tr>
|
||
<tr class="separator:gaf514499cdf6581fdcff5eaad5e6ab12f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad5b0089dafe1c8c2410127e93ea40681"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad5b0089dafe1c8c2410127e93ea40681"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_8Beat</b>   ((uint32_t)0x00100000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */</td></tr>
|
||
<tr class="separator:gad5b0089dafe1c8c2410127e93ea40681"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2ed1d26d7d55828eadcea86f774c5dd3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2ed1d26d7d55828eadcea86f774c5dd3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_16Beat</b>   ((uint32_t)0x00200000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */</td></tr>
|
||
<tr class="separator:ga2ed1d26d7d55828eadcea86f774c5dd3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3636f50cc2841e5a945f7e908420cbd5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3636f50cc2841e5a945f7e908420cbd5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_32Beat</b>   ((uint32_t)0x00400000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */</td></tr>
|
||
<tr class="separator:ga3636f50cc2841e5a945f7e908420cbd5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2a8ea3f877aaa74f8ea2d1a788ae3180"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a8ea3f877aaa74f8ea2d1a788ae3180"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_4Beat</b>   ((uint32_t)0x01020000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */</td></tr>
|
||
<tr class="separator:ga2a8ea3f877aaa74f8ea2d1a788ae3180"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f0258c404d957601ae069a77c82d39b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f0258c404d957601ae069a77c82d39b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_8Beat</b>   ((uint32_t)0x01040000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */</td></tr>
|
||
<tr class="separator:ga7f0258c404d957601ae069a77c82d39b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3ebf97fad14c750a087ed09210e42a1b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3ebf97fad14c750a087ed09210e42a1b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_16Beat</b>   ((uint32_t)0x01080000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */</td></tr>
|
||
<tr class="separator:ga3ebf97fad14c750a087ed09210e42a1b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf5e2d5606e920b57f303f032b0bad32b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf5e2d5606e920b57f303f032b0bad32b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_32Beat</b>   ((uint32_t)0x01100000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */</td></tr>
|
||
<tr class="separator:gaf5e2d5606e920b57f303f032b0bad32b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad1eab5835a2d15d943d5a8fbed274478"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad1eab5835a2d15d943d5a8fbed274478"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_64Beat</b>   ((uint32_t)0x01200000) /* maximum number of beats to be transferred in one RxDMA transaction is 64 */</td></tr>
|
||
<tr class="separator:gad1eab5835a2d15d943d5a8fbed274478"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5ea2c20d00d2428c5f6a8fe4d7ebb392"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5ea2c20d00d2428c5f6a8fe4d7ebb392"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RDP_4xPBL_128Beat</b>   ((uint32_t)0x01400000) /* maximum number of beats to be transferred in one RxDMA transaction is 128 */</td></tr>
|
||
<tr class="separator:ga5ea2c20d00d2428c5f6a8fe4d7ebb392"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga717f163fe72c7e1c999123160dde4143"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga717f163fe72c7e1c999123160dde4143"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_FB</b>   ((uint32_t)0x00010000) /* Fixed Burst */</td></tr>
|
||
<tr class="separator:ga717f163fe72c7e1c999123160dde4143"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae06b7c29931b088e66f13b055aaddcd6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae06b7c29931b088e66f13b055aaddcd6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RTPR</b>   ((uint32_t)0x0000C000) /* Rx Tx priority ratio */</td></tr>
|
||
<tr class="separator:gae06b7c29931b088e66f13b055aaddcd6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga478e7d5ec02db7237be51fa5b83b9e25"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga478e7d5ec02db7237be51fa5b83b9e25"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RTPR_1_1</b>   ((uint32_t)0x00000000) /* Rx Tx priority ratio */</td></tr>
|
||
<tr class="separator:ga478e7d5ec02db7237be51fa5b83b9e25"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1d9e5dda525076cc163bdc29f18e4055"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1d9e5dda525076cc163bdc29f18e4055"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RTPR_2_1</b>   ((uint32_t)0x00004000) /* Rx Tx priority ratio */</td></tr>
|
||
<tr class="separator:ga1d9e5dda525076cc163bdc29f18e4055"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf9e4fd353c5a9ecee3feb428eb54ce2b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf9e4fd353c5a9ecee3feb428eb54ce2b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RTPR_3_1</b>   ((uint32_t)0x00008000) /* Rx Tx priority ratio */</td></tr>
|
||
<tr class="separator:gaf9e4fd353c5a9ecee3feb428eb54ce2b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaad6d57a1f21bc958fa0cfab0cfed02b1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaad6d57a1f21bc958fa0cfab0cfed02b1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_RTPR_4_1</b>   ((uint32_t)0x0000C000) /* Rx Tx priority ratio */</td></tr>
|
||
<tr class="separator:gaad6d57a1f21bc958fa0cfab0cfed02b1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0e3daa2867b6d01e8eda765e77648599"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e3daa2867b6d01e8eda765e77648599"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL</b>   ((uint32_t)0x00003F00) /* Programmable burst length */</td></tr>
|
||
<tr class="separator:ga0e3daa2867b6d01e8eda765e77648599"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaefeb5f1c9376d0a0bc956aba567c7cb9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaefeb5f1c9376d0a0bc956aba567c7cb9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_1Beat</b>   ((uint32_t)0x00000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */</td></tr>
|
||
<tr class="separator:gaefeb5f1c9376d0a0bc956aba567c7cb9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3a034f8cf671cba686e882172ad93949"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3a034f8cf671cba686e882172ad93949"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_2Beat</b>   ((uint32_t)0x00000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */</td></tr>
|
||
<tr class="separator:ga3a034f8cf671cba686e882172ad93949"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga55ff9b7cebc3489fcaab886a065d372c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga55ff9b7cebc3489fcaab886a065d372c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4Beat</b>   ((uint32_t)0x00000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */</td></tr>
|
||
<tr class="separator:ga55ff9b7cebc3489fcaab886a065d372c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae920200ec813649824a20b434c1eecb5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae920200ec813649824a20b434c1eecb5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_8Beat</b>   ((uint32_t)0x00000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */</td></tr>
|
||
<tr class="separator:gae920200ec813649824a20b434c1eecb5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6351d1d02e94053527b8e18f393b1e82"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6351d1d02e94053527b8e18f393b1e82"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_16Beat</b>   ((uint32_t)0x00001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */</td></tr>
|
||
<tr class="separator:ga6351d1d02e94053527b8e18f393b1e82"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga82d8ee65c1583f4ec9092bc45563d720"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82d8ee65c1583f4ec9092bc45563d720"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_32Beat</b>   ((uint32_t)0x00002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */</td></tr>
|
||
<tr class="separator:ga82d8ee65c1583f4ec9092bc45563d720"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89566024f4f6772d59592f5bacc7828d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89566024f4f6772d59592f5bacc7828d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_4Beat</b>   ((uint32_t)0x01000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */</td></tr>
|
||
<tr class="separator:ga89566024f4f6772d59592f5bacc7828d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga33acf850c7d6f97899f69d76d87a3dd6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33acf850c7d6f97899f69d76d87a3dd6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_8Beat</b>   ((uint32_t)0x01000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */</td></tr>
|
||
<tr class="separator:ga33acf850c7d6f97899f69d76d87a3dd6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae5c68f3a0a692fbd81bac47bfe2340bb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae5c68f3a0a692fbd81bac47bfe2340bb"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_16Beat</b>   ((uint32_t)0x01000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */</td></tr>
|
||
<tr class="separator:gae5c68f3a0a692fbd81bac47bfe2340bb"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga21298fccc783e5c6d65b9d64960b4ca2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga21298fccc783e5c6d65b9d64960b4ca2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_32Beat</b>   ((uint32_t)0x01000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */</td></tr>
|
||
<tr class="separator:ga21298fccc783e5c6d65b9d64960b4ca2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40a789fc58356a8084c5f1eeba366de2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40a789fc58356a8084c5f1eeba366de2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_64Beat</b>   ((uint32_t)0x01001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */</td></tr>
|
||
<tr class="separator:ga40a789fc58356a8084c5f1eeba366de2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4c90887a852a858c630ac388bec0b392"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4c90887a852a858c630ac388bec0b392"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_PBL_4xPBL_128Beat</b>   ((uint32_t)0x01002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */</td></tr>
|
||
<tr class="separator:ga4c90887a852a858c630ac388bec0b392"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf04f1ef51af153093743c190d25ea21b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf04f1ef51af153093743c190d25ea21b"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_EDE</b>   ((uint32_t)0x00000080) /* Enhanced Descriptor Enable */</td></tr>
|
||
<tr class="separator:gaf04f1ef51af153093743c190d25ea21b"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab1931fd959cb78283ab0cf0bd9804387"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab1931fd959cb78283ab0cf0bd9804387"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_DSL</b>   ((uint32_t)0x0000007C) /* Descriptor Skip Length */</td></tr>
|
||
<tr class="separator:gab1931fd959cb78283ab0cf0bd9804387"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafd126734c36f2db46c51e73cef07afce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd126734c36f2db46c51e73cef07afce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_DA</b>   ((uint32_t)0x00000002) /* DMA arbitration scheme */</td></tr>
|
||
<tr class="separator:gafd126734c36f2db46c51e73cef07afce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e8dfe321aeaecaa87e290f4d6e710dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e8dfe321aeaecaa87e290f4d6e710dc"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMABMR_SR</b>   ((uint32_t)0x00000001) /* Software reset */</td></tr>
|
||
<tr class="separator:ga2e8dfe321aeaecaa87e290f4d6e710dc"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaef2d9dbefaa6940adf6422092fae2da6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaef2d9dbefaa6940adf6422092fae2da6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMATPDR_TPD</b>   ((uint32_t)0xFFFFFFFF) /* Transmit poll demand */</td></tr>
|
||
<tr class="separator:gaef2d9dbefaa6940adf6422092fae2da6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga83f1c5a5628c6e7dcd853e511eac49e8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga83f1c5a5628c6e7dcd853e511eac49e8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMARPDR_RPD</b>   ((uint32_t)0xFFFFFFFF) /* Receive poll demand */</td></tr>
|
||
<tr class="separator:ga83f1c5a5628c6e7dcd853e511eac49e8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga34e60ae1c7b80cf199c372b5e701b46e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34e60ae1c7b80cf199c372b5e701b46e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMARDLAR_SRL</b>   ((uint32_t)0xFFFFFFFF) /* Start of receive list */</td></tr>
|
||
<tr class="separator:ga34e60ae1c7b80cf199c372b5e701b46e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8f9f12964bc4e019afface14df2dc87c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8f9f12964bc4e019afface14df2dc87c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMATDLAR_STL</b>   ((uint32_t)0xFFFFFFFF) /* Start of transmit list */</td></tr>
|
||
<tr class="separator:ga8f9f12964bc4e019afface14df2dc87c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac55027d33ea49f5498f5c9a0dab629d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac55027d33ea49f5498f5c9a0dab629d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TSTS</b>   ((uint32_t)0x20000000) /* Time-stamp trigger status */</td></tr>
|
||
<tr class="separator:gac55027d33ea49f5498f5c9a0dab629d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4792ff5cd86cdea1edf34ea90448b34a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4792ff5cd86cdea1edf34ea90448b34a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_PMTS</b>   ((uint32_t)0x10000000) /* PMT status */</td></tr>
|
||
<tr class="separator:ga4792ff5cd86cdea1edf34ea90448b34a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2d6207fe0c8383456188e9bb1e2fb9fe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d6207fe0c8383456188e9bb1e2fb9fe"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_MMCS</b>   ((uint32_t)0x08000000) /* MMC status */</td></tr>
|
||
<tr class="separator:ga2d6207fe0c8383456188e9bb1e2fb9fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga098b5395babfd8474a75a5a2034c94f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga098b5395babfd8474a75a5a2034c94f2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_EBS</b>   ((uint32_t)0x03800000) /* Error bits status */</td></tr>
|
||
<tr class="separator:ga098b5395babfd8474a75a5a2034c94f2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga42e1dfda0e23a1ae10c0c05c405e5c73"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga42e1dfda0e23a1ae10c0c05c405e5c73"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_EBS_DescAccess</b>   ((uint32_t)0x02000000) /* Error bits 0-data buffer, 1-desc. access */</td></tr>
|
||
<tr class="separator:ga42e1dfda0e23a1ae10c0c05c405e5c73"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga315c68184fd0f0e510539dc8cd986393"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga315c68184fd0f0e510539dc8cd986393"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_EBS_ReadTransf</b>   ((uint32_t)0x01000000) /* Error bits 0-write trnsf, 1-read transfr */</td></tr>
|
||
<tr class="separator:ga315c68184fd0f0e510539dc8cd986393"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacd56804ed872078d962ef5f01dc295e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd56804ed872078d962ef5f01dc295e1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_EBS_DataTransfTx</b>   ((uint32_t)0x00800000) /* Error bits 0-Rx DMA, 1-Tx DMA */</td></tr>
|
||
<tr class="separator:gacd56804ed872078d962ef5f01dc295e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga806073adcecb9139b1c1d7ed35a4f37c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga806073adcecb9139b1c1d7ed35a4f37c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS</b>   ((uint32_t)0x00700000) /* Transmit process state */</td></tr>
|
||
<tr class="separator:ga806073adcecb9139b1c1d7ed35a4f37c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c0d4830c8196127e9b26178b23b6f3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c0d4830c8196127e9b26178b23b6f3e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Stopped</b>   ((uint32_t)0x00000000) /* Stopped - Reset or Stop Tx Command issued */</td></tr>
|
||
<tr class="separator:ga0c0d4830c8196127e9b26178b23b6f3e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gadd9af883f17d4bbbdde6866ecf67afe2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadd9af883f17d4bbbdde6866ecf67afe2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Fetching</b>   ((uint32_t)0x00100000) /* Running - fetching the Tx descriptor */</td></tr>
|
||
<tr class="separator:gadd9af883f17d4bbbdde6866ecf67afe2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga351ab7003c342ab1b43f9fd158fdc00d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga351ab7003c342ab1b43f9fd158fdc00d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Waiting</b>   ((uint32_t)0x00200000) /* Running - waiting for status */</td></tr>
|
||
<tr class="separator:ga351ab7003c342ab1b43f9fd158fdc00d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga72af54920faf4b54e760c3784dccaf65"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga72af54920faf4b54e760c3784dccaf65"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Reading</b>   ((uint32_t)0x00300000) /* Running - reading the data from host memory */</td></tr>
|
||
<tr class="separator:ga72af54920faf4b54e760c3784dccaf65"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga80b3558db79b5903dd3966ceed7bb1e8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga80b3558db79b5903dd3966ceed7bb1e8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Suspended</b>   ((uint32_t)0x00600000) /* Suspended - Tx Descriptor unavailabe */</td></tr>
|
||
<tr class="separator:ga80b3558db79b5903dd3966ceed7bb1e8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf6e95d2a805ec4d8e50de467825c86e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6e95d2a805ec4d8e50de467825c86e0"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPS_Closing</b>   ((uint32_t)0x00700000) /* Running - closing Rx descriptor */</td></tr>
|
||
<tr class="separator:gaf6e95d2a805ec4d8e50de467825c86e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae773175991a44530bcd26057a7b3819e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae773175991a44530bcd26057a7b3819e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS</b>   ((uint32_t)0x000E0000) /* Receive process state */</td></tr>
|
||
<tr class="separator:gae773175991a44530bcd26057a7b3819e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6a2dfc943902722a1bce1d0a24125e45"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a2dfc943902722a1bce1d0a24125e45"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Stopped</b>   ((uint32_t)0x00000000) /* Stopped - Reset or Stop Rx Command issued */</td></tr>
|
||
<tr class="separator:ga6a2dfc943902722a1bce1d0a24125e45"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92a04f8a6f4c047967d38e4fd3f4bbb9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92a04f8a6f4c047967d38e4fd3f4bbb9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Fetching</b>   ((uint32_t)0x00020000) /* Running - fetching the Rx descriptor */</td></tr>
|
||
<tr class="separator:ga92a04f8a6f4c047967d38e4fd3f4bbb9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5440bd06e487e3ca5d64afebc8b48bac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5440bd06e487e3ca5d64afebc8b48bac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Waiting</b>   ((uint32_t)0x00060000) /* Running - waiting for packet */</td></tr>
|
||
<tr class="separator:ga5440bd06e487e3ca5d64afebc8b48bac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad5e1406af058b582a7f60f8415edde15"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad5e1406af058b582a7f60f8415edde15"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Suspended</b>   ((uint32_t)0x00080000) /* Suspended - Rx Descriptor unavailable */</td></tr>
|
||
<tr class="separator:gad5e1406af058b582a7f60f8415edde15"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0976a4ba0b8dcbe42fdef38a8589fda8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0976a4ba0b8dcbe42fdef38a8589fda8"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Closing</b>   ((uint32_t)0x000A0000) /* Running - closing descriptor */</td></tr>
|
||
<tr class="separator:ga0976a4ba0b8dcbe42fdef38a8589fda8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae6aaf0193e4f15e2937cb18586567e43"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae6aaf0193e4f15e2937cb18586567e43"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPS_Queuing</b>   ((uint32_t)0x000E0000) /* Running - queuing the recieve frame into host memory */</td></tr>
|
||
<tr class="separator:gae6aaf0193e4f15e2937cb18586567e43"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad8585a6af3197e49831882373410d94c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad8585a6af3197e49831882373410d94c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_NIS</b>   ((uint32_t)0x00010000) /* Normal interrupt summary */</td></tr>
|
||
<tr class="separator:gad8585a6af3197e49831882373410d94c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1cb15b33a997bec75b9c8750231ee411"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1cb15b33a997bec75b9c8750231ee411"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_AIS</b>   ((uint32_t)0x00008000) /* Abnormal interrupt summary */</td></tr>
|
||
<tr class="separator:ga1cb15b33a997bec75b9c8750231ee411"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga899d94d62f011fc56aa5814e528055f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga899d94d62f011fc56aa5814e528055f7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_ERS</b>   ((uint32_t)0x00004000) /* Early receive status */</td></tr>
|
||
<tr class="separator:ga899d94d62f011fc56aa5814e528055f7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab28c0a99d8d2ff948096d06b6dfdab9c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab28c0a99d8d2ff948096d06b6dfdab9c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_FBES</b>   ((uint32_t)0x00002000) /* Fatal bus error status */</td></tr>
|
||
<tr class="separator:gab28c0a99d8d2ff948096d06b6dfdab9c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacb828d827c627f704a53dc486cec821c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacb828d827c627f704a53dc486cec821c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_ETS</b>   ((uint32_t)0x00000400) /* Early transmit status */</td></tr>
|
||
<tr class="separator:gacb828d827c627f704a53dc486cec821c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3ce8d0c087f96b2b5c3e1db45cd1ecf5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3ce8d0c087f96b2b5c3e1db45cd1ecf5"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RWTS</b>   ((uint32_t)0x00000200) /* Receive watchdog timeout status */</td></tr>
|
||
<tr class="separator:ga3ce8d0c087f96b2b5c3e1db45cd1ecf5"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga70de31c814e36b7bb2b752e7b62bf840"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga70de31c814e36b7bb2b752e7b62bf840"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RPSS</b>   ((uint32_t)0x00000100) /* Receive process stopped status */</td></tr>
|
||
<tr class="separator:ga70de31c814e36b7bb2b752e7b62bf840"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5569311c70d6ededf186d9a8af19d884"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5569311c70d6ededf186d9a8af19d884"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RBUS</b>   ((uint32_t)0x00000080) /* Receive buffer unavailable status */</td></tr>
|
||
<tr class="separator:ga5569311c70d6ededf186d9a8af19d884"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga40f33df77007eab0110e1ffef365a2df"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40f33df77007eab0110e1ffef365a2df"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_RS</b>   ((uint32_t)0x00000040) /* Receive status */</td></tr>
|
||
<tr class="separator:ga40f33df77007eab0110e1ffef365a2df"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf2597865c464586829cec4f8d26fb1f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2597865c464586829cec4f8d26fb1f1"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TUS</b>   ((uint32_t)0x00000020) /* Transmit underflow status */</td></tr>
|
||
<tr class="separator:gaf2597865c464586829cec4f8d26fb1f1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c2f1e3cb729230b1099026b6a53b867"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c2f1e3cb729230b1099026b6a53b867"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_ROS</b>   ((uint32_t)0x00000010) /* Receive overflow status */</td></tr>
|
||
<tr class="separator:ga0c2f1e3cb729230b1099026b6a53b867"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8c543637a7e9669b8bdb12265b5ff448"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8c543637a7e9669b8bdb12265b5ff448"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TJTS</b>   ((uint32_t)0x00000008) /* Transmit jabber timeout status */</td></tr>
|
||
<tr class="separator:ga8c543637a7e9669b8bdb12265b5ff448"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga26668ea80a2d794d72c0a441aa73d0d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga26668ea80a2d794d72c0a441aa73d0d7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TBUS</b>   ((uint32_t)0x00000004) /* Transmit buffer unavailable status */</td></tr>
|
||
<tr class="separator:ga26668ea80a2d794d72c0a441aa73d0d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad48c871e98a7794ce6cd8294baee114a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad48c871e98a7794ce6cd8294baee114a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TPSS</b>   ((uint32_t)0x00000002) /* Transmit process stopped status */</td></tr>
|
||
<tr class="separator:gad48c871e98a7794ce6cd8294baee114a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9aa47191609cba66df647cb7e8e10974"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9aa47191609cba66df647cb7e8e10974"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMASR_TS</b>   ((uint32_t)0x00000001) /* Transmit status */</td></tr>
|
||
<tr class="separator:ga9aa47191609cba66df647cb7e8e10974"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gade93bfc37c0b1fc371b2fa1278ee7dfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gade93bfc37c0b1fc371b2fa1278ee7dfd"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_DTCEFD</b>   ((uint32_t)0x04000000) /* Disable Dropping of TCP/IP checksum error frames */</td></tr>
|
||
<tr class="separator:gade93bfc37c0b1fc371b2fa1278ee7dfd"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7132ff722841d431f9c6d3fc7e0c8912"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7132ff722841d431f9c6d3fc7e0c8912"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RSF</b>   ((uint32_t)0x02000000) /* Receive store and forward */</td></tr>
|
||
<tr class="separator:ga7132ff722841d431f9c6d3fc7e0c8912"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga61cfaa51bb7973e7e3c4fd6d549c88b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga61cfaa51bb7973e7e3c4fd6d549c88b2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_DFRF</b>   ((uint32_t)0x01000000) /* Disable flushing of received frames */</td></tr>
|
||
<tr class="separator:ga61cfaa51bb7973e7e3c4fd6d549c88b2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga600b35b875335358746524e5f6760613"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga600b35b875335358746524e5f6760613"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TSF</b>   ((uint32_t)0x00200000) /* Transmit store and forward */</td></tr>
|
||
<tr class="separator:ga600b35b875335358746524e5f6760613"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6ba6031456a00e99638005b7af823a49"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6ba6031456a00e99638005b7af823a49"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_FTF</b>   ((uint32_t)0x00100000) /* Flush transmit FIFO */</td></tr>
|
||
<tr class="separator:ga6ba6031456a00e99638005b7af823a49"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8af2f55493df254efed28cad7fb72651"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8af2f55493df254efed28cad7fb72651"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC</b>   ((uint32_t)0x0001C000) /* Transmit threshold control */</td></tr>
|
||
<tr class="separator:ga8af2f55493df254efed28cad7fb72651"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaca0372554b5b8c2b816071ced929b30f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaca0372554b5b8c2b816071ced929b30f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_64Bytes</b>   ((uint32_t)0x00000000) /* threshold level of the MTL Transmit FIFO is 64 Bytes */</td></tr>
|
||
<tr class="separator:gaca0372554b5b8c2b816071ced929b30f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0a0af7e5f2074a30e33e4845b1c72155"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0a0af7e5f2074a30e33e4845b1c72155"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_128Bytes</b>   ((uint32_t)0x00004000) /* threshold level of the MTL Transmit FIFO is 128 Bytes */</td></tr>
|
||
<tr class="separator:ga0a0af7e5f2074a30e33e4845b1c72155"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a29aa54f61418b0086bef0d8c9a4868"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a29aa54f61418b0086bef0d8c9a4868"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_192Bytes</b>   ((uint32_t)0x00008000) /* threshold level of the MTL Transmit FIFO is 192 Bytes */</td></tr>
|
||
<tr class="separator:ga4a29aa54f61418b0086bef0d8c9a4868"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9d703eb56388097660839c0dbb2dcf4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae9d703eb56388097660839c0dbb2dcf4"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_256Bytes</b>   ((uint32_t)0x0000C000) /* threshold level of the MTL Transmit FIFO is 256 Bytes */</td></tr>
|
||
<tr class="separator:gae9d703eb56388097660839c0dbb2dcf4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac6c6cd2f59e4f784ef22ca7873bcafe6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac6c6cd2f59e4f784ef22ca7873bcafe6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_40Bytes</b>   ((uint32_t)0x00010000) /* threshold level of the MTL Transmit FIFO is 40 Bytes */</td></tr>
|
||
<tr class="separator:gac6c6cd2f59e4f784ef22ca7873bcafe6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3e74522b40a38dbc62dca1cc87f7b13f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3e74522b40a38dbc62dca1cc87f7b13f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_32Bytes</b>   ((uint32_t)0x00014000) /* threshold level of the MTL Transmit FIFO is 32 Bytes */</td></tr>
|
||
<tr class="separator:ga3e74522b40a38dbc62dca1cc87f7b13f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac2e990a61fd2ca6d1f5d9e0fddfc1a76"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2e990a61fd2ca6d1f5d9e0fddfc1a76"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_24Bytes</b>   ((uint32_t)0x00018000) /* threshold level of the MTL Transmit FIFO is 24 Bytes */</td></tr>
|
||
<tr class="separator:gac2e990a61fd2ca6d1f5d9e0fddfc1a76"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6c21df36ca8ecb3c2d016cd4c683aded"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6c21df36ca8ecb3c2d016cd4c683aded"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_TTC_16Bytes</b>   ((uint32_t)0x0001C000) /* threshold level of the MTL Transmit FIFO is 16 Bytes */</td></tr>
|
||
<tr class="separator:ga6c21df36ca8ecb3c2d016cd4c683aded"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5f15d70215b151c4c151b7b8475939ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5f15d70215b151c4c151b7b8475939ce"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_ST</b>   ((uint32_t)0x00002000) /* Start/stop transmission command */</td></tr>
|
||
<tr class="separator:ga5f15d70215b151c4c151b7b8475939ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ff2d7be55ac4e29a18d8490012d8d8f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9ff2d7be55ac4e29a18d8490012d8d8f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_FEF</b>   ((uint32_t)0x00000080) /* Forward error frames */</td></tr>
|
||
<tr class="separator:ga9ff2d7be55ac4e29a18d8490012d8d8f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad7fb0b48ffa17fb3c37e730e63790b95"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7fb0b48ffa17fb3c37e730e63790b95"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_FUGF</b>   ((uint32_t)0x00000040) /* Forward undersized good frames */</td></tr>
|
||
<tr class="separator:gad7fb0b48ffa17fb3c37e730e63790b95"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga00653932f863ff8c73752e4dea63283d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga00653932f863ff8c73752e4dea63283d"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RTC</b>   ((uint32_t)0x00000018) /* receive threshold control */</td></tr>
|
||
<tr class="separator:ga00653932f863ff8c73752e4dea63283d"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga29ec3c609bf796437bb50879be53974e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga29ec3c609bf796437bb50879be53974e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RTC_64Bytes</b>   ((uint32_t)0x00000000) /* threshold level of the MTL Receive FIFO is 64 Bytes */</td></tr>
|
||
<tr class="separator:ga29ec3c609bf796437bb50879be53974e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6f4f5e1950abb65d6ed23e30994b7a26"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6f4f5e1950abb65d6ed23e30994b7a26"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RTC_32Bytes</b>   ((uint32_t)0x00000008) /* threshold level of the MTL Receive FIFO is 32 Bytes */</td></tr>
|
||
<tr class="separator:ga6f4f5e1950abb65d6ed23e30994b7a26"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf73706fb0cf9a03909a55e3bcd19c75c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf73706fb0cf9a03909a55e3bcd19c75c"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RTC_96Bytes</b>   ((uint32_t)0x00000010) /* threshold level of the MTL Receive FIFO is 96 Bytes */</td></tr>
|
||
<tr class="separator:gaf73706fb0cf9a03909a55e3bcd19c75c"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab7099f07f7c61fdc118cebe38db796e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7099f07f7c61fdc118cebe38db796e9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_RTC_128Bytes</b>   ((uint32_t)0x00000018) /* threshold level of the MTL Receive FIFO is 128 Bytes */</td></tr>
|
||
<tr class="separator:gab7099f07f7c61fdc118cebe38db796e9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga6a9e1270eefa558420deba526b7cd2c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a9e1270eefa558420deba526b7cd2c2"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_OSF</b>   ((uint32_t)0x00000004) /* operate on second frame */</td></tr>
|
||
<tr class="separator:ga6a9e1270eefa558420deba526b7cd2c2"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaf08aaa0c916bb56d2e4e71fdf0f034da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf08aaa0c916bb56d2e4e71fdf0f034da"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAOMR_SR</b>   ((uint32_t)0x00000002) /* Start/stop receive */</td></tr>
|
||
<tr class="separator:gaf08aaa0c916bb56d2e4e71fdf0f034da"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3c12b833cb206d8bafa7d60faebea805"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c12b833cb206d8bafa7d60faebea805"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_NISE</b>   ((uint32_t)0x00010000) /* Normal interrupt summary enable */</td></tr>
|
||
<tr class="separator:ga3c12b833cb206d8bafa7d60faebea805"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7ae9340fa928abb4664efbb5c8478756"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7ae9340fa928abb4664efbb5c8478756"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_AISE</b>   ((uint32_t)0x00008000) /* Abnormal interrupt summary enable */</td></tr>
|
||
<tr class="separator:ga7ae9340fa928abb4664efbb5c8478756"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4fe43c4432e0505a5509424665692807"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4fe43c4432e0505a5509424665692807"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_ERIE</b>   ((uint32_t)0x00004000) /* Early receive interrupt enable */</td></tr>
|
||
<tr class="separator:ga4fe43c4432e0505a5509424665692807"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92e94d1d37660b7cca9306ac020b4110"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92e94d1d37660b7cca9306ac020b4110"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_FBEIE</b>   ((uint32_t)0x00002000) /* Fatal bus error interrupt enable */</td></tr>
|
||
<tr class="separator:ga92e94d1d37660b7cca9306ac020b4110"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b1c57b5102ca78372420b45a707b43e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5b1c57b5102ca78372420b45a707b43e"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_ETIE</b>   ((uint32_t)0x00000400) /* Early transmit interrupt enable */</td></tr>
|
||
<tr class="separator:ga5b1c57b5102ca78372420b45a707b43e"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa28e115ada97b2e6d793f9d542f93e35"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa28e115ada97b2e6d793f9d542f93e35"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_RWTIE</b>   ((uint32_t)0x00000200) /* Receive watchdog timeout interrupt enable */</td></tr>
|
||
<tr class="separator:gaa28e115ada97b2e6d793f9d542f93e35"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafcfba49acf14e8a0194e1fef8b1837f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafcfba49acf14e8a0194e1fef8b1837f7"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_RPSIE</b>   ((uint32_t)0x00000100) /* Receive process stopped interrupt enable */</td></tr>
|
||
<tr class="separator:gafcfba49acf14e8a0194e1fef8b1837f7"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga0c349d0b4aa329d39fcfd10d59de7b26"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0c349d0b4aa329d39fcfd10d59de7b26"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_RBUIE</b>   ((uint32_t)0x00000080) /* Receive buffer unavailable interrupt enable */</td></tr>
|
||
<tr class="separator:ga0c349d0b4aa329d39fcfd10d59de7b26"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4bce67fd8ee3363c1ab95b9f5324f745"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4bce67fd8ee3363c1ab95b9f5324f745"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_RIE</b>   ((uint32_t)0x00000040) /* Receive interrupt enable */</td></tr>
|
||
<tr class="separator:ga4bce67fd8ee3363c1ab95b9f5324f745"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga91a59aa3adff595051bdda2da948ec71"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga91a59aa3adff595051bdda2da948ec71"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_TUIE</b>   ((uint32_t)0x00000020) /* Transmit Underflow interrupt enable */</td></tr>
|
||
<tr class="separator:ga91a59aa3adff595051bdda2da948ec71"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab3cdf8611ab9a0a7f4fc0e0090a33ba6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab3cdf8611ab9a0a7f4fc0e0090a33ba6"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_ROIE</b>   ((uint32_t)0x00000010) /* Receive Overflow interrupt enable */</td></tr>
|
||
<tr class="separator:gab3cdf8611ab9a0a7f4fc0e0090a33ba6"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7a9cd48115f0b32941ee3087e9c60ec9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7a9cd48115f0b32941ee3087e9c60ec9"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_TJTIE</b>   ((uint32_t)0x00000008) /* Transmit jabber timeout interrupt enable */</td></tr>
|
||
<tr class="separator:ga7a9cd48115f0b32941ee3087e9c60ec9"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga37fc5c9c473407d77a379d7032147b59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga37fc5c9c473407d77a379d7032147b59"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_TBUIE</b>   ((uint32_t)0x00000004) /* Transmit buffer unavailable interrupt enable */</td></tr>
|
||
<tr class="separator:ga37fc5c9c473407d77a379d7032147b59"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3d4b2c3e0d50326adf0e8b3955aa9972"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3d4b2c3e0d50326adf0e8b3955aa9972"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_TPSIE</b>   ((uint32_t)0x00000002) /* Transmit process stopped interrupt enable */</td></tr>
|
||
<tr class="separator:ga3d4b2c3e0d50326adf0e8b3955aa9972"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga1a19f069ddf349de788130cefdbc4149"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1a19f069ddf349de788130cefdbc4149"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAIER_TIE</b>   ((uint32_t)0x00000001) /* Transmit interrupt enable */</td></tr>
|
||
<tr class="separator:ga1a19f069ddf349de788130cefdbc4149"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga3793f0a194ff3a19a1559824a821fe61"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3793f0a194ff3a19a1559824a821fe61"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAMFBOCR_OFOC</b>   ((uint32_t)0x10000000) /* Overflow bit for FIFO overflow counter */</td></tr>
|
||
<tr class="separator:ga3793f0a194ff3a19a1559824a821fe61"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9595307f4b9d38f6e0991fa54c4bae8f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9595307f4b9d38f6e0991fa54c4bae8f"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAMFBOCR_MFA</b>   ((uint32_t)0x0FFE0000) /* Number of frames missed by the application */</td></tr>
|
||
<tr class="separator:ga9595307f4b9d38f6e0991fa54c4bae8f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9ffc962868d2b5ed265e7bffd6881aab"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9ffc962868d2b5ed265e7bffd6881aab"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAMFBOCR_OMFC</b>   ((uint32_t)0x00010000) /* Overflow bit for missed frame counter */</td></tr>
|
||
<tr class="separator:ga9ffc962868d2b5ed265e7bffd6881aab"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga81aa193a52d5b3757a008b84eb0c6182"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81aa193a52d5b3757a008b84eb0c6182"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMAMFBOCR_MFC</b>   ((uint32_t)0x0000FFFF) /* Number of frames missed by the controller */</td></tr>
|
||
<tr class="separator:ga81aa193a52d5b3757a008b84eb0c6182"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae013d158ee1e13f61069722eff4d52ac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae013d158ee1e13f61069722eff4d52ac"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMACHTDR_HTDAP</b>   ((uint32_t)0xFFFFFFFF) /* Host transmit descriptor address pointer */</td></tr>
|
||
<tr class="separator:gae013d158ee1e13f61069722eff4d52ac"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gacb91f0f377b2bb0bfffe7df0ad46c7d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacb91f0f377b2bb0bfffe7df0ad46c7d3"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMACHRDR_HRDAP</b>   ((uint32_t)0xFFFFFFFF) /* Host receive descriptor address pointer */</td></tr>
|
||
<tr class="separator:gacb91f0f377b2bb0bfffe7df0ad46c7d3"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gad3524cdddc8525fe50c6754029011e12"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3524cdddc8525fe50c6754029011e12"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMACHTBAR_HTBAP</b>   ((uint32_t)0xFFFFFFFF) /* Host transmit buffer address pointer */</td></tr>
|
||
<tr class="separator:gad3524cdddc8525fe50c6754029011e12"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1cf1a9ed443f3498b67c658d26468212"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1cf1a9ed443f3498b67c658d26468212"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>ETH_DMACHRBAR_HRBAP</b>   ((uint32_t)0xFFFFFFFF) /* Host receive buffer address pointer */</td></tr>
|
||
<tr class="separator:ga1cf1a9ed443f3498b67c658d26468212"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga26474f43799fbade9cf300e21dd3a91a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga26474f43799fbade9cf300e21dd3a91a"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>SET_BIT</b>(REG, BIT)   ((REG) |= (BIT))</td></tr>
|
||
<tr class="separator:ga26474f43799fbade9cf300e21dd3a91a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga133aae6fc0d41bffab39ab223a7001de"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga133aae6fc0d41bffab39ab223a7001de"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CLEAR_BIT</b>(REG, BIT)   ((REG) &= ~(BIT))</td></tr>
|
||
<tr class="separator:ga133aae6fc0d41bffab39ab223a7001de"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga822bb1bb9710d5f2fa6396b84e583c33"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga822bb1bb9710d5f2fa6396b84e583c33"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>READ_BIT</b>(REG, BIT)   ((REG) & (BIT))</td></tr>
|
||
<tr class="separator:ga822bb1bb9710d5f2fa6396b84e583c33"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga1378fbdda39f40b85420df55f41460ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1378fbdda39f40b85420df55f41460ef"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>CLEAR_REG</b>(REG)   ((REG) = (0x0))</td></tr>
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||
<tr class="separator:ga1378fbdda39f40b85420df55f41460ef"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga32f78bffcaf6d13023dcd7f05e0c4d57"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga32f78bffcaf6d13023dcd7f05e0c4d57"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>WRITE_REG</b>(REG, VAL)   ((REG) = (VAL))</td></tr>
|
||
<tr class="separator:ga32f78bffcaf6d13023dcd7f05e0c4d57"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gae7f188a4d26c9e713a48414783421071"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae7f188a4d26c9e713a48414783421071"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>READ_REG</b>(REG)   ((REG))</td></tr>
|
||
<tr class="separator:gae7f188a4d26c9e713a48414783421071"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga6553c99f510c3bab8cc0a91602053247"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6553c99f510c3bab8cc0a91602053247"></a>
|
||
#define </td><td class="memItemRight" valign="bottom"><b>MODIFY_REG</b>(REG, CLEARMASK, SETMASK)   WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))</td></tr>
|
||
<tr class="separator:ga6553c99f510c3bab8cc0a91602053247"><td class="memSeparator" colspan="2"> </td></tr>
|
||
</table><table class="memberdecls">
|
||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
|
||
Typedefs</h2></td></tr>
|
||
<tr class="memitem:gac3af4a32370fb28c4ade8bf2add80251"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac3af4a32370fb28c4ade8bf2add80251"></a>
|
||
typedef enum <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#ga666eb0caeb12ec0e281415592ae89083">IRQn</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gac3af4a32370fb28c4ade8bf2add80251">IRQn_Type</a></td></tr>
|
||
<tr class="memdesc:gac3af4a32370fb28c4ade8bf2add80251"><td class="mdescLeft"> </td><td class="mdescRight">STM32F4XX Interrupt Number Definition, according to the selected device in <a class="el" href="group___library__configuration__section.html">Library_configuration_section</a>. <br /></td></tr>
|
||
<tr class="separator:gac3af4a32370fb28c4ade8bf2add80251"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gae9b1af5c037e57a98884758875d3a7c4"><td class="memItemLeft" align="right" valign="top">typedef int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gae9b1af5c037e57a98884758875d3a7c4">s32</a></td></tr>
|
||
<tr class="separator:gae9b1af5c037e57a98884758875d3a7c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaa980e2c02ba2305e0f489d5650655425"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa980e2c02ba2305e0f489d5650655425"></a>
|
||
typedef int16_t </td><td class="memItemRight" valign="bottom"><b>s16</b></td></tr>
|
||
<tr class="separator:gaa980e2c02ba2305e0f489d5650655425"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga9e382f207c65ca13ab4ae98363aeda80"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e382f207c65ca13ab4ae98363aeda80"></a>
|
||
typedef int8_t </td><td class="memItemRight" valign="bottom"><b>s8</b></td></tr>
|
||
<tr class="separator:ga9e382f207c65ca13ab4ae98363aeda80"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gad97679599f3791409523fdb1c6156a28"><td class="memItemLeft" align="right" valign="top">typedef const int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gad97679599f3791409523fdb1c6156a28">sc32</a></td></tr>
|
||
<tr class="separator:gad97679599f3791409523fdb1c6156a28"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga66ab742a0751bb4e7661b8e874f2ddda"><td class="memItemLeft" align="right" valign="top">typedef const int16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga66ab742a0751bb4e7661b8e874f2ddda">sc16</a></td></tr>
|
||
<tr class="separator:ga66ab742a0751bb4e7661b8e874f2ddda"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga30e6c0f6718e1b6d26dc9d94ddcf9d11"><td class="memItemLeft" align="right" valign="top">typedef const int8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga30e6c0f6718e1b6d26dc9d94ddcf9d11">sc8</a></td></tr>
|
||
<tr class="separator:ga30e6c0f6718e1b6d26dc9d94ddcf9d11"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga476e2cb441f8e689433350ae2eeee510"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga476e2cb441f8e689433350ae2eeee510"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> int32_t </td><td class="memItemRight" valign="bottom"><b>vs32</b></td></tr>
|
||
<tr class="separator:ga476e2cb441f8e689433350ae2eeee510"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga19c9450d60abff7c6d3d35f31c10f83e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga19c9450d60abff7c6d3d35f31c10f83e"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> int16_t </td><td class="memItemRight" valign="bottom"><b>vs16</b></td></tr>
|
||
<tr class="separator:ga19c9450d60abff7c6d3d35f31c10f83e"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga9e5a203f00d2906af9466f68b4e72277"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e5a203f00d2906af9466f68b4e72277"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> int8_t </td><td class="memItemRight" valign="bottom"><b>vs8</b></td></tr>
|
||
<tr class="separator:ga9e5a203f00d2906af9466f68b4e72277"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaec1d22666cf030b79051e5daa372fbc8"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gaec1d22666cf030b79051e5daa372fbc8">vsc32</a></td></tr>
|
||
<tr class="separator:gaec1d22666cf030b79051e5daa372fbc8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga369ae0177b957e5afa7c1e62312f97c3"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> int16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga369ae0177b957e5afa7c1e62312f97c3">vsc16</a></td></tr>
|
||
<tr class="separator:ga369ae0177b957e5afa7c1e62312f97c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga47463bcded079ac61d5da46aff497803"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> int8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga47463bcded079ac61d5da46aff497803">vsc8</a></td></tr>
|
||
<tr class="separator:ga47463bcded079ac61d5da46aff497803"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gafaa62991928fb9fb18ff0db62a040aba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafaa62991928fb9fb18ff0db62a040aba"></a>
|
||
typedef uint32_t </td><td class="memItemRight" valign="bottom"><b>u32</b></td></tr>
|
||
<tr class="separator:gafaa62991928fb9fb18ff0db62a040aba"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gace9d960e74685e2cd84b36132dbbf8aa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gace9d960e74685e2cd84b36132dbbf8aa"></a>
|
||
typedef uint16_t </td><td class="memItemRight" valign="bottom"><b>u16</b></td></tr>
|
||
<tr class="separator:gace9d960e74685e2cd84b36132dbbf8aa"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga92c50087ca0e64fa93fc59402c55f8ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga92c50087ca0e64fa93fc59402c55f8ca"></a>
|
||
typedef uint8_t </td><td class="memItemRight" valign="bottom"><b>u8</b></td></tr>
|
||
<tr class="separator:ga92c50087ca0e64fa93fc59402c55f8ca"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga5b628e6a05856ff67e535fa391a57683"><td class="memItemLeft" align="right" valign="top">typedef const uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga5b628e6a05856ff67e535fa391a57683">uc32</a></td></tr>
|
||
<tr class="separator:ga5b628e6a05856ff67e535fa391a57683"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gabc715ea3779494b5a4f53173a397f7cb"><td class="memItemLeft" align="right" valign="top">typedef const uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gabc715ea3779494b5a4f53173a397f7cb">uc16</a></td></tr>
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||
<tr class="separator:gabc715ea3779494b5a4f53173a397f7cb"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:gac74022c74a461f810e0d4fdc9bfea480"><td class="memItemLeft" align="right" valign="top">typedef const uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gac74022c74a461f810e0d4fdc9bfea480">uc8</a></td></tr>
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||
<tr class="separator:gac74022c74a461f810e0d4fdc9bfea480"><td class="memSeparator" colspan="2"> </td></tr>
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||
<tr class="memitem:ga0cd21c4793673b69ecd5fd673353a145"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0cd21c4793673b69ecd5fd673353a145"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t </td><td class="memItemRight" valign="bottom"><b>vu32</b></td></tr>
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||
<tr class="separator:ga0cd21c4793673b69ecd5fd673353a145"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga93d1a6b3dcfdded10a7b15548679fe0a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga93d1a6b3dcfdded10a7b15548679fe0a"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t </td><td class="memItemRight" valign="bottom"><b>vu16</b></td></tr>
|
||
<tr class="separator:ga93d1a6b3dcfdded10a7b15548679fe0a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga4a8fa9a2b4796540a6d65a04eb18e111"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a8fa9a2b4796540a6d65a04eb18e111"></a>
|
||
typedef <a class="el" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t </td><td class="memItemRight" valign="bottom"><b>vu8</b></td></tr>
|
||
<tr class="separator:ga4a8fa9a2b4796540a6d65a04eb18e111"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga2e08e321a35a55e72c5b3a507e76371f"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga2e08e321a35a55e72c5b3a507e76371f">vuc32</a></td></tr>
|
||
<tr class="separator:ga2e08e321a35a55e72c5b3a507e76371f"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga7f6037565f0caa27727c8b871daf0d56"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#ga7f6037565f0caa27727c8b871daf0d56">vuc16</a></td></tr>
|
||
<tr class="separator:ga7f6037565f0caa27727c8b871daf0d56"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gab0ec90ac9b2c5864755998c8d37c264a"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a> uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___exported__types.html#gab0ec90ac9b2c5864755998c8d37c264a">vuc8</a></td></tr>
|
||
<tr class="separator:gab0ec90ac9b2c5864755998c8d37c264a"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gaacbd7ed539db0aacd973a0f6eca34074"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaacbd7ed539db0aacd973a0f6eca34074"></a>
|
||
typedef enum FlagStatus </td><td class="memItemRight" valign="bottom"><b>ITStatus</b></td></tr>
|
||
<tr class="separator:gaacbd7ed539db0aacd973a0f6eca34074"><td class="memSeparator" colspan="2"> </td></tr>
|
||
</table><table class="memberdecls">
|
||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
|
||
Enumerations</h2></td></tr>
|
||
<tr class="memitem:ga666eb0caeb12ec0e281415592ae89083"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group___configuration__section__for___c_m_s_i_s.html#ga666eb0caeb12ec0e281415592ae89083">IRQn</a> { <br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a> = -14,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a33ff1cf7098de65d61b6354fee6cd5aa">MemoryManagement_IRQn</a> = -12,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a8693500eff174f16119e96234fee73af">BusFault_IRQn</a> = -11,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a6895237c9443601ac832efa635dd8bbf">UsageFault_IRQn</a> = -10,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a> = -5,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a8e033fcef7aed98a31c60a7de206722c">DebugMonitor_IRQn</a> = -4,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a> = -2,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a> = -1,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a971089d7566ef902dfa0c80ac3a8fd52">WWDG_IRQn</a> = 0,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab0b51ffcc4dcf5661141b79c8e5bd924">PVD_IRQn</a> = 1,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ac127cca7ae48bcf93924209f04e5e5a1">TAMP_STAMP_IRQn</a> = 2,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a173ccc3f31df1f7e43de2ddeab3d1777">RTC_WKUP_IRQn</a> = 3,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a91b73963ce243a1d031576d49e137fab">FLASH_IRQn</a> = 4,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a5710b22392997bac63daa5c999730f77">RCC_IRQn</a> = 5,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab6aa6f87d26bbc6cf99b067b8d75c2f7">EXTI0_IRQn</a> = 6,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ae4badcdecdb94eb10129c4c0577c5e19">EXTI1_IRQn</a> = 7,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a082cb3f7839069a0715fd76c7eacbbc9">EXTI2_IRQn</a> = 8,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083add889c84ba5de466ced209069e05d602">EXTI3_IRQn</a> = 9,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab70a40106ca4486770df5d2072d9ac0e">EXTI4_IRQn</a> = 10,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a9ee33e72512c4cfb301b216f4fb9d68c">DMA1_Stream0_IRQn</a> = 11,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa45ca2c955060e2c2a7cbbe1d6753285">DMA1_Stream1_IRQn</a> = 12,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a0d9ec75e4478e70235b705d5a6b3efd8">DMA1_Stream2_IRQn</a> = 13,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083af77770e080206a7558decf09344fb2e2">DMA1_Stream3_IRQn</a> = 14,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aee2aaf365c6c297a63cee41ecae2301a">DMA1_Stream4_IRQn</a> = 15,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ac92efa72399fe58fa615d8bf8fd64a4e">DMA1_Stream5_IRQn</a> = 16,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aef5e2b68f62f6f1781fab894f0b8f486">DMA1_Stream6_IRQn</a> = 17,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a4d69175258ae261dd545001e810421b3">ADC_IRQn</a> = 18,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a9ceb5175f7c10cf436955173c2246877">CAN1_TX_IRQn</a> = 19,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab6bf73ac43a9856b3f2759a59f3d25b5">CAN1_RX0_IRQn</a> = 20,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083af71ef06c4f9ff0e1691c21ff3670acd4">CAN1_RX1_IRQn</a> = 21,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a0f5f129d88a5606a378811e43039e274">CAN1_SCE_IRQn</a> = 22,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa3aa50e0353871985facf62d055faa52">EXTI9_5_IRQn</a> = 23,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab35b4ce63cfb11453f84a3695c6df368">TIM1_BRK_TIM9_IRQn</a> = 24,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa3879e49013035601e17f83a51e0829f">TIM1_UP_TIM10_IRQn</a> = 25,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab1a744bdceb8eface6ff57dd036e608e">TIM1_TRG_COM_TIM11_IRQn</a> = 26,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083af312f0a21f600f9b286427e50c549ca9">TIM1_CC_IRQn</a> = 27,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3a4e2095a926e4095d3c846eb1c98afa">TIM2_IRQn</a> = 28,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a985574288f66e2a00e97387424a9a2d8">TIM3_IRQn</a> = 29,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a368b899ca740b9ae0d75841f3abf68c4">TIM4_IRQn</a> = 30,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a9852dbbe8c014e716ce7e03a7b809751">I2C1_EV_IRQn</a> = 31,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a2ec363869f4488782dc10a60abce3b34">I2C1_ER_IRQn</a> = 32,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3020193786527c47d2e4d8c92ceee804">I2C2_EV_IRQn</a> = 33,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a60c35f2d48d512bd6818bc9fef7053d7">I2C2_ER_IRQn</a> = 34,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aacdff1a9c42582ed663214cbe62c1174">SPI1_IRQn</a> = 35,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a505fbd4ccf7c2a14c8b76dc9e58f7ede">SPI2_IRQn</a> = 36,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ad97cb163e1f678367e37c50d54d161ab">USART1_IRQn</a> = 37,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3f9c48714d0e5baaba6613343f0da68e">USART2_IRQn</a> = 38,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083afb13802afc1f5fdf5c90e73ee99e5ff3">USART3_IRQn</a> = 39,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a9fb0ad0c850234d1983fafdb17378e2f">EXTI15_10_IRQn</a> = 40,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083afe09d6563a21a1540f658163a76a3b37">RTC_Alarm_IRQn</a> = 41,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa612f35c4440359c35acbaa3c1458c5f">OTG_FS_WKUP_IRQn</a> = 42,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3e01328006d19f7d32354271b9f61dce">TIM8_BRK_TIM12_IRQn</a> = 43,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa8d8f67a98f24de6f0b36ad6b1f29a7d">TIM8_UP_TIM13_IRQn</a> = 44,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ae252b31c3a341acbe9a467e243137307">TIM8_TRG_COM_TIM14_IRQn</a> = 45,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a637750639eff4e2b4aae80ed6f3cf67f">TIM8_CC_IRQn</a> = 46,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aedaa9c14e7e5fa9c0dcbb0c2455546e8">DMA1_Stream7_IRQn</a> = 47,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a70450df88125476d5771f2ff3f562536">FSMC_IRQn</a> = 48,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a16fe70a39348f3f27906dc268b5654e3">SDIO_IRQn</a> = 49,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aed2eb3f4bb721d55fcc1003125956645">TIM5_IRQn</a> = 50,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a4e9331739fb76a2ca7781fede070ae44">SPI3_IRQn</a> = 51,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aded5314b20c6e4e80cb6ab0668ffb8d5">UART4_IRQn</a> = 52,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ac55a11a64aae7432544d0ab0d4f7de09">UART5_IRQn</a> = 53,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a5f581e9aedfaccd9b1db9ec793804b45">TIM6_DAC_IRQn</a> = 54,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a53cadc1e164ec85d0ea4cd143608e8e1">TIM7_IRQn</a> = 55,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a1e5055722630fd4b12aff421964c2ebb">DMA2_Stream0_IRQn</a> = 56,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a98abb3f02c1feb3831706bc1b82307cb">DMA2_Stream1_IRQn</a> = 57,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083abf5e189f3ac7aad9f65e65ea5a0f3b36">DMA2_Stream2_IRQn</a> = 58,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3ff8f3439f509e6e985eb960e63e1be4">DMA2_Stream3_IRQn</a> = 59,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ae54eb8b30273b38a0576f75aba24eec0">DMA2_Stream4_IRQn</a> = 60,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ad71328dd95461b7c55b568cf25966f6a">ETH_IRQn</a> = 61,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a0485578005e12c2e2c0fb253a844ec6f">ETH_WKUP_IRQn</a> = 62,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083af6b8fbc990ac71c8425647bb684788a4">CAN2_TX_IRQn</a> = 63,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a851fd2f2ab1418710e7da80e1bdf348a">CAN2_RX0_IRQn</a> = 64,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ab5023ff845be31a488ab63a0b8cf2b7a">CAN2_RX1_IRQn</a> = 65,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a56c0b5758f26f31494e74aab9273f9fd">CAN2_SCE_IRQn</a> = 66,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa60a30b7ef03446a46fd72e084911f7e">OTG_FS_IRQn</a> = 67,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a933d4686213973abc01845a3da1c8a03">DMA2_Stream5_IRQn</a> = 68,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a21570761ad0b5ed751adc831691b7800">DMA2_Stream6_IRQn</a> = 69,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a3d4cc0cd9b4d71e7ee002c4f8c1f8a77">DMA2_Stream7_IRQn</a> = 70,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa92bcb2bc3a87be869f05c5b07f04b8c">USART6_IRQn</a> = 71,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a8326db2d570cb865ffa1d49fa29d562a">I2C3_EV_IRQn</a> = 72,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a6e954232d164a6942ebc7a6bd6f7736e">I2C3_ER_IRQn</a> = 73,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a60b6cc4b6dbeca39e29a475d26c9e080">OTG_HS_EP1_OUT_IRQn</a> = 74,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a1b040a7f76278a73cf5ea4c51f1be047">OTG_HS_EP1_IN_IRQn</a> = 75,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a9e5c9d81dd3985a88094f8158c0f0267">OTG_HS_WKUP_IRQn</a> = 76,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aad2d5e47d27fe3a02f7059b20bb729c0">OTG_HS_IRQn</a> = 77,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083ace3c0fc2c4d05a7c02e3c987da5bc8e8">DCMI_IRQn</a> = 78,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a70c9645bf48ca539510cc8f7d974f017">CRYP_IRQn</a> = 79,
|
||
<br />
|
||
  <a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083a86a161642b54055f9bbea3937e6352de">HASH_RNG_IRQn</a> = 80,
|
||
<a class="el" href="group___configuration__section__for___c_m_s_i_s.html#gga666eb0caeb12ec0e281415592ae89083aa6b8ff01b016a798c6e639728c179e4f">FPU_IRQn</a> = 81
|
||
<br />
|
||
}</td></tr>
|
||
<tr class="memdesc:ga666eb0caeb12ec0e281415592ae89083"><td class="mdescLeft"> </td><td class="mdescRight">STM32F4XX Interrupt Number Definition, according to the selected device in <a class="el" href="group___library__configuration__section.html">Library_configuration_section</a>. <a href="group___configuration__section__for___c_m_s_i_s.html#ga666eb0caeb12ec0e281415592ae89083">More...</a><br /></td></tr>
|
||
<tr class="separator:ga666eb0caeb12ec0e281415592ae89083"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga89136caac2e14c55151f527ac02daaff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89136caac2e14c55151f527ac02daaff"></a>enum  </td><td class="memItemRight" valign="bottom"><b>FlagStatus</b> { <b>RESET</b> = 0,
|
||
<b>SET</b> = !RESET
|
||
}</td></tr>
|
||
<tr class="separator:ga89136caac2e14c55151f527ac02daaff"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:gac9a7e9a35d2513ec15c3b537aaa4fba1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9a7e9a35d2513ec15c3b537aaa4fba1"></a>enum  </td><td class="memItemRight" valign="bottom"><b>FunctionalState</b> { <b>DISABLE</b> = 0,
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<b>ENABLE</b> = !DISABLE
|
||
}</td></tr>
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<tr class="separator:gac9a7e9a35d2513ec15c3b537aaa4fba1"><td class="memSeparator" colspan="2"> </td></tr>
|
||
<tr class="memitem:ga8333b96c67f83cba354b3407fcbb6ee8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8333b96c67f83cba354b3407fcbb6ee8"></a>enum  </td><td class="memItemRight" valign="bottom"><b>ErrorStatus</b> { <b>ERROR</b> = 0,
|
||
<b>SUCCESS</b> = !ERROR
|
||
}</td></tr>
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||
<tr class="separator:ga8333b96c67f83cba354b3407fcbb6ee8"><td class="memSeparator" colspan="2"> </td></tr>
|
||
</table>
|
||
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||
<div class="textblock"><p>CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral register's definitions, bits definitions and memory mapping for STM32F4xx devices. </p>
|
||
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
|
||
<dl class="section version"><dt>Version</dt><dd>V1.4.0 </dd></dl>
|
||
<dl class="section date"><dt>Date</dt><dd>04-August-2014 The file is the unique include file that the application programmer is using in the C source code, usually in main.c. This file contains:<ul>
|
||
<li>Configuration section that allows to select:<ul>
|
||
<li>The device used in the target application</li>
|
||
<li>To use or not the peripheral<61>s drivers in application code(i.e. code will be based on direct access to peripheral<61>s registers rather than drivers API), this option is controlled by "#define USE_STDPERIPH_DRIVER"</li>
|
||
<li>To change few application-specific parameters such as the HSE crystal frequency</li>
|
||
</ul>
|
||
</li>
|
||
<li>Data structures and the address mapping for all peripherals</li>
|
||
<li>Peripheral's registers declarations and bits definition</li>
|
||
<li>Macros to access peripheral<61>s registers hardware</li>
|
||
</ul>
|
||
</dd></dl>
|
||
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
|
||
<h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||
<p>Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at: </p><pre class="fragment"> http://www.st.com/software_license_agreement_liberty_v2
|
||
</pre><p>Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. </p>
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