30 #ifndef __STM32F4xx_DMA2D_H
31 #define __STM32F4xx_DMA2D_H
193 #define DMA2D_M2M ((uint32_t)0x00000000)
194 #define DMA2D_M2M_PFC ((uint32_t)0x00010000)
195 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000)
196 #define DMA2D_R2M ((uint32_t)0x00030000)
198 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
199 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
209 #define DMA2D_ARGB8888 ((uint32_t)0x00000000)
210 #define DMA2D_RGB888 ((uint32_t)0x00000001)
211 #define DMA2D_RGB565 ((uint32_t)0x00000002)
212 #define DMA2D_ARGB1555 ((uint32_t)0x00000003)
213 #define DMA2D_ARGB4444 ((uint32_t)0x00000004)
215 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
216 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
217 ((MODE_ARGB) == DMA2D_ARGB4444))
227 #define DMA2D_Output_Color ((uint32_t)0x000000FF)
229 #define IS_DMA2D_OGREEN(OGREEN) ((OGREEN) <= DMA2D_Output_Color)
230 #define IS_DMA2D_ORED(ORED) ((ORED) <= DMA2D_Output_Color)
231 #define IS_DMA2D_OBLUE(OBLUE) ((OBLUE) <= DMA2D_Output_Color)
232 #define IS_DMA2D_OALPHA(OALPHA) ((OALPHA) <= DMA2D_Output_Color)
241 #define DMA2D_OUTPUT_OFFSET ((uint32_t)0x00003FFF)
243 #define IS_DMA2D_OUTPUT_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OUTPUT_OFFSET)
254 #define DMA2D_pixel ((uint32_t)0x00003FFF)
255 #define DMA2D_Line ((uint32_t)0x0000FFFF)
257 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_Line)
258 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_pixel)
268 #define OFFSET ((uint32_t)0x00003FFF)
270 #define IS_DMA2D_FGO(FGO) ((FGO) <= OFFSET)
272 #define IS_DMA2D_BGO(BGO) ((BGO) <= OFFSET)
283 #define CM_ARGB8888 ((uint32_t)0x00000000)
284 #define CM_RGB888 ((uint32_t)0x00000001)
285 #define CM_RGB565 ((uint32_t)0x00000002)
286 #define CM_ARGB1555 ((uint32_t)0x00000003)
287 #define CM_ARGB4444 ((uint32_t)0x00000004)
288 #define CM_L8 ((uint32_t)0x00000005)
289 #define CM_AL44 ((uint32_t)0x00000006)
290 #define CM_AL88 ((uint32_t)0x00000007)
291 #define CM_L4 ((uint32_t)0x00000008)
292 #define CM_A8 ((uint32_t)0x00000009)
293 #define CM_A4 ((uint32_t)0x0000000A)
295 #define IS_DMA2D_FGCM(FGCM) (((FGCM) == CM_ARGB8888) || ((FGCM) == CM_RGB888) || \
296 ((FGCM) == CM_RGB565) || ((FGCM) == CM_ARGB1555) || \
297 ((FGCM) == CM_ARGB4444) || ((FGCM) == CM_L8) || \
298 ((FGCM) == CM_AL44) || ((FGCM) == CM_AL88) || \
299 ((FGCM) == CM_L4) || ((FGCM) == CM_A8) || \
302 #define IS_DMA2D_BGCM(BGCM) (((BGCM) == CM_ARGB8888) || ((BGCM) == CM_RGB888) || \
303 ((BGCM) == CM_RGB565) || ((BGCM) == CM_ARGB1555) || \
304 ((BGCM) == CM_ARGB4444) || ((BGCM) == CM_L8) || \
305 ((BGCM) == CM_AL44) || ((BGCM) == CM_AL88) || \
306 ((BGCM) == CM_L4) || ((BGCM) == CM_A8) || \
317 #define CLUT_CM_ARGB8888 ((uint32_t)0x00000000)
318 #define CLUT_CM_RGB888 ((uint32_t)0x00000001)
320 #define IS_DMA2D_FG_CLUT_CM(FG_CLUT_CM) (((FG_CLUT_CM) == CLUT_CM_ARGB8888) || ((FG_CLUT_CM) == CLUT_CM_RGB888))
322 #define IS_DMA2D_BG_CLUT_CM(BG_CLUT_CM) (((BG_CLUT_CM) == CLUT_CM_ARGB8888) || ((BG_CLUT_CM) == CLUT_CM_RGB888))
332 #define COLOR_VALUE ((uint32_t)0x000000FF)
334 #define IS_DMA2D_FG_CLUT_SIZE(FG_CLUT_SIZE) ((FG_CLUT_SIZE) <= COLOR_VALUE)
336 #define IS_DMA2D_FG_ALPHA_VALUE(FG_ALPHA_VALUE) ((FG_ALPHA_VALUE) <= COLOR_VALUE)
337 #define IS_DMA2D_FGC_BLUE(FGC_BLUE) ((FGC_BLUE) <= COLOR_VALUE)
338 #define IS_DMA2D_FGC_GREEN(FGC_GREEN) ((FGC_GREEN) <= COLOR_VALUE)
339 #define IS_DMA2D_FGC_RED(FGC_RED) ((FGC_RED) <= COLOR_VALUE)
341 #define IS_DMA2D_BG_CLUT_SIZE(BG_CLUT_SIZE) ((BG_CLUT_SIZE) <= COLOR_VALUE)
343 #define IS_DMA2D_BG_ALPHA_VALUE(BG_ALPHA_VALUE) ((BG_ALPHA_VALUE) <= COLOR_VALUE)
344 #define IS_DMA2D_BGC_BLUE(BGC_BLUE) ((BGC_BLUE) <= COLOR_VALUE)
345 #define IS_DMA2D_BGC_GREEN(BGC_GREEN) ((BGC_GREEN) <= COLOR_VALUE)
346 #define IS_DMA2D_BGC_RED(BGC_RED) ((BGC_RED) <= COLOR_VALUE)
356 #define NO_MODIF_ALPHA_VALUE ((uint32_t)0x00000000)
357 #define REPLACE_ALPHA_VALUE ((uint32_t)0x00000001)
358 #define COMBINE_ALPHA_VALUE ((uint32_t)0x00000002)
360 #define IS_DMA2D_FG_ALPHA_MODE(FG_ALPHA_MODE) (((FG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
361 ((FG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
362 ((FG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
364 #define IS_DMA2D_BG_ALPHA_MODE(BG_ALPHA_MODE) (((BG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
365 ((BG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
366 ((BG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
376 #define DMA2D_IT_CE DMA2D_CR_CEIE
377 #define DMA2D_IT_CTC DMA2D_CR_CTCIE
378 #define DMA2D_IT_CAE DMA2D_CR_CAEIE
379 #define DMA2D_IT_TW DMA2D_CR_TWIE
380 #define DMA2D_IT_TC DMA2D_CR_TCIE
381 #define DMA2D_IT_TE DMA2D_CR_TEIE
383 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
384 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
385 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
395 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF
396 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF
397 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF
398 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF
399 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF
400 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF
403 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
404 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
405 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
416 #define DEADTIME ((uint32_t)0x000000FF)
418 #define IS_DMA2D_DEAD_TIME(DEAD_TIME) ((DEAD_TIME) <= DEADTIME)
421 #define LINE_WATERMARK DMA2D_LWR_LW
423 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
uint32_t DMA2D_FG_CLUT_CM
Definition: stm32f4xx_dma2d.h:118
void DMA2D_BGConfig(DMA2D_BG_InitTypeDef *DMA2D_BG_InitStruct)
Configures the Background according to the specified parameters in the DMA2D_BGStruct.
Definition: stm32f4xx_dma2d.c:395
Definition: stm32f4xx_dma2d.h:107
void DMA2D_ClearITPendingBit(uint32_t DMA2D_IT)
Clears the DMA2D's interrupt pending bits.
Definition: stm32f4xx_dma2d.c:758
uint32_t DMA2D_OutputMemoryAdd
Definition: stm32f4xx_dma2d.h:92
uint32_t DMA2D_FGC_RED
Definition: stm32f4xx_dma2d.h:136
void DMA2D_LineWatermarkConfig(uint32_t DMA2D_LWatermarkConfig)
Define the configuration of the line watermark .
Definition: stm32f4xx_dma2d.c:565
Definition: stm32f4xx_dma2d.h:144
uint32_t DMA2D_OutputRed
Definition: stm32f4xx_dma2d.h:78
uint32_t DMA2D_FGMA
Definition: stm32f4xx_dma2d.h:109
void DMA2D_Suspend(FunctionalState NewState)
Stop or continue the DMA2D transfer.
Definition: stm32f4xx_dma2d.c:273
uint32_t DMA2D_BGCMAR
Definition: stm32f4xx_dma2d.h:176
uint32_t DMA2D_FGC_GREEN
Definition: stm32f4xx_dma2d.h:133
uint32_t DMA2D_BGC_RED
Definition: stm32f4xx_dma2d.h:173
void DMA2D_FGStart(FunctionalState NewState)
Start the automatic loading of the CLUT or abort the transfer.
Definition: stm32f4xx_dma2d.c:491
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...
void DMA2D_Init(DMA2D_InitTypeDef *DMA2D_InitStruct)
Initializes the DMA2D peripheral according to the specified parameters in the DMA2D_InitStruct.
Definition: stm32f4xx_dma2d.c:128
void DMA2D_FGConfig(DMA2D_FG_InitTypeDef *DMA2D_FG_InitStruct)
Configures the Foreground according to the specified parameters in the DMA2D_FGStruct.
Definition: stm32f4xx_dma2d.c:298
uint32_t DMA2D_BGCM
Definition: stm32f4xx_dma2d.h:152
DMA2D Init structure definition.
Definition: stm32f4xx_dma2d.h:54
uint32_t DMA2D_Mode
Definition: stm32f4xx_dma2d.h:56
uint32_t DMA2D_FGPFC_ALPHA_MODE
Definition: stm32f4xx_dma2d.h:124
void DMA2D_ClearFlag(uint32_t DMA2D_FLAG)
Clears the DMA2D's pending flags.
Definition: stm32f4xx_dma2d.c:697
uint32_t DMA2D_BGC_GREEN
Definition: stm32f4xx_dma2d.h:170
uint32_t DMA2D_FGC_BLUE
Definition: stm32f4xx_dma2d.h:130
uint32_t DMA2D_FGPFC_ALPHA_VALUE
Definition: stm32f4xx_dma2d.h:127
uint32_t DMA2D_BGPFC_ALPHA_MODE
Definition: stm32f4xx_dma2d.h:161
uint32_t DMA2D_FGCM
Definition: stm32f4xx_dma2d.h:115
uint32_t DMA2D_OutputOffset
Definition: stm32f4xx_dma2d.h:95
void DMA2D_AbortTransfer(void)
Aboart the DMA2D transfer.
Definition: stm32f4xx_dma2d.c:260
void DMA2D_ITConfig(uint32_t DMA2D_IT, FunctionalState NewState)
Enables or disables the specified DMA2D's interrupts.
Definition: stm32f4xx_dma2d.c:632
uint32_t DMA2D_PixelPerLine
Definition: stm32f4xx_dma2d.h:101
void DMA2D_StartTransfer(void)
Start the DMA2D transfer.
Definition: stm32f4xx_dma2d.c:248
void DMA2D_BGStart(FunctionalState NewState)
Start the automatic loading of the CLUT or abort the transfer.
Definition: stm32f4xx_dma2d.c:515
uint32_t DMA2D_FGCMAR
Definition: stm32f4xx_dma2d.h:139
uint32_t DMA2D_CMode
Definition: stm32f4xx_dma2d.h:59
uint32_t DMA2D_BG_CLUT_SIZE
Definition: stm32f4xx_dma2d.h:158
uint32_t DMA2D_BGPFC_ALPHA_VALUE
Definition: stm32f4xx_dma2d.h:164
uint32_t DMA2D_FGO
Definition: stm32f4xx_dma2d.h:112
uint32_t DMA2D_OutputAlpha
Definition: stm32f4xx_dma2d.h:86
void DMA2D_BG_StructInit(DMA2D_BG_InitTypeDef *DMA2D_BG_InitStruct)
Fills each DMA2D_BGStruct member with its default value.
Definition: stm32f4xx_dma2d.c:448
uint32_t DMA2D_FG_CLUT_SIZE
Definition: stm32f4xx_dma2d.h:121
uint32_t DMA2D_BG_CLUT_CM
Definition: stm32f4xx_dma2d.h:155
uint32_t DMA2D_BGC_BLUE
Definition: stm32f4xx_dma2d.h:167
uint32_t DMA2D_BGMA
Definition: stm32f4xx_dma2d.h:146
void DMA2D_FG_StructInit(DMA2D_FG_InitTypeDef *DMA2D_FG_InitStruct)
Fills each DMA2D_FGStruct member with its default value.
Definition: stm32f4xx_dma2d.c:350
FlagStatus DMA2D_GetFlagStatus(uint32_t DMA2D_FLAG)
Checks whether the specified DMA2D's flag is set or not.
Definition: stm32f4xx_dma2d.c:663
uint32_t DMA2D_OutputGreen
Definition: stm32f4xx_dma2d.h:70
void DMA2D_DeInit(void)
Deinitializes the DMA2D peripheral registers to their default reset values.
Definition: stm32f4xx_dma2d.c:111
uint32_t DMA2D_BGO
Definition: stm32f4xx_dma2d.h:149
uint32_t DMA2D_OutputBlue
Definition: stm32f4xx_dma2d.h:62
void DMA2D_DeadTimeConfig(uint32_t DMA2D_DeadTime, FunctionalState NewState)
Configures the DMA2D dead time.
Definition: stm32f4xx_dma2d.c:538
uint32_t DMA2D_NumberOfLine
Definition: stm32f4xx_dma2d.h:98
ITStatus DMA2D_GetITStatus(uint32_t DMA2D_IT)
Checks whether the specified DMA2D's interrupt has occurred or not.
Definition: stm32f4xx_dma2d.c:718