discoverpixy
stm32f4_discovery_lis302dl.h
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1 
23 /* Define to prevent recursive inclusion -------------------------------------*/
24 #ifndef __STM32F4_DISCOVERY_LIS302DL_H
25 #define __STM32F4_DISCOVERY_LIS302DL_H
26 
27 #ifdef __cplusplus
28  extern "C" {
29 #endif
30 
31 /* Includes ------------------------------------------------------------------*/
32  #include "stm32f4xx.h"
33 
51 /* LIS302DL struct */
52 typedef struct
53 {
54  uint8_t Power_Mode; /* Power-down/Active Mode */
55  uint8_t Output_DataRate; /* OUT data rate 100 Hz / 400 Hz */
56  uint8_t Axes_Enable; /* Axes enable */
57  uint8_t Full_Scale; /* Full scale */
58  uint8_t Self_Test; /* Self test */
59 }LIS302DL_InitTypeDef;
60 
61 /* LIS302DL High Pass Filter struct */
62 typedef struct
63 {
64  uint8_t HighPassFilter_Data_Selection; /* Internal filter bypassed or data from internal filter send to output register*/
65  uint8_t HighPassFilter_CutOff_Frequency; /* High pass filter cut-off frequency */
66  uint8_t HighPassFilter_Interrupt; /* High pass filter enabled for Freefall/WakeUp #1 or #2 */
67 }LIS302DL_FilterConfigTypeDef;
68 
69 /* LIS302DL Interrupt struct */
70 typedef struct
71 {
72  uint8_t Latch_Request; /* Latch interrupt request into CLICK_SRC register*/
73  uint8_t SingleClick_Axes; /* Single Click Axes Interrupts */
74  uint8_t DoubleClick_Axes; /* Double Click Axes Interrupts */
75 }LIS302DL_InterruptConfigTypeDef;
76 
85 /* Uncomment the following line to use the default LIS302DL_TIMEOUT_UserCallback()
86  function implemented in stm32f4_discovery_lis302dl.c file.
87  LIS302DL_TIMEOUT_UserCallback() function is called whenever a timeout condition
88  occure during communication (waiting transmit data register empty flag(TXE)
89  or waiting receive data register is not empty flag (RXNE)). */
90 /* #define USE_DEFAULT_TIMEOUT_CALLBACK */
91 
92 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
93  on accurate values, they just guarantee that the application will not remain
94  stuck if the SPI communication is corrupted.
95  You may modify these timeout values depending on CPU frequency and application
96  conditions (interrupts routines ...). */
97 #define LIS302DL_FLAG_TIMEOUT ((uint32_t)0x1000)
98 
102 #define LIS302DL_SPI SPI1
103 #define LIS302DL_SPI_CLK RCC_APB2Periph_SPI1
104 
105 #define LIS302DL_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */
106 #define LIS302DL_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */
107 #define LIS302DL_SPI_SCK_GPIO_CLK RCC_AHB1Periph_GPIOA
108 #define LIS302DL_SPI_SCK_SOURCE GPIO_PinSource5
109 #define LIS302DL_SPI_SCK_AF GPIO_AF_SPI1
110 
111 #define LIS302DL_SPI_MISO_PIN GPIO_Pin_6 /* PA.6 */
112 #define LIS302DL_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */
113 #define LIS302DL_SPI_MISO_GPIO_CLK RCC_AHB1Periph_GPIOA
114 #define LIS302DL_SPI_MISO_SOURCE GPIO_PinSource6
115 #define LIS302DL_SPI_MISO_AF GPIO_AF_SPI1
116 
117 #define LIS302DL_SPI_MOSI_PIN GPIO_Pin_7 /* PA.7 */
118 #define LIS302DL_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */
119 #define LIS302DL_SPI_MOSI_GPIO_CLK RCC_AHB1Periph_GPIOA
120 #define LIS302DL_SPI_MOSI_SOURCE GPIO_PinSource7
121 #define LIS302DL_SPI_MOSI_AF GPIO_AF_SPI1
122 
123 #define LIS302DL_SPI_CS_PIN GPIO_Pin_3 /* PE.03 */
124 #define LIS302DL_SPI_CS_GPIO_PORT GPIOE /* GPIOE */
125 #define LIS302DL_SPI_CS_GPIO_CLK RCC_AHB1Periph_GPIOE
126 
127 #define LIS302DL_SPI_INT1_PIN GPIO_Pin_0 /* PE.00 */
128 #define LIS302DL_SPI_INT1_GPIO_PORT GPIOE /* GPIOE */
129 #define LIS302DL_SPI_INT1_GPIO_CLK RCC_AHB1Periph_GPIOE
130 #define LIS302DL_SPI_INT1_EXTI_LINE EXTI_Line0
131 #define LIS302DL_SPI_INT1_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
132 #define LIS302DL_SPI_INT1_EXTI_PIN_SOURCE EXTI_PinSource0
133 #define LIS302DL_SPI_INT1_EXTI_IRQn EXTI0_IRQn
134 
135 #define LIS302DL_SPI_INT2_PIN GPIO_Pin_1 /* PE.01 */
136 #define LIS302DL_SPI_INT2_GPIO_PORT GPIOE /* GPIOE */
137 #define LIS302DL_SPI_INT2_GPIO_CLK RCC_AHB1Periph_GPIOE
138 #define LIS302DL_SPI_INT2_EXTI_LINE EXTI_Line1
139 #define LIS302DL_SPI_INT2_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
140 #define LIS302DL_SPI_INT2_EXTI_PIN_SOURCE EXTI_PinSource1
141 #define LIS302DL_SPI_INT2_EXTI_IRQn EXTI1_IRQn
142 
143 
144 /******************************************************************************/
145 /*************************** START REGISTER MAPPING **************************/
146 /******************************************************************************/
147 
148 /*******************************************************************************
149 * WHO_AM_I Register: Device Identification Register
150 * Read only register
151 * Default value: 0x3B
152 *******************************************************************************/
153 #define LIS302DL_WHO_AM_I_ADDR 0x0F
154 
155 /*******************************************************************************
156 * CTRL_REG1 Register: Control Register 1
157 * Read Write register
158 * Default value: 0x07
159 * 7 DR: Data Rate selection.
160 * 0 - 100 Hz output data rate
161 * 1 - 400 Hz output data rate
162 * 6 PD: Power Down control.
163 * 0 - power down mode
164 * 1 - active mode
165 * 5 FS: Full Scale selection.
166 * 0 - Typical measurement range 2.3
167 * 1 - Typical measurement range 9.2
168 * 4:3 STP-STM Self Test Enable:
169 * STP | STM | mode
170 * ----------------------------
171 * 0 | 0 | Normal mode
172 * 0 | 1 | Self Test M
173 * 1 | 0 | Self Test P
174 * 2 Zen: Z axis enable.
175 * 0 - Z axis disabled
176 * 1- Z axis enabled
177 * 1 Yen: Y axis enable.
178 * 0 - Y axis disabled
179 * 1- Y axis enabled
180 * 0 Xen: X axis enable.
181 * 0 - X axis disabled
182 * 1- X axis enabled
183 ********************************************************************************/
184 #define LIS302DL_CTRL_REG1_ADDR 0x20
185 
186 /*******************************************************************************
187 * CTRL_REG2 Regsiter: Control Register 2
188 * Read Write register
189 * Default value: 0x00
190 * 7 SIM: SPI Serial Interface Mode Selection.
191 * 0 - 4 wire interface
192 * 1 - 3 wire interface
193 * 6 BOOT: Reboot memory content
194 * 0 - normal mode
195 * 1 - reboot memory content
196 * 5 Reserved
197 * 4 FDS: Filtered data selection.
198 * 0 - internal filter bypassed
199 * 1 - data from internal filter sent to output register
200 * 3 HP FF_WU2: High pass filter enabled for FreeFall/WakeUp#2.
201 * 0 - filter bypassed
202 * 1 - filter enabled
203 * 2 HP FF_WU1: High pass filter enabled for FreeFall/WakeUp#1.
204 * 0 - filter bypassed
205 * 1 - filter enabled
206 * 1:0 HP coeff2-HP coeff1 High pass filter cut-off frequency (ft) configuration.
207 * ft= ODR[hz]/6*HP coeff
208 * HP coeff2 | HP coeff1 | HP coeff
209 * -------------------------------------------
210 * 0 | 0 | 8
211 * 0 | 1 | 16
212 * 1 | 0 | 32
213 * 1 | 1 | 64
214 * HP coeff | ft[hz] | ft[hz] |
215 * |ODR 100Hz | ODR 400Hz |
216 * --------------------------------------------
217 * 00 | 2 | 8 |
218 * 01 | 1 | 4 |
219 * 10 | 0.5 | 2 |
220 * 11 | 0.25 | 1 |
221 *******************************************************************************/
222 #define LIS302DL_CTRL_REG2_ADDR 0x21
223 
224 /*******************************************************************************
225 * CTRL_REG3 Register: Interrupt Control Register
226 * Read Write register
227 * Default value: 0x00
228 * 7 IHL active: Interrupt active high/low.
229 * 0 - active high
230 * 1 - active low
231 * 6 PP_OD: push-pull/open-drain.
232 * 0 - push-pull
233 * 1 - open-drain
234 * 5:3 I2_CFG2 - I2_CFG0 Data signal on INT2 pad control bits
235 * 2:0 I1_CFG2 - I1_CFG0 Data signal on INT1 pad control bits
236 * I1(2)_CFG2 | I1(2)_CFG1 | I1(2)_CFG0 | INT1(2) Pad
237 * ----------------------------------------------------------
238 * 0 | 0 | 0 | GND
239 * 0 | 0 | 1 | FreeFall/WakeUp#1
240 * 0 | 1 | 0 | FreeFall/WakeUp#2
241 * 0 | 1 | 1 | FreeFall/WakeUp#1 or FreeFall/WakeUp#2
242 * 1 | 0 | 0 | Data ready
243 * 1 | 1 | 1 | Click interrupt
244 *******************************************************************************/
245 #define LIS302DL_CTRL_REG3_ADDR 0x22
246 
247 /*******************************************************************************
248 * HP_FILTER_RESET Register: Dummy register. Reading at this address zeroes
249 * instantaneously the content of the internal high pass filter. If the high pass
250 * filter is enabled all three axes are instantaneously set to 0g.
251 * This allows to overcome the settling time of the high pass filter.
252 * Read only register
253 * Default value: Dummy
254 *******************************************************************************/
255 #define LIS302DL_HP_FILTER_RESET_REG_ADDR 0x23
256 
257 /*******************************************************************************
258 * STATUS_REG Register: Status Register
259 * Default value: 0x00
260 * 7 ZYXOR: X, Y and Z axis data overrun.
261 * 0: no overrun has occurred
262 * 1: new data has overwritten the previous one before it was read
263 * 6 ZOR: Z axis data overrun.
264 * 0: no overrun has occurred
265 * 1: new data for Z-axis has overwritten the previous one before it was read
266 * 5 yOR: y axis data overrun.
267 * 0: no overrun has occurred
268 * 1: new data for y-axis has overwritten the previous one before it was read
269 * 4 XOR: X axis data overrun.
270 * 0: no overrun has occurred
271 * 1: new data for X-axis has overwritten the previous one before it was read
272 * 3 ZYXDA: X, Y and Z axis new data available
273 * 0: a new set of data is not yet available
274 * 1: a new set of data is available
275 * 2 ZDA: Z axis new data available.
276 * 0: a new set of data is not yet available
277 * 1: a new data for Z axis is available
278 * 1 YDA: Y axis new data available
279 * 0: a new set of data is not yet available
280 * 1: a new data for Y axis is available
281 * 0 XDA: X axis new data available
282 * 0: a new set of data is not yet available
283 * 1: a new data for X axis is available
284 *******************************************************************************/
285 #define LIS302DL_STATUS_REG_ADDR 0x27
286 
287 /*******************************************************************************
288 * OUT_X Register: X-axis output Data
289 * Read only register
290 * Default value: output
291 * 7:0 XD7-XD0: X-axis output Data
292 *******************************************************************************/
293 #define LIS302DL_OUT_X_ADDR 0x29
294 
295 /*******************************************************************************
296 * OUT_Y Register: Y-axis output Data
297 * Read only register
298 * Default value: output
299 * 7:0 YD7-YD0: Y-axis output Data
300 *******************************************************************************/
301 #define LIS302DL_OUT_Y_ADDR 0x2B
302 
303 /*******************************************************************************
304 * OUT_Z Register: Z-axis output Data
305 * Read only register
306 * Default value: output
307 * 7:0 ZD7-ZD0: Z-axis output Data
308 *******************************************************************************/
309 #define LIS302DL_OUT_Z_ADDR 0x2D
310 
311 /*******************************************************************************
312 * FF_WW_CFG_1 Register: Configuration register for Interrupt 1 source.
313 * Read write register
314 * Default value: 0x00
315 * 7 AOI: AND/OR combination of Interrupt events.
316 * 0: OR combination of interrupt events
317 * 1: AND combination of interrupt events
318 * 6 LIR: Latch/not latch interrupt request
319 * 0: interrupt request not latched
320 * 1: interrupt request latched
321 * 5 ZHIE: Enable interrupt generation on Z high event.
322 * 0: disable interrupt request
323 * 1: enable interrupt request on measured accel. value higher than preset threshold
324 * 4 ZLIE: Enable interrupt generation on Z low event.
325 * 0: disable interrupt request
326 * 1: enable interrupt request on measured accel. value lower than preset threshold
327 * 3 YHIE: Enable interrupt generation on Y high event.
328 * 0: disable interrupt request
329 * 1: enable interrupt request on measured accel. value higher than preset threshold
330 * 2 YLIE: Enable interrupt generation on Y low event.
331 * 0: disable interrupt request
332 * 1: enable interrupt request on measured accel. value lower than preset threshold
333 * 1 XHIE: Enable interrupt generation on X high event.
334 * 0: disable interrupt request
335 * 1: enable interrupt request on measured accel. value higher than preset threshold
336 * 0 XLIE: Enable interrupt generation on X low event.
337 * 0: disable interrupt request
338 * 1: enable interrupt request on measured accel. value lower than preset threshold
339 *******************************************************************************/
340 #define LIS302DL_FF_WU_CFG1_REG_ADDR 0x30
341 
342 /*******************************************************************************
343 * FF_WU_SRC_1 Register: Interrupt 1 source register.
344 * Reading at this address clears FF_WU_SRC_1 register and the FF, WU 1 interrupt
345 * and allow the refreshment of data in the FF_WU_SRC_1 register if the latched option
346 * was chosen.
347 * Read only register
348 * Default value: 0x00
349 * 7 Reserved
350 * 6 IA: Interrupt active.
351 * 0: no interrupt has been generated
352 * 1: one or more interrupts have been generated
353 * 5 ZH: Z high.
354 * 0: no interrupt
355 * 1: ZH event has occurred
356 * 4 ZL: Z low.
357 * 0: no interrupt
358 * 1: ZL event has occurred
359 * 3 YH: Y high.
360 * 0: no interrupt
361 * 1: YH event has occurred
362 * 2 YL: Y low.
363 * 0: no interrupt
364 * 1: YL event has occurred
365 * 1 YH: X high.
366 * 0: no interrupt
367 * 1: XH event has occurred
368 * 0 YL: X low.
369 * 0: no interrupt
370 * 1: XL event has occurred
371 *******************************************************************************/
372 #define LIS302DL_FF_WU_SRC1_REG_ADDR 0x31
373 
374 /*******************************************************************************
375 * FF_WU_THS_1 Register: Threshold register
376 * Read Write register
377 * Default value: 0x00
378 * 7 DCRM: Reset mode selection.
379 * 0 - counter resetted
380 * 1 - counter decremented
381 * 6 THS6-THS0: Free-fall/wake-up threshold value.
382 *******************************************************************************/
383 #define LIS302DL_FF_WU_THS1_REG_ADDR 0x32
384 
385 /*******************************************************************************
386 * FF_WU_DURATION_1 Register: duration Register
387 * Read Write register
388 * Default value: 0x00
389 * 7:0 D7-D0 Duration value. (Duration steps and maximum values depend on the ODR chosen)
390  ******************************************************************************/
391 #define LIS302DL_FF_WU_DURATION1_REG_ADDR 0x33
392 
393 /*******************************************************************************
394 * FF_WW_CFG_2 Register: Configuration register for Interrupt 2 source.
395 * Read write register
396 * Default value: 0x00
397 * 7 AOI: AND/OR combination of Interrupt events.
398 * 0: OR combination of interrupt events
399 * 1: AND combination of interrupt events
400 * 6 LIR: Latch/not latch interrupt request
401 * 0: interrupt request not latched
402 * 1: interrupt request latched
403 * 5 ZHIE: Enable interrupt generation on Z high event.
404 * 0: disable interrupt request
405 * 1: enable interrupt request on measured accel. value higher than preset threshold
406 * 4 ZLIE: Enable interrupt generation on Z low event.
407 * 0: disable interrupt request
408 * 1: enable interrupt request on measured accel. value lower than preset threshold
409 * 3 YHIE: Enable interrupt generation on Y high event.
410 * 0: disable interrupt request
411 * 1: enable interrupt request on measured accel. value higher than preset threshold
412 * 2 YLIE: Enable interrupt generation on Y low event.
413 * 0: disable interrupt request
414 * 1: enable interrupt request on measured accel. value lower than preset threshold
415 * 1 XHIE: Enable interrupt generation on X high event.
416 * 0: disable interrupt request
417 * 1: enable interrupt request on measured accel. value higher than preset threshold
418 * 0 XLIE: Enable interrupt generation on X low event.
419 * 0: disable interrupt request
420 * 1: enable interrupt request on measured accel. value lower than preset threshold
421 *******************************************************************************/
422 #define LIS302DL_FF_WU_CFG2_REG_ADDR 0x34
423 
424 /*******************************************************************************
425 * FF_WU_SRC_2 Register: Interrupt 2 source register.
426 * Reading at this address clears FF_WU_SRC_2 register and the FF, WU 2 interrupt
427 * and allow the refreshment of data in the FF_WU_SRC_2 register if the latched option
428 * was chosen.
429 * Read only register
430 * Default value: 0x00
431 * 7 Reserved
432 * 6 IA: Interrupt active.
433 * 0: no interrupt has been generated
434 * 1: one or more interrupts have been generated
435 * 5 ZH: Z high.
436 * 0: no interrupt
437 * 1: ZH event has occurred
438 * 4 ZL: Z low.
439 * 0: no interrupt
440 * 1: ZL event has occurred
441 * 3 YH: Y high.
442 * 0: no interrupt
443 * 1: YH event has occurred
444 * 2 YL: Y low.
445 * 0: no interrupt
446 * 1: YL event has occurred
447 * 1 YH: X high.
448 * 0: no interrupt
449 * 1: XH event has occurred
450 * 0 YL: X low.
451 * 0: no interrupt
452 * 1: XL event has occurred
453 *******************************************************************************/
454 #define LIS302DL_FF_WU_SRC2_REG_ADDR 0x35
455 
456 /*******************************************************************************
457 * FF_WU_THS_2 Register: Threshold register
458 * Read Write register
459 * Default value: 0x00
460 * 7 DCRM: Reset mode selection.
461 * 0 - counter resetted
462 * 1 - counter decremented
463 * 6 THS6-THS0: Free-fall/wake-up threshold value.
464 *******************************************************************************/
465 #define LIS302DL_FF_WU_THS2_REG_ADDR 0x36
466 
467 /*******************************************************************************
468 * FF_WU_DURATION_2 Register: duration Register
469 * Read Write register
470 * Default value: 0x00
471 * 7:0 D7-D0 Duration value. (Duration steps and maximum values depend on the ODR chosen)
472  ******************************************************************************/
473 #define LIS302DL_FF_WU_DURATION2_REG_ADDR 0x37
474 
475 /******************************************************************************
476 * CLICK_CFG Register: click Register
477 * Read Write register
478 * Default value: 0x00
479 * 7 Reserved
480 * 6 LIR: Latch Interrupt request.
481 * 0: interrupt request not latched
482 * 1: interrupt request latched
483 * 5 Double_Z: Enable interrupt generation on double click event on Z axis.
484 * 0: disable interrupt request
485 * 1: enable interrupt request
486 * 4 Single_Z: Enable interrupt generation on single click event on Z axis.
487 * 0: disable interrupt request
488 * 1: enable interrupt request
489 * 3 Double_Y: Enable interrupt generation on double click event on Y axis.
490 * 0: disable interrupt request
491 * 1: enable interrupt request
492 * 2 Single_Y: Enable interrupt generation on single click event on Y axis.
493 * 0: disable interrupt request
494 * 1: enable interrupt request
495 * 1 Double_X: Enable interrupt generation on double click event on X axis.
496 * 0: disable interrupt request
497 * 1: enable interrupt request
498 * 0 Single_y: Enable interrupt generation on single click event on X axis.
499 * 0: disable interrupt request
500 * 1: enable interrupt request
501  ******************************************************************************/
502 #define LIS302DL_CLICK_CFG_REG_ADDR 0x38
503 
504 /******************************************************************************
505 * CLICK_SRC Register: click status Register
506 * Read only register
507 * Default value: 0x00
508 * 7 Reserved
509 * 6 IA: Interrupt active.
510 * 0: no interrupt has been generated
511 * 1: one or more interrupts have been generated
512 * 5 Double_Z: Double click on Z axis event.
513 * 0: no interrupt
514 * 1: Double Z event has occurred
515 * 4 Single_Z: Z low.
516 * 0: no interrupt
517 * 1: Single Z event has occurred
518 * 3 Double_Y: Y high.
519 * 0: no interrupt
520 * 1: Double Y event has occurred
521 * 2 Single_Y: Y low.
522 * 0: no interrupt
523 * 1: Single Y event has occurred
524 * 1 Double_X: X high.
525 * 0: no interrupt
526 * 1: Double X event has occurred
527 * 0 Single_X: X low.
528 * 0: no interrupt
529 * 1: Single X event has occurred
530 *******************************************************************************/
531 #define LIS302DL_CLICK_SRC_REG_ADDR 0x39
532 
533 /*******************************************************************************
534 * CLICK_THSY_X Register: Click threshold Y and X register
535 * Read Write register
536 * Default value: 0x00
537 * 7:4 THSy3-THSy0: Click threshold on Y axis, step 0.5g
538 * 3:0 THSx3-THSx0: Click threshold on X axis, step 0.5g
539 *******************************************************************************/
540 #define LIS302DL_CLICK_THSY_X_REG_ADDR 0x3B
541 
542 /*******************************************************************************
543 * CLICK_THSZ Register: Click threshold Z register
544 * Read Write register
545 * Default value: 0x00
546 * 7:4 Reserved
547 * 3:0 THSz3-THSz0: Click threshold on Z axis, step 0.5g
548 *******************************************************************************/
549 #define LIS302DL_CLICK_THSZ_REG_ADDR 0x3C
550 
551 /*******************************************************************************
552 * CLICK_TimeLimit Register: Time Limit register
553 * Read Write register
554 * Default value: 0x00
555 * 7:0 Dur7-Dur0: Time Limit value, step 0.5g
556 *******************************************************************************/
557 #define LIS302DL_CLICK_TIMELIMIT_REG_ADDR 0x3D
558 
559 /*******************************************************************************
560 * CLICK_Latency Register: Latency register
561 * Read Write register
562 * Default value: 0x00
563 * 7:0 Lat7-Lat0: Latency value, step 1msec
564 *******************************************************************************/
565 #define LIS302DL_CLICK_LATENCY_REG_ADDR 0x3E
566 
567 /*******************************************************************************
568 * CLICK_Window Register: Window register
569 * Read Write register
570 * Default value: 0x00
571 * 7:0 Win7-Win0: Window value, step 1msec
572 *******************************************************************************/
573 #define LIS302DL_CLICK_WINDOW_REG_ADDR 0x3F
574 
575 /******************************************************************************/
576 /**************************** END REGISTER MAPPING ***************************/
577 /******************************************************************************/
578 
579 #define LIS302DL_SENSITIVITY_2_3G 18 /* 18 mg/digit*/
580 #define LIS302DL_SENSITIVITY_9_2G 72 /* 72 mg/digit*/
581 
585 #define LIS302DL_DATARATE_100 ((uint8_t)0x00)
586 #define LIS302DL_DATARATE_400 ((uint8_t)0x80)
587 
594 #define LIS302DL_LOWPOWERMODE_POWERDOWN ((uint8_t)0x00)
595 #define LIS302DL_LOWPOWERMODE_ACTIVE ((uint8_t)0x40)
596 
603 #define LIS302DL_FULLSCALE_2_3 ((uint8_t)0x00)
604 #define LIS302DL_FULLSCALE_9_2 ((uint8_t)0x20)
605 
612 #define LIS302DL_SELFTEST_NORMAL ((uint8_t)0x00)
613 #define LIS302DL_SELFTEST_P ((uint8_t)0x10)
614 #define LIS302DL_SELFTEST_M ((uint8_t)0x08)
615 
622 #define LIS302DL_X_ENABLE ((uint8_t)0x01)
623 #define LIS302DL_Y_ENABLE ((uint8_t)0x02)
624 #define LIS302DL_Z_ENABLE ((uint8_t)0x04)
625 #define LIS302DL_XYZ_ENABLE ((uint8_t)0x07)
626 
633 #define LIS302DL_SERIALINTERFACE_4WIRE ((uint8_t)0x00)
634 #define LIS302DL_SERIALINTERFACE_3WIRE ((uint8_t)0x80)
635 
642 #define LIS302DL_BOOT_NORMALMODE ((uint8_t)0x00)
643 #define LIS302DL_BOOT_REBOOTMEMORY ((uint8_t)0x40)
644 
651 #define LIS302DL_FILTEREDDATASELECTION_BYPASSED ((uint8_t)0x00)
652 #define LIS302DL_FILTEREDDATASELECTION_OUTPUTREGISTER ((uint8_t)0x20)
653 
660 #define LIS302DL_HIGHPASSFILTERINTERRUPT_OFF ((uint8_t)0x00)
661 #define LIS302DL_HIGHPASSFILTERINTERRUPT_1 ((uint8_t)0x04)
662 #define LIS302DL_HIGHPASSFILTERINTERRUPT_2 ((uint8_t)0x08)
663 #define LIS302DL_HIGHPASSFILTERINTERRUPT_1_2 ((uint8_t)0x0C)
664 
671 #define LIS302DL_HIGHPASSFILTER_LEVEL_0 ((uint8_t)0x00)
672 #define LIS302DL_HIGHPASSFILTER_LEVEL_1 ((uint8_t)0x01)
673 #define LIS302DL_HIGHPASSFILTER_LEVEL_2 ((uint8_t)0x02)
674 #define LIS302DL_HIGHPASSFILTER_LEVEL_3 ((uint8_t)0x03)
675 
683 #define LIS302DL_INTERRUPTREQUEST_NOTLATCHED ((uint8_t)0x00)
684 #define LIS302DL_INTERRUPTREQUEST_LATCHED ((uint8_t)0x40)
685 
692 #define LIS302DL_CLICKINTERRUPT_XYZ_DISABLE ((uint8_t)0x00)
693 #define LIS302DL_CLICKINTERRUPT_X_ENABLE ((uint8_t)0x01)
694 #define LIS302DL_CLICKINTERRUPT_Y_ENABLE ((uint8_t)0x04)
695 #define LIS302DL_CLICKINTERRUPT_Z_ENABLE ((uint8_t)0x10)
696 #define LIS302DL_CLICKINTERRUPT_XYZ_ENABLE ((uint8_t)0x15)
697 
704 #define LIS302DL_DOUBLECLICKINTERRUPT_XYZ_DISABLE ((uint8_t)0x00)
705 #define LIS302DL_DOUBLECLICKINTERRUPT_X_ENABLE ((uint8_t)0x02)
706 #define LIS302DL_DOUBLECLICKINTERRUPT_Y_ENABLE ((uint8_t)0x08)
707 #define LIS302DL_DOUBLECLICKINTERRUPT_Z_ENABLE ((uint8_t)0x20)
708 #define LIS302DL_DOUBLECLICKINTERRUPT_XYZ_ENABLE ((uint8_t)0x2A)
709 
719 #define LIS302DL_CS_LOW() GPIO_ResetBits(LIS302DL_SPI_CS_GPIO_PORT, LIS302DL_SPI_CS_PIN)
720 #define LIS302DL_CS_HIGH() GPIO_SetBits(LIS302DL_SPI_CS_GPIO_PORT, LIS302DL_SPI_CS_PIN)
721 
728 void LIS302DL_Init(LIS302DL_InitTypeDef *LIS302DL_InitStruct);
729 void LIS302DL_InterruptConfig(LIS302DL_InterruptConfigTypeDef *LIS302DL_InterruptConfigStruct);
730 void LIS302DL_FilterConfig(LIS302DL_FilterConfigTypeDef *LIS302DL_FilterConfigStruct);
731 void LIS302DL_LowpowerCmd(uint8_t LowPowerMode);
732 void LIS302DL_FullScaleCmd(uint8_t FS_value);
733 void LIS302DL_DataRateCmd(uint8_t DataRateValue);
734 void LIS302DL_RebootCmd(void);
735 void LIS302DL_ReadACC(int32_t* out);
736 void LIS302DL_Write(uint8_t* pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite);
737 void LIS302DL_Read(uint8_t* pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead);
738 
739 /* USER Callbacks: This is function for which prototype only is declared in
740  MEMS accelerometre driver and that should be implemented into user applicaiton. */
741 /* LIS302DL_TIMEOUT_UserCallback() function is called whenever a timeout condition
742  occure during communication (waiting transmit data register empty flag(TXE)
743  or waiting receive data register is not empty flag (RXNE)).
744  You can use the default timeout callback implementation by uncommenting the
745  define USE_DEFAULT_TIMEOUT_CALLBACK in stm32f4_discovery_lis302dl.h file.
746  Typically the user implementation of this callback should reset MEMS peripheral
747  and re-initialize communication or in worst case reset all the application. */
748 uint32_t LIS302DL_TIMEOUT_UserCallback(void);
749 
750 #ifdef __cplusplus
751 }
752 #endif
753 
754 #endif /* __STM32F4_DISCOVERY_LIS302DL_H */
755 
772 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
LIS302DL_Read
void LIS302DL_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead)
Reads a block of data from the LIS302DL.
Definition: stm32f4_discovery_lis302dl.c:291
LIS302DL_FullScaleCmd
void LIS302DL_FullScaleCmd(uint8_t FS_value)
Change the Full Scale of LIS302DL.
Definition: stm32f4_discovery_lis302dl.c:217
LIS302DL_DataRateCmd
void LIS302DL_DataRateCmd(uint8_t DataRateValue)
Data Rate command.
Definition: stm32f4_discovery_lis302dl.c:194
stm32f4xx.h
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...
LIS302DL_ReadACC
void LIS302DL_ReadACC(int32_t *out)
Read LIS302DL output register, and calculate the acceleration ACC[mg]=SENSITIVITY* (out_h*256+out_l)/...
Definition: stm32f4_discovery_lis302dl.c:326
LIS302DL_FilterConfig
void LIS302DL_FilterConfig(LIS302DL_FilterConfigTypeDef *LIS302DL_FilterConfigStruct)
Set LIS302DL Internal High Pass Filter configuration.
Definition: stm32f4_discovery_lis302dl.c:121
LIS302DL_FilterConfigTypeDef
Definition: stm32f4_discovery_lis302dl.h:62
LIS302DL_Init
void LIS302DL_Init(LIS302DL_InitTypeDef *LIS302DL_InitStruct)
Set LIS302DL Initialization.
Definition: stm32f4_discovery_lis302dl.c:99
LIS302DL_InterruptConfigTypeDef
Definition: stm32f4_discovery_lis302dl.h:70
LIS302DL_InterruptConfig
void LIS302DL_InterruptConfig(LIS302DL_InterruptConfigTypeDef *LIS302DL_InterruptConfigStruct)
Set LIS302DL Interrupt configuration.
Definition: stm32f4_discovery_lis302dl.c:147
LIS302DL_LowpowerCmd
void LIS302DL_LowpowerCmd(uint8_t LowPowerMode)
Change the lowpower mode for LIS302DL.
Definition: stm32f4_discovery_lis302dl.c:171
LIS302DL_InitTypeDef
Definition: stm32f4_discovery_lis302dl.h:52
LIS302DL_RebootCmd
void LIS302DL_RebootCmd(void)
Reboot memory content of LIS302DL.
Definition: stm32f4_discovery_lis302dl.c:237
LIS302DL_Write
void LIS302DL_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite)
Writes one byte to the LIS302DL.
Definition: stm32f4_discovery_lis302dl.c:257
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